Datasheet LT1963AET-3.3, LT1963AET-1.5, LT1963AET, LT1963AEST-3.3, LT1963AEST-2.5 Datasheet (Linear Technology)

FEATURES

■

Optimized for Fast Transient Response

■

Output Current: 1.5A

■

Dropout Voltage: 340mV

■

Low Noise: 40mV

■

1mA Quiescent Current

■

No Protection Diodes Needed

■

Controlled Quiescent Current in Dropout

■

Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V

■

Adjustable Output from 1.21V to 20V

■

<1mA Quiescent Current in Shutdown

■

Stable with 10mF Output Capacitor

■

Stable with Ceramic Capacitors

■

Reverse Battery Protection

■

No Reverse Current

■

Thermal Limiting

(10Hz to 100kHz)

RMS

U

APPLICATIO S

■

3.3V to 2.5V Logic Power Supplies

■

Post Regulator for Switching Supplies

LT1963A Series

1.5A, Low Noise,

Fast Transient Response

LDO Regulators

U

DESCRIPTIO

The LT®1963A series are low dropout regulators opti­mized for fast transient response. The devices are capable
of supplying 1.5A of output current with a dropout voltage
of 340mV. Operating quiescent current is 1mA, dropping
to < 1mA in shutdown. Quiescent current is well controlled;
it does not rise in dropout as it does with many other
regulators. In addition to fast transient response, the
LT1963A regulators have very low output noise which
makes them ideal for sensitive RF supply applications.

Output voltage range is from 1.21V to 20V. The LT1963A
regulators are stable with output capacitors as low as
10mF. Small ceramic capacitors can be used without the
necessary addition of ESR as is common with other
regulators. Internal protection circuitry includes reverse
battery protection, current limiting, thermal limiting and
reverse current protection. The devices are available in
fixed output voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an
adjustable device with a 1.21V reference voltage. The
LT1963A regulators are available in 5-lead TO-220, DD,
3-lead SOT-223 and 8-lead SO packages.

, LTC and LT are registered trademarks of Linear Technology Corporation.

TYPICAL APPLICATION

3.3V to 2.5V Regulator

IN

> 3V

V

IN

10µF*

SHDN

OUT

LT1963A-2.5

SENSE

GND

1963 TA01

U

2.5V

++

*TANTALUM,
CERAMIC OR
ALUMINUM ELECTROLYTIC

1.5A

10µF*

Dropout Voltage

400

350

300

250

200

150

DROPOUT VOLTAGE (mV)

100

50

0

0.2

0

0.4
OUTPUT CURRENT (A)

0.6

0.8

1.0

1.2

1.4

1963 TA02

1.6

1963af

1

LT1963A Series

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

IN Pin Voltage........................................................ ± 20V

OUT Pin Voltage .................................................... ±20V

Input to Output Differential Voltage (Note 2) ......... ±20V

SENSE Pin Voltage ............................................... ±20V

ADJ Pin Voltage ...................................................... ±7V

UU

W

PACKAGE/ORDER I FOR ATIO

FRONT VIEW

5

TAB IS

GND

5-LEAD PLASTIC DD

*PIN 5 = SENSE FOR LT1963A-1.8/LT1963A-2.5/LT1963A-3.3

= ADJ FOR LT1963A

T

JMAX

4
3
2
1

Q PACKAGE

= 150∞C, qJA = 30∞C/W

SENSE/ADJ*
OUT
GND
IN
SHDN

ORDER PART

NUMBER

LT1963AEQ
LT1963AEQ-1.5
LT1963AEQ-1.8
LT1963AEQ-2.5
LT1963AEQ-3.3

ORDER PART

NUMBER

SHDN Pin Voltage................................................. ± 20V

Output Short-Circuit Duration......................... Indefinite

Operating Junction Temperature Range –45∞C to 125∞C

Storage Temperature Range ................. –65∞C to 150∞C

Lead Temperature (Soldering, 10 sec)..................300∞C

FRONT VIEW

5
4
3
2
1

TAB IS

GND

*PIN 5 = SENSE FOR LT1963A-1.8/LT1963A-2.5/LT1963A-3.3

= ADJ FOR LT1963A

T PACKAGE

5-LEAD PLASTIC TO-220

= 150∞C, qJA = 50∞C/W

T

JMAX

SENSE/ADJ*
OUT
GND
IN
SHDN

ORDER PART

NUMBER

LT1963AET
LT1963AET-1.5
LT1963AET-1.8
LT1963AET-2.5
LT1963AET-3.3

ORDER PART

NUMBER

FRONT VIEW

TAB IS

GND

ST PACKAGE

3-LEAD PLASTIC SOT-223

T

= 150∞C, qJA = 50∞C/W

JMAX

3

OUT

2

GND

1

IN

LT1963AEST-1.5
LT1963AEST-1.8
LT1963AEST-2.5
LT1963AEST-3.3

ST PART

MARKING

963A15
963A18
963A25
963A33

Consult LTC Marketing for parts specified with wider operating temperature ranges.

TOP VIEW

OUT

1

SENSE/ADJ*

*PIN 2 = SENSE FOR LT1963A-1.8/LT1963A-2.5/LT1963A-3.3

= ADJ FOR LT1963A

2

GND

3

NC

4

S8 PACKAGE

8-LEAD PLASTIC SO

= 150∞C, qJA = 70∞C/W

T

JMAX

IN

8

GND

7

GND

6

SHDN

5

LT1963AES8
LT1963AES8-1.5
LT1963AES8-1.8
LT1963AES8-2.5
LT1963AES8-3.3

S8 PART

MARKING

1963A
963A15
963A18
963A25
963A33

2

1963af

LT1963A Series

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25∞C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Input Voltage (Notes 4,12) I

Regulated Output Voltage (Note 5) LT1963A-1.5 VIN = 2.21V, I

ADJ Pin Voltage LT1963A VIN = 2.21V, I
(Notes 4, 5) 2.5V < V

Line Regulation LT1963A-1.5 DVIN = 2.21V to 20V, I

Load Regulation LT1963A-1.5 VIN = 2.5V, DI

Dropout Voltage I
VIN = V

OUT(NOMINAL)

(Notes 6, 7, 12)

GND Pin Current I

= V

V

IN

OUT(NOMINAL)

+ 1V I

(Notes 6, 8)

Output Voltage Noise C
ADJ Pin Bias Current (Notes 4, 9) 3 10 mA
Shutdown Threshold V

SHDN Pin Current V
(Note 10) V

Quiescent Current in Shutdown VIN = 6V, V
Ripple Rejection VIN – V

Current Limit VIN = 7V, V

= 0.5A 1.9 V

LOAD

I

= 1.5A ● 2.1 2.5 V

LOAD

= 1mA 1.477 1.500 1.523 V

2.5V < V

LT1963A-1.8 VIN = 2.3V, I

2.8V < VIN < 20V, 1mA < I

LT1963A-2.5 VIN = 3V, I

3.5V < V

LT1963A-3.3 VIN = 3.8V, I

4.3V < V

LT1963A-1.8 DV
LT1963A-2.5 DV

IN
IN

LT1963A-3.3 DVIN = 3.8V to 20V, I
LT1963A (Note 4) DV

IN

= 2.5V, DI

V

IN

LT1963A-1.8 VIN = 2.8V, DI

= 2.8V, DI

V

IN

LT1963A-2.5 VIN = 3.5V, DI

= 3.5V, DI

V

IN

LT1963A-3.3 VIN = 4.3V, DI

= 4.3V, DI

V

IN

LT1963A (Note 4) VIN = 2.5V, DI

= 2.5V, DI

V

IN

= 1mA 0.02 0.06 V

LOAD

I

= 1mA ● 0.10 V

LOAD

I

= 100mA 0.10 0.17 V

LOAD

I

= 100mA ● 0.22 V

LOAD

I

= 500mA 0.19 0.27 V

LOAD

I

= 500mA ● 0.35 V

LOAD

I

= 1.5A 0.34 0.45 V

LOAD

I

= 1.5A ● 0.55 V

LOAD

= 0mA ● 1.0 1.5 mA

LOAD

= 1mA ● 1.1 1.6 mA

LOAD

I

= 100mA ● 3.8 5.5 mA

LOAD

I

= 500mA ● 15 25 mA

LOAD

= 1.5A ● 80 120 mA

I

LOAD

= 10mF, I

OUT

= Off to On ● 0.90 2 V

OUT

= On to Off ● 0.25 0.75 V

V

OUT

= 0V 0.01 1 mA

SHDN

= 20V 3 30 mA

SHDN

OUT

= 120Hz, I

f

RIPPLE

= V

V

IN

OUT(NOMINAL)

= 1.5A, BW = 10Hz to 100kHz 40 mV

LOAD

= 0V 0.01 1 mA

SHDN

= 1.5V (Avg), V

= 0.75A

LOAD

= 0V 2 A

OUT

+ 1V, DV

LOAD

< 20V, 1mA < I

IN

= 1mA 1.773 1.800 1.827 V

LOAD

= 1mA 2.462 2.500 2.538 V

LOAD

< 20V, 1mA < I

IN

= 1mA 3.250 3.300 3.350 V

LOAD

< 20V, 1mA < I

IN

= 1mA 1.192 1.210 1.228 V

LOAD

< 20V, 1mA < I

IN

= 2.3V to 20V, I
= 3V to 20V, I

LOAD

LOAD

LOAD

= 2.21V to 20V, I

= 1mA to 1.5A 2 9 mV

LOAD

= 1mA to 1.5A ● 18 mV

LOAD

= 1mA to 1.5A 2 10 mV

LOAD

= 1mA to 1.5A ● 20 mV

LOAD

= 1mA to 1.5A 2.5 15 mV

LOAD

= 1mA to 1.5A ● 30 mV

LOAD

= 1mA to 1.5A 3 20 mV

LOAD

= 1mA to 1.5A ● 35 mV

LOAD

= 1mA to 1.5A 2 8 mV

LOAD

= 1mA to 1.5A ● 15 mV

LOAD

= 0.5V

RIPPLE

OUT

P-P

= –0.1V ● 1.6 A

< 1.5A ● 1.447 1.500 1.545 V

LOAD

< 1.5A ● 1.737 1.800 1.854 V

LOAD

< 1.5A ● 2.412 2.500 2.575 V

LOAD

< 1.5A ● 3.200 3.300 3.400 V

LOAD

< 1.5A ● 1.174 1.210 1.246 V

LOAD

= 1mA ● 2.0 6 mV

LOAD

= 1mA ● 2.5 7 mV

= 1mA ● 3.0 10 mV

= 1mA ● 3.5 10 mV

= 1mA ● 1.5 5 mV

LOAD

,5563dB

RMS

1963af

3

LT1963A Series

TEMPERATURE (°C)

–50

DROPOUT VOLTAGE (mV)

500
450
400
350
300
250
200
150
100

50

0

0

50

75

1963 G03

–25

25

100

125

IL = 100mA

IL = 1mA

IL = 0.5A

IL = 1.5A

ELECTRICAL CHARACTERISTICS

The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25∞C. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Input Reverse Leakage Current (Note 13) Q, T, S8 Packages VIN = –20V, V

ST Package VIN = –20V, V

Reverse Output Current (Note 11) LT1963A-1.5 V

LT1963A-1.8 V
LT1963A-2.5 V
LT1963A-3.3 V
LT1963A (Note 4) V

= 1.5V, VIN < 1.5V 600 1200 mA

OUT

= 1.8V, VIN < 1.8V 600 1200 mA

OUT

= 2.5V, VIN < 2.5V 600 1200 mA

OUT

= 3.3V, VIN < 3.3V 600 1200 mA

OUT

= 1.21V, VIN < 1.21V 300 600 mA

OUT

= 0V ● 1mA

OUT

= 0V ● 2mA

OUT

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.

Note 2: Absolute maximum input to output differential voltage can not be
achieved with all combinations of rated IN pin and OUT pin voltages. With
the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from IN to OUT can not exceed ±20V.

Note 3: The LT1963A regulators are tested and specified under pulse load
conditions such that T
TA = 25∞C. Performance at –40∞C and 125∞C is assured by design,
characterization and correlation with statistical process controls.

Note 4: The LT1963A (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.

Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.

Note 6: To satisfy requirements for minimum input voltage, the LT1963A
(adjustable version) is tested and specified for these conditions with an

TYPICAL PERFOR A CE CHARACTERISTICS

Typical Dropout Voltage

500
450
400
350
300
250
200
150

DROPOUT VOLTAGE (mV)

100

50

0

4

0

0.2 0.6

ª TA. The LT1963A is 100% tested at

J

TJ = 125°C

TJ = 25°C

1.4

1.0

1.2

1.6

1963 • G01

0.4

0.8

OUTPUT CURRENT (A)

UW

Guaranteed Dropout Voltage

600

TEST POINTS

500

400

300

200

100

GUARANTEED DROPOUT VOLTAGE (mV)

0

0

0.2 0.6

0.4

external resistor divider (two 4.12k resistors) for an output voltage of

2.4V. The external resistor divider will add a 300mA DC load on the output.
Note 7: Dropout voltage is the minimum input to output voltage differential

needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V

Note 8: GND pin current is tested with V
current source load. The GND pin current will decrease at higher input
voltages.

Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin.
Note 11: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.

Note 12. For the LT1963A, LT1963A-1.5 and LT1963A-1.8 dropout voltage
will be limited by the minimum input voltage specification under some
output voltage/load conditions.

Note 13. For the ST package, the input reverse leakage current increases
due to the additional reverse leakage current for the SHDN pin, which is
tied internally to the IN pin.

TJ ≤ 125°C

TJ ≤ 25°C

0.8

OUTPUT CURRENT (A)

1.0

1.2

1.4

1963 • G02

1.6

IN

– V

DROPOUT

= V

IN

.

OUT(NOMINAL)

Dropout Voltage

+ 1V and a

1963af

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1963A Series

Quiescent Current

1.4

1.2

LT1963A-1.5/1.8/-2.5/-3.3

1.0

0.8

0.6

0.4

QUIESCENT CURRENT (mA)

VIN = 6V

0.2

= ∞, IL = 0

R

L

= V

V

SHDN

0

–50

IN

–25 0

25 75

TEMPERATURE (°C)

LT1963A-2.5 Output Voltage

2.58
IL = 1mA

2.56

2.54

2.52

2.50

2.48

OUTPUT VOLTAGE (V)

2.46

2.44

2.42

–50

050

–25 25 75 125

TEMPERATURE (°C)

LT1963A

50 100 125

1963 G04

100

1963 G06

LT1963A-1.5 Output Voltage

1.54
IL = 1mA

1.53

1.52

1.51

1.50

1.49

OUTPUT VOLTAGE (V)

1.48

1.47

1.46

–25 0 50

–50

25

TEMPERATURE (°C)

LT1963A-3.3 Output Voltage

3.38
IL = 1mA

3.36

3.34

3.32

3.30

3.28

OUTPUT VOLTAGE (V)

3.26

3.24

3.22

–50

050

–25 25 75 125

TEMPERATURE (°C)

75 100 125

1963 G40

100

1963 G07

LT1963A-1.8 Output Voltage

1.84
IL = 1mA

1.83

1.82

1.81

1.80

1.79

OUTPUT VOLTAGE (V)

1.78

1.77

1.76

–25 25 75 125

–50

050

TEMPERATURE (°C)

LT1963A ADJ Pin Voltage

1.230
IL = 1mA

1.225

1.220

1.215

1.210

1.205

ADJ PIN VOLTAGE (V)

1.200

1.195

1.190

–50

050

–25 25 75 125

TEMPERATURE (°C)

100

1963 G05

100

1963 G08

LT1963A-1.5 Quiescent Current

14

TJ = 25°C

= ∞

R

L

12

10

QUIESCENT CURRENT (mA)

= V

V

SHDN

IN

8

6

4

2

0

0

2

1

3

5

68

4

INPUT VOLTAGE (V)

LT1963A-1.8 Quiescent Current

14

12

10

8

6

4

QUIESCENT CURRENT (mA)

2

9

1963 G41

10

7

0

0

2

1

34
INPUT VOLTAGE (V)

TJ = 25°C

= ∞

R

L

= V

V

SHDN

IN

5678910

1963 G09

LT1963A-2.5 Quiescent Current

14

12

10

8

6

4

QUIESCENT CURRENT (mA)

2

0

0

2

1

34
INPUT VOLTAGE (V)

TJ = 25°C

= ∞

R

L

= V

V

SHDN

IN

1056789

1963 G10

1963af

5

LT1963A Series

INPUT VOLTAGE (V)

100

90
80
70
60
50
40
30
20
10

0

GND PIN CURRENT (mA)

1963 G17

0123

4

5

678910

RL = 1.8, IL = 1A*

RL = 1.2, IL = 1.5A*

RL = 3.6, IL = 500mA*

TJ = 25°C
V

SHDN

= V

IN

*FOR V

OUT

= 1.8V

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1963A-3.3 Quiescent Current

14

12

10

8

6

4

QUIESCENT CURRENT (mA)

2

0

0

2

1

34
INPUT VOLTAGE (V)

LT1963A-1.8 GND Pin Current

25

TJ = 25°C

= V

V

SHDN

IN

*FOR V

20

15

10

GND PIN CURRENT (mA)

5

0

0

= 1.8V

OUT

RL = 18, IL = 100mA*

RL = 180, IL = 10mA*

1

3

2

INPUT VOLTAGE (V)

RL = 6, IL = 300mA*

4

TJ = 25°C

= ∞

R

L

= V

V

SHDN

IN

1963 G11

1963 G13

QUIESCENT CURRENT (mA)

1056789

GND PIN CURRENT (mA)

1098765

LT1963A Quiescent Current

14

12

10

8

6

4

2

0

0

4

2

68
INPUT VOLTAGE (V)

LT1963A-2.5 GND Pin Current

25

20

15

10

5

0

0

RL = 8.33, IL = 300mA*

RL = 25, IL = 100mA*

RL = 250, IL = 10mA*

1

3

2

INPUT VOLTAGE (V)

TJ = 25°C
V

SHDN

*FOR V

4

TJ = 25°C

= 4.3k

R

L

= V

V

SHDN

= V

IN

= 2.5V

OUT

IN

1963 G12

1963 G14

GND PIN CURRENT (mA)

2010 12 14 16 18

GND PIN CURRENT (mA)

1098765

LT1963A-1.5 GND Pin Current

25

TJ = 25°C

= V

V

SHDN

IN

*FOR V

20

15

10

5

0

0

= 1.5V

OUT

RL = 150, IL = 10mA*

123

45

INPUT VOLTAGE (V)

RL = 5, IL = 300mA*

RL = 15, IL = 100mA*

67 9

LT1963A-3.3 GND Pin Current

25

20

15

10

5

0

0

RL = 330, IL = 100mA*

1

3

2

INPUT VOLTAGE (V)

TJ = 25°C
V

SHDN

*FOR V

RL = 11, IL = 300mA*

RL = 33, IL = 100mA*

4

= V

OUT

8

IN

= 3.3V

10

1963 G42

1098765

1963 G15

10

8

6

4

GND PIN CURRENT (mA)

2

0

6

LT1963A GND Pin Current

TJ = 25°C

= V

V

SHDN

*FOR V

RL = 4.33, IL = 300mA*

RL = 12.1, IL = 100mA*

RL = 121, IL = 10mA*

1

0

2

3

4

INPUT VOLTAGE (V)

OUT

IN

= 1.21V

1963 G16

LT1963A-1.8 GND Pin CurrentLT1963A-1.5 GND Pin Current

100

90
80
70
60
50
40
30

GND PIN CURRENT (mA)

20
10

1098765

0

0

RL = 1, IL = 1.5A*

21

INPUT VOLTAGE (V)

TJ = 25°C
V

SHDN

*FOR V

RL = 1.5, IL = 1A*

RL = 3, IL = 500mA*

67 9

43

5

= V

OUT

IN

= 1.5V

8

10

1963 G43

1963af

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1963A Series

LT1963A-2.5 GND Pin Current

100

90
80
70
60
50
40
30

GND PIN CURRENT (mA)

20
10

0

0123

RL = 1.67, IL = 1.5A*

RL = 2.5, IL = 1A*

RL = 5, IL = 500mA*

4

5

INPUT VOLTAGE (V)

GND Pin Current vs I

100

V

IN = VOUT (NOMINAL)

90
80
70
60
50
40
30

GND PIN CURRENT (mA)

20
10

0

0 0.2 0.4 0.6

+1V

0.8

OUTPUT CURRENT (A)

TJ = 25°C

= V

V

SHDN

IN

*FOR V

678910

OUT

= 2.5V

1963 G18

LOAD

1.2 1.4 1.6

1.0

1963 G21

LT1963A-3.3 GND Pin Current

100

90
80
70
60
50
40
30

GND PIN CURRENT (mA)

20
10

0

0123

RL = 2.2, IL = 1.5A*

RL = 3.3, IL = 1A*

RL = 6.6, IL = 500mA*

4

5

INPUT VOLTAGE (V)

SHDN Pin Threshold (On-to-Off)

1.0
IL = 1mA

0.9

0.8

0.7

0.6

0.5

0.4

0.3

SHDN PIN THRESHOLD (V)

0.2

0.1

0

–50

0

–25

TEMPERATURE (°C)

50

25

TJ = 25°C

= V

V

SHDN

IN

*FOR V

678910

= 3.3V

OUT

1963 G19

100

125

1963 G22

75

LT1963A GND Pin Current

100

90
80
70
60
50
40
30

GND PIN CURRENT (mA)

20
10

0

0123

RL = 0.81, IL = 1.5A*

RL = 1.21, IL = 1A*

RL = 2.42, IL = 500mA*

INPUT VOLTAGE (V)

TJ = 25°C
V

*FOR V

4

5

SHDN Pin Threshold (Off-to-On)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

SHDN PIN THRESHOLD (V)

0.2

0.1
0

–50

–25

IL = 1.5A

50

25

0

TEMPERATURE (°C)

= V

SHDN

IN

= 1.21V

OUT

678910

1963 G20

IL = 1mA

100

125

1963 G23

75

SHDN Pin Input Current

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

SHDN PIN INPUT CURRENT (µA)

0.5
0

0246

SHDN PIN VOLTAGE (V)

8

12 14 16 18 20

10

1963 G24

SHDN Pin Input Current

7

6

5

4

3

2

SHDN PIN INPUT CURRENT (µA)

1

0

–50

–25 0

TEMPERATURE (°C)

V

50 100 125

25 75

SHDN

= 20V

1963 G25

ADJ Pin Bias Current

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

ADJ PIN BIAS CURRENT (µA)

1.0

0.5
0

–50

0

–25

TEMPERATURE (°C)

50

25

75

100

125

1963 G26

1963af

7

LT1963A Series

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Current Limit

3.0

2.5
TJ = 25°C

2.0

TJ = 125°C

1.5

1.0

CURRENT LIMIT (A)

0.5

∆V

= 100mV

OUT

0

02 6 10 14 18

481216

INPUT/OUTPUT DIFFERENTIAL (V)

Reverse Output Current

5.0

4.5

LT1963A-1.8

4.0

LT1963A-1.5

3.5

3.0

LT1963A

2.5

2.0

1.5

1.0

REVERSE OUTPUT CURRENT (mA)

0.5

0

0123

4

OUTPUT VOLTAGE (V)

LT1963A-2.5

678910

5

TJ = –50°C

LT1963A-3.3

20

1963 G27

TJ = 25°C

= 0V

V

IN

CURRENT FLOWS INTO
OUTPUT PIN

= V

V

OUT

= V

V

OUT

1963 G29

(LT1963A)

ADJ

(LT1963A-1.5/1.8/-2.5/-3.3)

FB

Current Limit

4.0
VIN = 7V

= 0V

V

OUT

3.5

3.0

2.5

2.0

1.5

CURRENT LIMIT (A)

1.0

0.5

0

–50

–25

25

0

TEMPERATURE (°C)

Reverse Output Current

1.0
VIN = 0V

0.9

= 1.21V (LT1963A)

V

OUT

= 1.5V (LT1963A-1.5)

V

OUT

0.8

= 1.8V (LT1963A-1.8)

V

OUT

= 2.5V (LT1963A-2.5)

V

OUT

0.7

= 3.3V (LT1963A-3.3)

V

OUT

0.6

0.5

0.4

0.3

0.2

REVERSE OUTPUT CURRENT (mA)

0.1

0

–50

–25

LT1963A-1.8/-2.5/-3.3

25

0

TEMPERATURE (°C)

50

50

75

LT1963A

75

100

100

125

1963 G28

125

1963 G30

Ripple Rejection Ripple Rejection

80

70

60

50

40

30

RIPPLE REJECTION (dB)

20

10

0

C

= 100µF TANTALUM

OUT

+10  1µF CERAMIC

C

= 10µF TANTALUM

OUT

IL = 0.75A

= V

V

IN

OUT(NOMINAL)

10 1k 10k 1M

100 100k

+1V + 50mV

FREQUENCY (Hz)

RMS

RIPPLE

1963 G31

76

74

72

70

68

66

RIPPLE REJECTION (dB)

IL = 0.75A

64

= V

V

IN

RIPPLE AT f = 120Hz

62

–50

–25 0

8

OUT(NOMINAL)

25 75

TEMPERATURE (°C)

+1V + 0.5V

P-P

50 100 125

1963 G32

LT1963A Minimum Input Voltage

3.0

2.5

2.0

1.5

1.0

MINIMUM INPUT VOLTAGE (V)

0.5

0

–50

IL = 1.5A

IL = 100mA

–25 0

50 100 125

25 75

TEMPERATURE (°C)

IL = 500mA

1963 G33

1963af

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1963A Series

Load Regulation

10

5

0

–5

–10

LOAD REGULATION (mV)

–15

–20

–50

LT1963A-1.8

LT1963A-2.5

VIN = V

OUT(NOMINAL)

(LT1963A-1.8/-2.5/-3.3)

= 2.7V (LT1963A/LT1963A-1.5)

V

IN

= 1mA TO 1.5A

∆I

L

–25 0

TEMPERATURE (°C)

25 75

LT1963A-1.5

LT1963A

LT1963A-3.3

+1V

50 100 125

RMS Output Noise vs Load
Current (10Hz to 100kHz)

50

C

= 10µF

OUT

45

)

40

RMS

35
30
25
20
15
10

OUTPUT NOISE VOLTAGE (µV

5
0

0.0001 0.01 0.1 10

0.001 1
LOAD CURRENT (A)

LT1963A-3.3

LT1963A-2.5

LT1963A-1.8

LT1963A-1.5

LT1963A

1963 G34

1063 G36

V

OUT

100µV/DIV

Output Noise Spectral Density

1.0
C

= 10µF

OUT

=1.5A

I

L

LT1963A-2.5

LT1963A

LT1963A-1.5

1k 100k

FREQUENCY (Hz)

1963 G35

OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)

0.01

0.1

10

LT1963A-3.3

LT1963A-1.8

100 10k

LT1963A-3.3 10Hz to 100kHz Output Noise

C
I

LOAD

OUT

= 10µF

= 1.5A

1ms/DIV

1963 G37

LT1963A-3.3 Transient Response

200

VIN = 4.3V

= 3.3µF TANTALUM

C

150

IN

= 10µF TANTALUM

C

OUT

100

50

0

DEVIATION (mV)

OUTPUT VOLTAGE

–50

–100

0.6

0.4

LOAD

0.2

CURRENT (A)

0

0246

8

12 14 16 18 20

10

TIME (µs)

1963 G38

LT1963A-3.3 Transient Response

150
100

50

0

–50

DEVIATION (mV)

OUTPUT VOLTAGE

–100
–150

1.5

1.0

0.5

LOAD

CURRENT (A)

0

050100 150

VIN = 4.3V

= 33µF TANTALUM

C

IN

= 100µF TANTALUM

C

OUT

+10  1µF CERAMIC

250

300

TIME (µs)

350 400 450 500200

1963 G39

1963af

9

LT1963A Series

U

UU

PI FU CTIO S

OUT: Output. The output supplies power to the load. A
minimum output capacitor of 10mF is required to prevent
oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.

SENSE: Sense. For fixed voltage versions of the LT1963A
(LT1963A-1.5/LT1963A-1.8/LT1963A-2.5/LT1963A-3.3),
the SENSE pin is the input to the error amplifier. Optimum
regulation will be obtained at the point where the SENSE
pin is connected to the OUT pin of the regulator. In critical
applications, small voltage drops are caused by the resis­tance (RP) of PC traces between the regulator and the load.
These may be eliminated by connecting the SENSE pin to
the output at the load as shown in Figure 1 (Kelvin Sense
Connection). Note that the voltage drop across the exter­nal PC traces will add to the dropout voltage of the regu­lator. The SENSE pin bias current is 600mA at the nominal
rated output voltage. The SENSE pin can be pulled below
ground (as in a dual supply system where the regulator
load is returned to a negative supply) and still allow the
device to start and operate.

output will be off when the SHDN pin is pulled low. The
SHDN pin can be driven either by 5V logic or open­collector logic with a pull-up resistor. The pull-up resistor
is required to supply the pull-up current of the open­collector gate, normally several microamperes, and the
SHDN pin current, typically 3mA. If unused, the SHDN pin
must be connected to VIN. The device will be in the low
power shutdown state if the SHDN pin is not connected.

IN: Input. Power is supplied to the device through the IN
pin. A bypass capacitor is required on this pin if the device
is more than six inches away from the main input filter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1mF to 10mF is sufficient. The LT1963A
regulators are designed to withstand reverse voltages on
the IN pin with respect to ground and the OUT pin. In the
case of a reverse input, which can happen if a battery is
plugged in backwards, the device will act as if there is a
diode in series with its input. There will be no reverse
current flow into the regulator and no reverse voltage will
appear at the load. The device will protect both itself and
the load.

ADJ: Adjust. For the adjustable LT1963A, this is the input
to the error amplifier. This pin is internally clamped to ± 7V.
It has a bias current of 3mA which flows into the pin. The
ADJ pin voltage is 1.21V referenced to ground and the
output voltage range is 1.21V to 20V.

SHDN: Shutdown. The SHDN pin is used to put the
LT1963A regulators into a low power shutdown state. The

IN

V

+

IN

Figure 1. Kelvin Sense Connection

SHDN

LT1963A

SENSE

GND

OUT

R

P

+

R

P

LOAD

1963 F01

10

1963af

WUUU

APPLICATIO S I FOR ATIO

LT1963A Series

The LT1963A series are 1.5A low dropout regulators op­timized for fast transient response. The devices are ca­pable of supplying 1.5A at a dropout voltage of 350mV.
The low operating quiescent current (1mA) drops to less
than 1mA in shutdown. In addition to the low quiescent
current, the LT1963A regulators incorporate several pro­tection features which make them ideal for use in battery­powered systems. The devices are protected against both
reverse input and reverse output voltages. In battery backup
applications where the output can be held up by a backup
battery when the input is pulled to ground, the LT1963A-X
acts like it has a diode in series with its output and prevents
reverse current flow. Additionally, in dual supply applica­tions where the regulator load is returned to a negative
supply, the output can be pulled below ground by as much
as 20V and still allow the device to start and operate.

Adjustable Operation

The adjustable version of the LT1963A has an output
voltage range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2. The
device servos the output to maintain the voltage at the ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3mA at 25∞C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pin bias current. Note that in shutdown the output is turned
off and the divider current will be zero.

LT1963A

GND

OUT

ADJ

V

OUT

+

R2

R1

IN

V

IN

The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage to

1.21V: V

/1.21V. For example, load regulation for an

OUT

output current change of 1mA to 1.5A is –3mV typical at
V

= 1.21V. At V

OUT

= 5V, load regulation is:

OUT

(5V/1.21V)(–3mV) = –12.4mV

Output Capacitance and Transient Response

The LT1963A regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small capaci­tors. A minimum output capacitor of 10mF with an ESR of
3W or less is recommended to prevent oscillations. Larger
values of output capacitance can decrease the peak devia­tions and provide improved transient response for larger
load current changes. Bypass capacitors, used to decouple
individual components powered by the LT1963A, will
increase the effective output capacitor value.

Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior over
temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitances
in a small package, but exhibit strong voltage and tem­perature coefficients as shown in Figures 3 and 4. When
used with a 5V regulator, a 10mF Y5V capacitor can exhibit

20

0

–20

–40

BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF

X5R

1963 F02

R

2

Ê

VV

=+

121 1

.

OUT ADJ

VV

=

121

.

ADJ

IA

= ∞

3

m AT 25 C

ADJ

OUTPUT RANGE = 1.21V TO 20V

ˆ

IR

+

Á

˜

Ë

¯

R

1

2

()()

Figure 2. Adjustable Operation

–60

CHANGE IN VALUE (%)

–80

–100

0

26

4

DC BIAS VOLTAGE (V)

Y5V

14

8

12

10

16

1963 F03

Figure 3. Ceramic Capacitor DC Bias Characteristics

11

1963af

LT1963A Series

WUUU

APPLICATIO S I FOR ATIO

40

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF

–100

–50

–25 0

Figure 4. Ceramic Capacitor Temperature Characteristics

25 75

TEMPERATURE (°C)

X5R

Y5V

50 100 125

1963 F04

an effective value as low as 1mF to 2mF over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values.

Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro­phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.

Overload Recovery

Like many IC power regulators, the LT1963A-X has safe
operating area protection. The safe area protection de­creases the current limit as input-to-output voltage in­creases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage.
The protection is designed to provide some output current
at all values of input-to-output voltage up to the device
breakdown.

When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output

currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1963A-X.

The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Com­mon situations are immediately after the removal of a
short-circuit or when the shutdown pin is pulled high after
the input voltage has already been turned on. The load line
for such a load may intersect the output current curve at
two points. If this happens, there are two stable output
operating points for the regulator. With this double inter­section, the input power supply may need to be cycled
down to zero and brought up again to make the output
recover.

Output Voltage Noise

The LT1963A regulators have been designed to provide
low output voltage noise over the 10Hz to 100kHz band­width while operating at full load. Output voltage noise is
typically 40nV/÷Hz over this frequency bandwidth for the
LT1963A (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 14mV
the LT1963A increasing to 38mV

for the LT1963A-3.3.

RMS

RMS

for

Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1963A-X. Power
supply ripple rejection must also be considered; the
LT1963A regulators do not have unlimited power supply
rejection and will pass a small portion of the input noise
through to the output.

Thermal Considerations

The power handling capability of the device is limited by the
maximum rated junction temperature (125∞C). The power
dissipated by the device is made up of two components:

1. Output current multiplied by the input/output voltage
differential: (I

)(VIN – V

OUT

OUT

), and

12

1963af

WUUU

APPLICATIO S I FOR ATIO

LT1963A Series

2. GND pin current multiplied by the input voltage:
(I

)(VIN).

GND

The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteris­tics. Power dissipation will be equal to the sum of the two
components listed above.

The LT1963A series regulators have internal thermal
limiting designed to protect the device during overload
conditions. For continuous normal conditions, the maxi­mum junction temperature rating of 125∞C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambi­ent. Additional heat sources mounted nearby must also
be considered.

For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener­ated by power devices.

The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.

Table 1. Q Package, 5-Lead DD

COPPER AREA

TOPSIDE* BACKSIDE

2500mm22500mm
1000mm22500mm

125mm22500mm

*Device is mounted on topside

BOARD AREA (JUNCTION-TO-AMBIENT)

2

2500mm

2

2500mm

2

2500mm

Table 2. SO-8 Package, 8-Lead SO

COPPER AREA

TOPSIDE* BACKSIDE

2500mm22500mm
1000mm22500mm

225mm22500mm
100mm22500mm

*Device is mounted on topside.

BOARD AREA (JUNCTION-TO-AMBIENT)

2

2500mm

2

2500mm

2

2500mm

2

2500mm

THERMAL RESISTANCE

2

2

2

2

2

2

2

23∞C/W
25∞C/W
33∞C/W

THERMAL RESISTANCE

55∞C/W
55∞C/W
63∞C/W
69∞C/W

Table 3. SOT-223 Package, 3-Lead SOT-223

COPPER AREA

TOPSIDE* BACKSIDE

2500mm22500mm22500mm
1000mm22500mm22500mm

2

225mm

100mm
1000mm21000mm21000mm
1000mm

*Device is mounted on topside.

2500mm22500mm

2

2500mm22500mm

2

0mm

BOARD AREA (JUNCTION-TO-AMBIENT)

2

1000mm

THERMAL RESISTANCE

2

2

2

2

2

2

42∞C/W
42∞C/W
50∞C/W
56∞C/W
49∞C/W
52∞C/W

T Package, 5-Lead TO-220

Thermal Resistance (Junction-to-Case) = 4∞C/W

Calculating Junction Temperature

Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50∞C,
what will the maximum junction temperature be?

The power dissipated by the device will be equal to:

I

OUT(MAX)(VIN(MAX)

– V

OUT

) + I

GND(VIN(MAX)

)

where,

I

OUT(MAX)

V

IN(MAX)

I

GND

at (I

= 500mA

= 6V

= 500mA, VIN = 6V) = 10mA

OUT

So,

P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W

Using a DD package, the thermal resistance will be in the
range of 23∞C/W to 33∞C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:

1.41W(28∞C/W) = 39.5∞C

The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:

T

= 50∞C + 39.5∞C = 89.5∞C

JMAX

1963af

13

LT1963A Series

WUUU

APPLICATIO S I FOR ATIO

Protection Features

The LT1963A regulators incorporate several protection
features which make them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.

Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal opera­tion, the junction temperature should not exceed 125∞C.

The input of the device will withstand reverse voltages of
20V. Current flow into the device will be limited to less than
1mA (typically less than 100mA) and no negative voltage
will appear at the output. The device will protect both itself
and the load. This provides protection against batteries
that can be plugged in backward.

The output of the LT1963A can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600mA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.

The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.

In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp

voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
from the 1.21V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 13V difference between OUT and ADJ
pins divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.

In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.

When the IN pin of the LT1963A is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input current
will typically drop to less than 2mA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

REVERSE OUTPUT CURRENT (mA)

0.5
0

Figure 5. Reverse Output Current

V

OUT

LT1963A-1.5

= V

V

OUT

LT1963A-1.8

= V

V

OUT

LT1963A-2.5

= V

V

OUT

0

LT1963A

= V

ADJ

FB

FB

FB

213

4

5

OUTPUT VOLTAGE (V)

LT1963A-3.3

= V

V

OUT

TJ = 25°C

= 0V

V

IN

CURRENT FLOWS
INTO OUTPUT PIN

697

8

1963 F05

FB

10

14

1963af

TYPICAL APPLICATIO S

SCR Pre-Regulator Provides Efficiency Over Line Variations

L2

10VAC AT

115V

90-140

VAC

IN

10VAC AT

115V

IN

U

1N4148

1k

L1

500µH

+

10000µF

34k*

LT1963A-3.3

IN

SHDN

GND

LT1963A Series

3.3V

OUT

+

FB

1.5A

22µF

OUT

1N4002 1N4002

“SYNC”

1N4002

TO ALL “+V”

POINTS

22µF

+V

2.4k

C1A

+

750Ω

+

1/2

LT1018

1N4148

200k

12.1k*

–

1N4148

10k

+V

0.1µF

1µF

+V

A1

LT1006

+

10k

–

10k

LT1004

1.2V

1963 TA03

+V

+V

C1B

0.033µF

L1 = COILTRONICS CTX500-2-52
L2 = STANCOR P-8559
* = 1% FILM RESISTOR
= NTE5437

750Ω

1/2

LT1018

+

–

1963af

15

LT1963A Series

PACKAGE DESCRIPTIO

U

Q Package

5-Lead Plastic DD Pak

(Reference LTC DWG # 05-08-1461)

0.256

(6.502)

0.060

(1.524)

0.300

(7.620)

BOTTOM VIEW OF DD PAK

HATCHED AREA IS SOLDER PLATED

COPPER HEAT SINK

0.060

(1.524)

0.075

(1.905)

0.183

(4.648)

0.060

(1.524)

TYP

0.330 – 0.370

(8.382 – 9.398)

+0.012

0.143
–0.020

+0.305

3.632

()

–0.508

0.028 – 0.038

(0.711 – 0.965)

0.390 – 0.415

(9.906 – 10.541)

° TYP

15

0.067
(1.70)

BSC

0.165 – 0.180

(4.191 – 4.572)

0.059

(1.499)

TYP

0.013 – 0.023

(0.330 – 0.584)

0.045 – 0.055

(1.143 – 1.397)

+0.008

0.004
–0.004

+0.203

0.102

()

–0.102

0.095 – 0.115

(2.413 – 2.921)

0.050 ± 0.012

(1.270 ± 0.305)

Q(DD5) 1098

16

1963af

PACKAGE DESCRIPTIO

U

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

0.189 – 0.197*
(4.801 – 5.004)

7

8

6

LT1963A Series

5

0.228 – 0.244

(5.791 – 6.197)

0.010 – 0.020

(0.254 – 0.508)

0.008 – 0.010

(0.203 – 0.254)

*

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

¥ 45∞

0°– 8° TYP

0.016 – 0.050

(0.406 – 1.270)

0.053 – 0.069

(1.346 – 1.752)

0.014 – 0.019

(0.355 – 0.483)

TYP

0.150 – 0.157**
(3.810 – 3.988)

1

3

2

4

0.004 – 0.010

(0.101 – 0.254)

0.050

(1.270)

BSC

SO8 1298

1963af

17

LT1963A Series

PACKAGE DESCRIPTIO

0.248 – 0.264
(6.30 – 6.71)

0.114 – 0.124
(2.90 – 3.15)

0.264 – 0.287
(6.70 – 7.30)

0.130 – 0.146
(3.30 – 3.71)

U

ST Package

3-Lead Plastic SOT-223

(Reference LTC DWG # 05-08-1630)

0.071

(1.80)

MAX

0.0905
(2.30)

NOM

0.024 – 0.033
(0.60 – 0.84)

0.181
(4.60)

NOM

0.033 – 0.041
(0.84 – 1.04)

0.012

(0.31)

MIN

10°

MAX

10° – 16°

0.010 – 0.014
(0.25 – 0.36)

10° – 16°

0.0008 – 0.0040

(0.0203 – 0.1016)

ST3 (SOT-233) 1298

18

1963af

PACKAGE DESCRIPTIO

T5 (TO-220) 0399

0.028 – 0.038

(0.711 – 0.965)

0.067
(1.70)

0.135 – 0.165

(3.429 – 4.191)

0.700 – 0.728

(17.78 – 18.491)

0.045 – 0.055

(1.143 – 1.397)

0.095 – 0.115

(2.413 – 2.921)

0.013 – 0.023

(0.330 – 0.584)

0.620

(15.75)

TYP

0.155 – 0.195*

(3.937 – 4.953)

0.152 – 0.202

(3.861 – 5.131)

0.260 – 0.320
(6.60 – 8.13)

0.165 – 0.180

(4.191 – 4.572)

0.147 – 0.155

(3.734 – 3.937)

DIA

0.390 – 0.415

(9.906 – 10.541)

0.330 – 0.370

(8.382 – 9.398)

0.460 – 0.500

(11.684 – 12.700)

0.570 – 0.620

(14.478 – 15.748)

0.230 – 0.270

(5.842 – 6.858)

BSC

SEATING PLANE

* MEASURED AT THE SEATING PLANE

LT1963A Series

U

T Package

5-Lead Plastic TO-220 (Standard)

(Reference LTC DWG # 05-08-1421)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

1963af

19

LT1963A Series

TYPICAL APPLICATIO S

U

+

V

> 2.7V

IN

NOTE: ADJUST R1 FOR
0A TO 1.5A CONSTANT CURRENT

10µF

C1

Adjustable Current Source

R5

0.01Ω

R1

1k

LT1004-1.2

80.6k

R3
2k

R2

3.3µF

C2

R4

2.2k

R6

2.2k

2

+

1/2

LT1366

3

–

LT1963A-1.8

IN

SHDN

GND

C3

1µF

8

4

OUT

1

LOAD

FB

R8
100k

R7
470Ω

1963 TA04

Paralleling of Regulators for Higher Output Current

R1

V

IN

> 3.7V

+

SHDN

C1
100µF

0.01Ω

R2

0.01Ω

R3

2.2kR42.2k

LT1963A-3.3

IN

SHDN

IN

SHDN

3

+

2

–

GND

LT1963A

GND

1/2

LT1366

8

4

OUT

OUT

+

FB

R6

FB

6.65k

R7

4.12k

R5
1k

1

C3

0.01µF

1963 TA05

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1120 125mA Low Dropout Regulator with 20mA I

Q

LT1121 150mA Micropower Low Dropout Regulator 30mA IQ, SOT-223 Package
LT1129 700mA Micropower Low Dropout Regulator 50mA Quiescent Current
LT1175 500mA Negative Low Dropout Micropower Regulator 45mA IQ, 0.26V Dropout Voltage, SOT-223 Package
LT1521 300mA Low Dropout Micropower Regulator with Shutdown 15mA IQ, Reverse Battery Protection
LT1529 3A Low Dropout Regulator with 50mA I

Q

LT1772 Constant Frequency, Current Mode Step-Down DC/DC Controller Up to 94% Efficiency, SOT-23 Package, 100% Duty Cycle
LTC1627 High Efficiency Synchronous Step-Down Switching Regulator Burst ModeTM Operation, Monolithic, 100% Duty Cycle
LT1761 Series 100mA, Low Noise, Low Dropout Micropower Regulators in SOT-23 20mA Quiescent Current, 20mV
LT1762 Series 150mA, Low Noise, LDO Micropower Regulators 25mA Quiescent Current, 20mV
LT1763 Series 500mA, Low Noise, LDO Micropower Regulators 30mA Quiescent Current, 20mV
LT1764A Series 3A, Fast Transient Response Low Dropout Regulator 340mV Dropout Voltage, 40mV
LT1962 Series 300mA, Low Noise, LDO Micropower Regulator 30mA Quiescent Current, 20mV
LT1964 200mA, Low Noise, Negative LDO Micropower Regulator 30mA Quiescent Current, 30mV
Burst Mode is a registered trademark of Linear Technology Corporation.

ThinSOT is a trademark of Linear Technology Corporation.

Includes 2.5V Reference and Comparator

500mV Dropout Voltage

Noise, ThinSOTTM Package

RMS

Noise, MSOP Package

RMS

Noise, SO-8 Package

RMS

Noise

RMS

Noise, MSOP Package

RMS

Noise, ThinSOT Package

RMS

3.3V

3A
C2
22µF

20

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

1963af

LT/TP 0602 2K • PRINTED IN USA

„ LINEAR TECHNOLOGY CORPORATION 2002