Remove, Recharge and Replace Batteries Without
Loss of Regulation
Daisy-Chained Control Outputs
U
APPLICATIONS
■
Dual Battery Systems
■
Battery Backup Systems
■
Automatic Power Management for
Battery-Operated Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LT®1579 is a dual input, single output, low dropout
regulator. This device is designed to provide an
uninterruptible output voltage from two independent input
voltage sources on a priority basis. All of the circuitry
needed to switch smoothly and automatically between
inputs is incorporated.
The LT1579 can supply 300mA of output current from
either input at a dropout voltage of 0.4V. Quiescent current
is 50µ A, dropping to 7µA in shutdown. Two comparators
are included to monitor input voltage status. Two additional status flags indicate which input is supplying power
and provide an early warning against loss of output
regulation when both inputs are low. A secondary select
pin is provided so that the user can force the device to
switch from the primary input to the secondary input.
Internal protection circuitry includes reverse-battery protection, current limiting, thermal limiting and reversecurrent protection.
The device is available in fixed output voltages of 3V, 3.3V
and 5V, and as an adjustable device with a 1.5V reference
voltage. The LT1579 regulators are available in narrow
16-lead SO and 16-lead SSOP packages with all features,
and in SO-8 with limited features.
TYPICAL APPLICATION
5V Dual Battery Supply
+
1µF
+
1µF
IN1
2.7M
LBI1
1M
IN2
2.7M
LBI2
1M
OUT
LT1579-5
SHDN
LBO1
LB02
BACKUP
DROPOUT
BIASCOMP
GND
U
Automatic Input Switching
5V
+
SS
300mA
4.7µF
TO
POWER
MANAGEMENT
0.01µF
1579 TA01
12
V
10
8
6
4
INPUT VOLTAGE (V)
2
0
5.05
5.00
4.95
OUTPUT VOLTAGE (V)
0
SWITCHOVER
IN1
I
IN1
4
218
V
= 10V
IN2
= 50mA
I
POINT
6
8
TIME (ms)
LOAD
I
IN2
12
14
16
10
20
1578 TA02
INPUT CURRENT (mA)
80
60
40
20
0
1
LT1579
WW
W
U
ABSOLUTE MAXIMUM RATINGS
Power Input Pin Voltage ......................................±20V*
Storage Temperature Range ................. –65°C to 150°C
Operating Junction Temperature Range .... 0°C to 125°C
Lead Temperature (Soldering, 10 sec)..................300°C
*For applications requiring input voltage ratings greater than 20V,
consult factory.
U
ORDER PART
TOP VIEW
1
GND
2
V
IN1
POWER
INPUTS
CONTROL
INPUTS
16-LEAD PLASTIC SSOP
SEE APPLICATION INFORMATION SECTION
3
V
IN2
4
SS
5
SHDN
6
LBI1
7
LBI2
8
GND
GN PACKAGE
= 125°C, θJA = 95°C/W (GN)
T
JMAX
= 125°C, θJA = 68°C/W (S)
T
JMAX
16
15
14
13
12
11
10
9
S PACKAGE
16-LEAD PLASTIC SO
GND
OUT
ADJ
BACKUP
LBO1
LBO2
BIASCOMP
GND
LOGIC
OUTPUTS
NUMBER
LT1579CGN
LT1579CS
GN PART MARKING
1579
TOP VIEW
V
1
IN1
POWER
INPUTS
V
2
CONTROL
IN2
SHDN
INPUT
3
GND
4
S8 PACKAGE
8-LEAD PLASTIC SO
SEE APPLICATION INFORMATION SECTION
T
= 125°C, θJA = 90°C/W
JMAX
8
7
6
5
OUT
BACKUP
DROPOUT
BIASCOMP
LOGIC
OUTPUTS
LT1579CS8-3
LT1579CS8-3.3
LT1579CS8-5
S8 PART MARKING
Consult factory for Industrial and Military grade parts.
2
ORDER PART
NUMBER
15793
157933
15795
TOP VIEW
V
1
IN1
POWER
INPUTS
V
2
CONTROL
IN2
SHDN
INPUT
SEE APPLICATION INFORMATION SECTION
3
GND
4
S8 PACKAGE
8-LEAD PLASTIC SO
T
= 125°C, θJA = 90°C/W
JMAX
8
7
6
5
OUT
ADJ
BACKUP
BIASCOMP
LOGIC
OUTPUT
ORDER PART
NUMBER
LT1579CS8
S8 PART MARKING
1579
LT1579
ELECTRICAL CHARACTERISTICS
PARAMETERCONDITIONSMINTYPMAXUNITS
Regulated OutputLT1579-3 V
Voltage (Note 1)4V < V
LT1579-3.3 V
LT1579-5 V
Adjust Pin VoltageLT1579V
Line RegulationLT1579-3 ∆V
LT1579-3.3 ∆V
LT1579-5 ∆V
LT1579∆V
Load RegulationLT1579-3 V
LT1579-3.3 V
LT1579-5 V
LT1579V
Dropout VoltageI
(Notes 3, 4)I
V
= V
IN2
=
IN1
V
OUT(NOMINAL)
Ground Pin CurrentI
(Note 5)I
V
= V
IN2
=
+ 1V
IN1
V
OUT(NOMINAL)
Standby CurrentI
(Note 6) I
= 0mAI
LOAD
Shutdown ThresholdV
Shutdown Pin CurrentV
= 10mA, TJ = 25°C0.100.28V
LOAD
= 10mA●0.39V
LOAD
I
= 50mA, TJ = 25°C0.180.35V
LOAD
I
= 50mA●0.45V
LOAD
I
= 150mA, TJ = 25°C0.250.47V
LOAD
I
= 150mA●0.60V
LOAD
I
= 300mA, TJ = 25°C0.340.60V
LOAD
I
= 300mA●0.75V
LOAD
= 0mA, TJ = 25°C50100µA
LOAD
= 0mA●400µA
LOAD
I
= 1mA, TJ = 25°C100200µA
LOAD
I
= 1mA●500µA
LOAD
I
= 50mA●0.71.5mA
LOAD
I
= 150mA●24 mA
LOAD
I
= 300mA●5.812mA
LOAD
: V
VIN2
IN1
: V
VIN1
IN1
= Off to On●0.92.8V
OUT
V
= On to Off●0.250.75V
OUT
= 0V●1.35µA
SHDN
(Note 7)
Quiescent Current inI
Shutdown (Note 9)I
: V
VIN1
: V
VIN2
I
: V
SRC
IN1
IN1
IN1
IN1
IN1
4.3V < V
IN1
6V < V
IN1
3.7V < V
IN1
IN1
IN1
IN1
IN1
V
IN1
IN1
V
IN1
IN1
V
IN1
IN1
V
IN1
= 20V, V
= V
OUT(NOMINAL)
= 20V, V
= 6V, V
= V
= 20V, V
IN2
= V
= V
= V
= V
= V
= V
= V
= V
= V
= V
= V
= V
= 3.5V, I
IN2
< 20V, 4V < V
IN1
= 3.8V, I
IN2
IN1
= 5.5V, I
IN2
< 20V, 6V < V
IN1
= 3.2V, I
IN2
IN1
LOAD
LOAD
< 20V, 4.3V < V
LOAD
LOAD
< 20V, 3.7V < V
= 3.5V to 20V, ∆V
= 3.8V to 20V, ∆V
= 5.5V to 20V, ∆V
= 3.2V to 20V, ∆V
= 4V, ∆I
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
= V
= 4V, ∆I
= 4.3V, ∆I
= 4.3V, ∆I
= 6V, ∆I
= 6V, ∆I
= 3.7V, ∆I
= 3.7V, ∆I
OUT(NOMINAL)
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
LOAD
+ 0.5V, V
= 6V, V
IN2
= 20V, V
IN2
SHDN
SHDN
= 0V3µA
SHDN
= 1mA, TJ = 25°C2.9503.0003.050V
< 20V, 1mA < I
IN2
< 300mA●2.9003.0003.100V
LOAD
= 1mA, TJ = 25°C3.2503.3003.350V
< 20V, 1mA < I
IN2
< 300mA●3.2003.3003.400V
LOAD
= 1mA, TJ = 25°C4.9255.0005.075V
< 20V, 1mA < I
IN2
< 300mA●4.8505.0005.150V
LOAD
= 1mA, TJ = 25°C (Note 2)1.4751.5001.525V
< 20V, 1mA < I
IN2
= 3.5V to 20V, I
IN2
= 3.8V to 20V, I
IN2
= 5.5V to 20V, I
IN2
= 3.2V to 20V, I
IN2
< 300mA●1.4501.5001.550V
LOAD
= 1mA●1.510mV
LOAD
= 1mA●1.510mV
LOAD
= 1mA●1.510mV
LOAD
= 1mA (Note 2)●1.510mV
LOAD
= 1mA to 300mA, TJ = 25°C312mV
= 1mA to 300mA●25mV
= 1mA to 300mA, TJ = 25°C312mV
= 1mA to 300mA●25mV
= 1mA to 300mA, TJ = 25°C515mV
= 1mA to 300mA●35mV
= 1mA to 300mA, TJ = 25°C (Note 2)210mV
= 1mA to 300mA●20mV
+ 0.5V, VSS = Open (HI)●3.37.0µA
= 20V, VSS = 0V●2.07.0µA
IN2
= 0V●512 µA
= 0V●512 µA
3
LT1579
ELECTRICAL CHARACTERISTICS
PARAMETERCONDITIONSMINTYPMAXUNITS
Adjust Pin Bias CurrentTJ = 25°C630 nA
(Notes 2, 7)
Minimum Input VoltageI
(Note 8)
Minimum Load CurrentLT1579V
Secondary SelectSwitch from V
ThresholdSwitch from
Secondary Select PinVSS = 0V●11.5µA
Current (Note 7)
Low-Battery Trip ThresholdV
Low-Battery ComparatorV
Hysteresis
Low-Battery ComparatorV
Bias Current (Notes 7, 10)
Logic Flag Output VoltageI
Ripple RejectionV
Current LimitV
Input Reverse LeakageV
Current
Reverse Output CurrentLT1579-3V
= 0mA●2.73.2V
LOAD
= V
IN1
IN2
VIN1
= V
IN1
IN1
IN1
SINK
I
SINK
IN1
f
RIPPLE
IN1
IN1
LT1579-3.3 V
LT1579-5V
= V
IN2
OUT(NOMINAL)
= V
= 6V, I
IN2
= V
= 6V, V
IN2
= 20µA●0.170.45V
= 5mA●0.971.3V
– V
= V
OUT
= 120Hz, I
= V
= V
IN2
OUT(NOMINAL)
= V
= –20V, V
IN2
OUT
OUT
OUT
= 3.2V●3µA
IN2
to V
to V
IN1
IN2
●1.22.8V
●0.250.75V
+ 1V, High-to-Low Transition●1.4401.5001.550V
= 20µA (Note 11)●1830mV
LBO
= 1.4V, TJ = 25°C25nA
LBI
– V
IN2
LOAD
= 3V, V
= 3.3V, V
= 5V, V
= 1.2V (Avg), V
OUT
= 150mA
+ 1V, ∆V
OUT
= 0V●1.0mA
OUT
= V
IN1
IN1
= 0V312µA
IN2
= V
IN1
= 0V312µA
IN2
= V
= 0V312µA
IN2
RIPPLE
= 0.5V
P-P
5570dB
= –0.1V●320400mA
The ● denotes specifications which apply over the full operating
temperature range.
Note 1: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, output current must be limited.
When operating at maximum output current, the input voltage range must
be limited.
Note 2: The LT1579 (adjustable version) is tested and specified with the
adjust pin connected to the output pin and a 3µA DC load.
Note 3: Dropout voltage is the minimum input-to-output voltage
differential required to maintain regulation at the specified output current.
In dropout, the output voltage will be equal to V
IN
– V
DROPOUT
.
Note 4: To meet the requirements for minimum input voltage, the LT1579
(adjustable version) is connected with an external resistor divider for a
3.3V output voltage (see curve of Minimum Input Voltage vs Temperature
in the Typical Performance Characteristics). For this configuration,
V
OUT(NOMINAL)
Note 5: Ground pin current will rise at T
= 3.3V.
> 75°C. This is due to internal
J
circuitry designed to compensate for leakage currents in the output
transistor at high temperatures. This allows quiescent current to be
minimized at lower temperatures, yet maintain output regulation at high
temperatures with light loads. See the curve of Quiescent Current vs
Temperature in the Typical Performance Characteristics.
Note 6: Standby current is the minimum quiescent current for a given
input while the other input supplies the load and bias currents.
Note 7: Current flow is out of the pin.
Note 8: Minimum input voltage is the voltage required on either input to
maintain the 1.5V reference for the error amplifier and low-battery
comparators.
Note 9: Total quiescent current in shutdown will be approximately equal to
+ I
– I
I
VIN1
VIN2
conditions. I
. Both I
SRC
is specified under the condition that V
VIN1
is specified under the condition that V
VIN1
and I
are specified for worst-case
VIN2
IN2
> V
IN1
. I
> V
IN1
is drawn from the
SRC
IN2
and I
VIN2
highest input voltage only. For normal operating conditions, the quiescent
current of the input with the lowest input voltage will be equal to the
specified quiescent current minus I
6V then I
= 5µA and I
VIN1
= 5µA – 3µA = 2µA.
VIN2
. For example, if V
SRC
= 20V, V
IN1
IN2
=
Note 10: The specification applies to both inputs independently
(LBI1, LBI2).
Note 11: Low-battery comparator hysteresis will change as a function of
current in the low-battery comparator output. See the curve of Low-Battery
Comparator Hysteresis vs Sink Current in the Typical Performance
Characteristics.
4
W
V
IN1
– V
OUT
(V)
0
INPUT CURRENT (µA)
20
40
60
10
30
50
00.20.40.6
1579 G07
0.8–0.1–0.20.10.30.50.7
I
IN2
I
IN1
V
OUT
= 5V
V
IN2
= 6V
I
LOAD
= 0
TEMPERATURE (°C)
–50
OUTPUT VOLTAGE (V)
3.36
25
1579 G04
3.30
2.26
–25050
2.24
2.22
3.38
3.34
3.32
2.28
75 100 125
I
LOAD
= 1mA
TEMPERATURE (°C)
–50
0
QUIESCENT CURRENT (µA)
10
30
40
50
100
0
50
75
1579 G02
20
80
90
60
70
–25
25
100
125
VIN = 6V
R
L
= ∞ (FIXED)
R
L
= 500k (ADJUSTABLE)
OPERATING
QUIESCENT
CURRENT
STANDBY
QUIESCENT
CURRENT
U
TYPICAL PERFORMANCE CHARACTERISTICS
LT1579
Guaranteed Dropout Voltage
0.8
= TEST POINTS
0.7
0.6
0.5
0.4
0.3
DROPOUT VOLTAGE (V)
0.2
0.1
0
0
TJ ≤ 125°C
100150200
50
OUTPUT CURRENT (mA)
Quiescent Current in Shutdown
7
V
= 20V
IN1
= 6V
V
IN2
6
= 0V
V
SHDN
5
4
3
2
QUIESCENT CURRENT (µA)
1
0
–50
–250
2575
TEMPERATURE (°C)
TJ = 25°C
250300
1579 G35
I
VIN1
I
VIN2
50100 125
1579 G36
Dropout Voltage
0.7
A: I
= 300mA
LOAD
= 150mA
B: I
LOAD
0.6
0.5
0.4
0.3
0.2
DROPOUT VOLTAGE (V)
0.1
0
–50
C: I
LOAD
D: I
LOAD
E: I
LOAD
F: I
LOAD
–250
= 100mA
= 50mA
= 10mA
= 1mA
50100 125
2575
TEMPERATURE (°C)
A
B
C
D
E
F
1579 G01
Quiescent Current
LT1579-3 Output VoltageLT1579-3.3 Output Voltage
3.08
I
= 1mA
LOAD
3.06
3.04
3.02
3.00
2.98
OUTPUT VOLTAGE (V)
2.96
2.94
2.92
–25050
–50
25
TEMPERATURE (°C)
75 100 125
1579 G03
5.12
5.09
5.06
5.03
5.00
4.97
OUTPUT VOLTAGE (V)
4.94
4.91
4.88
LT1579-5 Output Voltage
I
= 1mA
LOAD
–25050
–50
25
TEMPERATURE (°C)
75 100 125
1579 G05
Adjust Pin Voltage
1.54
I
= 1mA
LOAD
1.53
1.52
1.51
1.50
1.49
1.48
ADJUST PIN VOLTAGE (V)
1.47
1.46
–25050
–50
TEMPERATURE (°C)
Input Current
25
75 100 125
1579 G05
5
LT1579
V
IN1
– V
OUT
(V)
0
INPUT CURRENT (mA)
GROUND PIN CURRENT (µA)
4
8
12
2
6
10
0
200
400
600
100
300
500
00.20.40.6
1579 G09
0.8–0.1–0.20.10.30.50.7
I
IN2
I
IN1
V
OUT
= 5V
V
IN2
= 6V
I
LOAD
= 10mA
I
GND
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Input and Ground Pin Current
1.2
I
IN2
1.0
0.8
0.6
0.4
INPUT CURRENT (mA)
0.2
0
I
IN1
I
00.20.40.6
V
– V
IN1
OUT
GND
(V)
V
OUT
V
IN2
I
LOAD
= 5V
= 6V
= 1mA
1579 G08
300
250
GROUND PIN CURRENT (µA)
200
150
100
50
0
0.8–0.1–0.20.10.30.50.7
Input and Ground Pin Current
Input and Ground Pin CurrentInput and Ground Pin Current
60
I
IN2
50
40
30
20
INPUT CURRENT (mA)
10
1.2
I
IN1
I
GND
V
OUT
V
IN2
I
LOAD
= 5V
= 6V
= 50mA
1.0
GROUND PIN CURRENT (mA)
0.8
0.6
0.4
0.2
120
I
IN2
100
80
60
40
INPUT CURRENT (mA)
20
I
IN1
V
V
I
LOAD
I
GND
OUT
IN2
= 5V
= 6V
= 100mA
3.0
2.5
GROUND PIN CURRENT (mA)
2.0
1.5
1.0
0.5
0
Input and Ground Pin Current
160
I
IN2
140
120
100
80
60
INPUT CURRENT (mA)
40
20
0
00.20.40.6
V
– V
(V)
IN1
OUT
00.20.40.6
V
– V
(V)
IN1
OUT
I
V
OUT
V
IN2
I
LOAD
IN1
= 6V
1579 G10
I
GND
= 5V
= 150mA
1579 G12
0
0.8–0.1–0.20.10.30.50.7
4.0
3.5
GROUND PIN CURRENT (mA)
3.0
2.5
2.0
1.5
1.0
0.5
0
0.8–0.1–0.20.10.30.50.7
0
00.20.40.6
V
– V
IN1
OUT
Input and Ground Pin Current
350
300
250
200
150
100
INPUT CURRENT (mA)
50
I
IN2
V
= 5V
OUT
= 6V
V
IN2
= 300mA
I
LOAD
0
00.20.40.6
V
– V
IN1
OUT
(V)
(V)
0
0.8–0.1–0.20.10.30.50.7
1579 G11
I
GND
1579 G13
14
12
GROUND PIN CURRENT (mA)
10
8
6
4
2
0
0.8– 0.1–0.20.10.30.50.7
I
IN1
6
W
TEMPERATURE (°C)
–50
LOGIC FLAG OUTPUT VOLTAGE (V)
0.8
1.0
1.2
2575
1579 G21
0.6
0.4
–250
50100 125
0.2
0
I
SINK
= 5mA
I
SINK
= 20µA
TEMPERATURE (°C)
–50 –25
0
SHUTDOWN PIN THRESHOLD (V)
0.4
1.0
0
50
75
1579 G15
0.2
0.8
0.6
25
100
125
I
LOAD
= 1mA
TEMPERATURE (°C)
–50
0
SECONDARY SELECT PIN THRESHOLD (V)
0.2
0.6
0.8
1.0
2.0
1.4
0
50
75
1579 G18
0.4
1.6
1.8
1.2
–25
25
100
125
I
LOAD
= 300mA
I
LOAD
= 1mA
U
TYPICAL PERFORMANCE CHARACTERISTICS
LT1579
Ground Pin CurrentMinimum Input Voltage
8
V
= V
= V
IN1
IN2
7
6
5
4
3
2
GROUND PIN CURRENT (mA)
1
0
0
OUT(NOMINAL)
50100200
OUTPUT CURRENT (mA)
150
+ 1V
250
300
1579 G37
3.0
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
MINIMUM INPUT VOLTAGE (V)
2.1
2.0
–50
0
–25
TEMPERATURE (°C)
Secondary Select Threshold
Shutdown Pin Current
2.5
V
= 0V
SHDN
2.0
1.5
1.0
0.5
SHUTDOWN PIN CURRENT (µA)
0
–50 –25
0
TEMPERATURE (°C)
50
25
75
100
125
1579 G16
(Switch to V
2.0
I
LOAD
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
SECONDARY SELECT PIN THRESHOLD (V)
0
–50
–25
IN2
= 1mA
0
TEMPERATURE (°C)
Shutdown Pin Threshold
50
25
75
100
125
1579 G14
Secondary Select Threshold
)
50
25
75
100
125
1579 G17
(Switch to V
IN1
)
Secondary Select Pin Current
1.0
VSS = 0V
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
SECONDARY SELECT PIN CURRENT (µA)
0
–50
0
–25
TEMPERATURE (°C)
Logic Flag Output Voltage
(Output Low)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
LOGIC FLAG OUTPUT VOLTAGE (V)
0.1
50
25
75
100
125
1579 G19
0
1µA10µA100µA1mA10mA
LOGIC FLAG SINK CURRENT
1579 G20
Logic Flag Output Voltage
(Output Low)
7
LT1579
TEMPERATURE (°C)
–50
0.4
0.5
0.7
2575
1579 G38
0.3
0.2
–250
50100 125
0.1
0
0.6
CURRENT LIMIT (A)
V
IN1
= V
IN2
= V
OUT(NOMINAL)
+ 1V
∆V
OUT
= –0.1V
TYPICAL
GUARANTEED
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Logic Flag Input Current
(Output High)
25
20
15
10
5
LOGIC FLAG INPUT CURRENT (mA)
0
13
2
0
4
LOGIC FLAG VOLTAGE (V)
Low-Battery Comparator
Hysteresis
25
I
= 50µA
LBO(SINK)
20
15
10
5
COMPARATOR HYSTERESIS (mV)
0
–50 –25
0
25
TEMPERATURE (°C)
25
20
15
10
5
CONTROL PIN INPUT CURRENT (mA)
7
59
6
8
1579 G22
0
Reverse Output Current
25
20
15
10
5
REVERSE OUTPUT CURRENT (µA)
50
75
100
125
1579 G25
0
0
Control Pin Input Current
13
2
0
CONTROL PIN VOLTAGE (V)
T
= 25°C
J
= V
V
CURRENT FLOWS INTO
OUTPUT PIN
= 0V
IN1
IN2
LT1579-3.3
LT1579-3
13
2
OUTPUT VOLTAGE (V)
59
6
4
LT1579-5
59
6
4
7
8
1579 G23
7
8
1579 G26
Low-Battery Comparator
Hysteresis
20
15
10
5
COMPARATOR HYSTERESIS (mV)
0
10
0
20
I
SINK CURRENT (µA)
LBO
Reverse Output Current
20
V
= V
= 0V
IN1
18
16
14
12
10
8
6
4
REVERSE OUTPUT CURRENT (µA)
2
0
–50
IN2
V
= 3V (LT1579-3)
OUT
= 3.3V (LT1579-3.3)
V
OUT
= 5V (LT1579-5)
V
OUT
0
–25
TEMPERATURE (°C)
25
30
40
50
1579 G24
50
75
100
125
1579 G27
8
Adjust Pin Input Current
1.0
TJ = 25°C
0.9
= V
V
0.8
0.7
0.6
0.5
0.4
0.3
0.2
ADJUST PIN INPUT CURRENT (mA)
0.1
0
0
= 0V
IN1
IN2
0.21.8
0.4
0.6
0.8
1.0
ADJUST PIN VOLTAGE (V)
1.2
1.4
1.6
1579 G28
2.0
0.6
V
= 0V
OUT
0.5
0.4
0.3
0.2
CURRENT LIMIT (A)
0.1
0
0
12
467
35
INPUT VOLTAGE (V)
Current LimitCurrent Limit
1579 G29
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Ripple Rejection
100
I
= 150mA
LOAD
90
= 6V + 50mV
V
IN
80
70
60
50
40
30
RIPPLE REJECTION (dB)
20
10
0
10
1001k10k100k1M
RIPPLE
RMS
FREQUENCY (Hz)
C
= 47µF
OUT
SOLID
TANTALUM
C
= 4.7µF
OUT
SOLID
TANTALUM
1579 G30
Load Regulation
0
LT1579
–2
–4
LT1579-5
–6
–8
–10
LOAD REGULATION (mV)
–12
–14
–16
–25050
–50
TEMPERATURE (°C)
∆I
LOAD
25
= 1mA TO 300mA
LT1579-3
LT1579-3.3
75 100 125
1579 G40
6V
V
IN1
5V
V
OUT
50mV/DIV
LT1579
LT1579-5 “Hot” Plugging and
Unplugging Transient Response
UNPLUG
V
IN1
REPLACE
V
IN1
LT1579-5 Transient Response
100
50
0
–50
DEVIATION (mV)LOAD CURRENT (mA)
OUTPUT VOLTAGE
–100
100
75
50
25
0
0
VIN = 6V
= 1µF CERAMIC
C
IN
= 4.7µF TANTALUM
C
OUT
100
150
50450
200
250
TIME (µs)
300
350
400
500
1579 G33
UUU
PIN FUNCTIONS
V
: The primary power source is connected to V
IN1
bypass capacitor is required on this pin if the device is
more than six inches away from the main input filter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1µF to 10µF is sufficient.
V
: The secondary power source is connected to V
IN2
A bypass capacitor is required on this pin if the device is
more than six inches away from the main input filter
capacitor. In general, the output impedance of a battery
IN1
. A
IN2
.
LT1579-5 Transient Response
100
50
0
–50
DEVIATION (mV)LOAD CURRENT (mA)
OUTPUT VOLTAGE
–100
300
200
100
0
VIN = 6V
= 1µF CERAMIC
C
IN
= 22µF TANTALUM
C
OUT
0.2
0.3
0.10.9
0.4
0.5
TIME (ms)
0.6
0.7
0.8
1,0
1579 G34
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1µF to 10µF is sufficient.
OUT: The output supplies power to the load. A minimum
output capacitor of 4.7µF is required to prevent oscilla-
tions. Larger output capacitors will be required for applications with large transient loads to limit peak voltage
transients.
ADJ: For the adjustable LT1579, this is the input to the
error amplifier. This pin is internally clamped to 7V and
–0.6V (one VBE). It has a bias current of 6nA which flows
9
LT1579
UUU
PIN FUNCTIONS
out of the pin (see curve of Adjust Pin Bias Current vs
Temperature in the Typical Performance Characteristics).
A DC load of 3µ A is needed on the output of the adjustable
part to maintain regulation. The adjust pin voltage is 1.5V
referenced to ground and the output voltage range is 1.5V
to 20V.
SHDN: The shutdown pin is used to put the LT1579 into
a low power shutdown state. All functions are disabled if
the shutdown pin is pulled low. The output will be off, all
logic outputs will be high impedance and the voltage
comparators will be off when the shutdown pin is pulled
low. The shutdown pin is internally clamped to 7V and
– 0.6V (one VBE), allowing the shutdown pin to be driven
either by 5V logic or open collector logic with a pull-up
resistor. The pull-up resistor is only required to supply
the pull-up current of the open collector gate, normally
several microamperes. If unused, the shutdown pin can
be left open circuit. The device is active if the shutdown
pin is not connected.
SS: The secondary select pin forces the LT1579 to switch
power draw to the secondary input (V
active low. The current drawn out of V
3µA when this pin is pulled low. The secondary select pin
is internally clamped to 7V and – 0.6V (one VBE), allowing
the pin to be driven directly by either 5V logic or open
collector logic with a pull-up resistor. The pull-up resistor
is required only to supply the leakage current of the open
collector gate, normally several microamperes. If secondary select is not used, it can be left open circuit. The
LT1579 draws power from the primary first if the secondary select pin is not connected.
BACKUP: The backup flag is an open collector output
which pulls low when the LT1579 starts drawing power
from the secondary input (V
voltage is 1V when sinking 5mA, dropping to under
200mV at 20µA (see curve of Logic Flag Voltage vs
Current in the Typical Performance Characteristics). This
makes the BACKUP pin equally useful in driving both
bipolar and CMOS logic inputs with the addition of an
external pull-up resistor. It is also capable of driving
higher current devices, such as LEDs. This pin is inter-
). The BACKUP output
IN2
). This pin is
IN2
is reduced to
IN1
nally clamped to 7V and –0.6V (one VBE). If unused, this
pin can be left open circuit. Device operation is unaffected
if this pin is not connected.
DROPOUT: The dropout flag is an open collector output
which pulls low when both input voltages drop sufficiently for the LT1579 to enter the dropout region. This
signals that the output is beginning to go unregulated.
The DROPOUT output voltage is 1V when sinking 5mA,
dropping to under 200mV at 20µA (see curve of Logic
Flag Voltage vs Current in the Typical Performance Characteristics). This makes the DROPOUT pin equally useful
in driving both bipolar and CMOS logic inputs with the
addition of an external pull-up resistor. It is also capable
of driving higher current devices, such as LEDs. This pin
is internally clamped to 7V and –0.6V (one VBE). If
unused, this pin can be left open circuit. Device operation
is unaffected if this pin is not connected.
BIASCOMP: This is a compensation point for the internal
bias circuitry. It must be bypassed with a 0.01µ F capacitor for stability during the switch from V
LBI1: This is the noninvering input to low-battery comparator LB1 which is used to detect a low input/battery
condition. The inverting input is connected to a 1.5V
reference. The low-battery comparator input has 18mV of
hysteresis with more than 20µA of sink current on the
output (see Applications Information section). This pin is
internally clamped to 7V and –0.6 (one VBE). If not used,
this pin can be left open circuit, with no effect on normal
circuit operation. If unconnected, the pin will float to 1.5V
and the logic output of LB1 will be high impedance.
LBI2: This is the noninverting input to low-battery comparator LB2 which is used to detect a low input/battery
condition. The inverting input is connected to a 1.5V
reference. The low-battery comparator input has 18mV of
hysteresis with more than 20µA of sink current on the
output (see Applications Information section). This pin is
internally clamped to 7V and – 0.6V (one VBE). If not used,
this pin can be left open circuit, with no effect on normal
circuit operation. If unconnected, the pin will float to 1.5V
and the logic output of LB2 will be high impedance.
IN1
to V
IN2
.
10
PIN FUNCTIONS
LT1579
UUU
LBO1: This is the open collector output of the low-battery
comparator LB1. This output pulls low when the comparator input drops below the threshold voltage. The
LBO1 output voltage is 1V when sinking 5mA, dropping
to under 200mV at 20µ A (see curve of Logic Flag Voltage
vs Current in the Typical Performance Characteristics).
This makes the LBO1 pin equally useful in driving both
bipolar and CMOS logic inputs with the addition of an
external pull-up resistor. It is also capable of driving
higher current devices, such as LEDs. This pin is internally clamped to 7V and – 0.6V (one VBE). If unused, this
pin can be left open circuit. Device operation is unaffected
if this pin is not connected.
W
BLOCK DIAGRAM
V
IN1
V
IN2
LBO2: This is the open collector output of the low-battery
comparator LB2. This output pulls low when the comparator input drops below the threshold voltage. The
LBO2 output voltage is 1V when sinking 5mA, dropping
to under 200mV at 20µ A (see curve of Logic Flag Voltage
vs Current in the Typical Performance Characteristics).
This makes the LBO2 pin equally useful in driving both
bipolar and CMOS logic inputs with the addition of an
external pull-up resistor. It is also capable of driving
higher current devices, such as LEDs. This pin is
internally clamped to 7V and – 0.6V (one VBE). If unused,
this pin can be left open circuit. Device operation is
unaffected if this pin is not connected.
SHDN
BIASCOMP
LBI1
LBI2
SS
BIAS CURRENT
CONTROL
1.5V REFERENCE
V
OUT
DROPOUT
DETECT
INTERNAL
RESISTOR DIVIDER
FOR FIXED VOLTAGE
DEVICES ONLY
OUTPUT DRIVER
CONTROL
+
LB1
–
+
LB2
–
–
E/A
+
WARNING
FLAGS
ADJ
BACKUP
DROPOUT
LBO1
LBO2
1579 • BD
11
LT1579
U
WUU
APPLICATIONS INFORMATION
Device Overview
The LT1579 is a dual input, single output, low dropout
linear regulator. The device is designed to provide an
uninterruptible output voltage from two independent input
voltage sources on a priority basis. All of the circuitry
needed to switch smoothly and automatically between
inputs is incorporated in the device. All power supplied to
the load is drawn from the primary input (V
device senses that the primary input is failing. At this point
the LT1579 smoothly switches from the primary input to
the secondary input (V
) to maintain output regulation.
IN2
The device is capable of providing 300mA from either
input at a dropout voltage of 0.4V. Total quiescent current
when operating from the primary input is 50µA, which is
45µA from the primary input, 2µ A from the secondary and
a minimum input current of 3µ A which will be drawn from
the higher of the two input voltages.
A single error amplifier controls both output stages so
regulation remains tight regardless of which input is
providing power. Threshold levels for the error amplifier
and low-battery detectors are set by the internal 1.5V
reference. Output voltage is set by an internal resistor
divider for fixed voltage parts and an external divider for
adjustable parts. Internal bias circuitry powers the reference, error amplifier, output driver controls, logic flags
and low-battery comparators.
The LT1579 aids power management with the use of two
independent low-battery comparators and two status flags.
The low-battery comparators can be used to monitor the
input voltage levels. The BACKUP flag signals when any
power is being drawn from the secondary input and the
DROPOUT flag provides indication that both input voltages are critically low and the output is unregulated.
Additionally, the switch to the secondary input from the
primary can be forced externally through the use of the
secondary select pin (SS). This active low logic pin, when
pulled below the threshold, will cause power draw to
switch from the primary input to the secondary input.
Current flowing in the primary input is reduced to only a
few microamperes, while all power draw (load current and
bias currents) switches to the secondary. The LT1579 has
a low power shutdown state which shuts off all bias
) until the
IN1
currents and logic functions. In shutdown, quiescent
currents are 2µA from the primary input, 2µA from the
secondary input and an additional 3µA which is drawn
from the higher of the two input voltages.
Adjustable Operation
The adjustable version of the LT1579 has an output
voltage range of 1.5V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 1. The
device servos the output to maintain the voltage at the
adjust pin at 1.5V. The current in R1 is then equal to 1.5V/
R1 and the current in R2 is the current in R1 minus the
adjust pin bias current. The adjust pin bias current, 6nA at
25°C, flows out of the adjust pin through R1 to ground. The
output voltage can now be calculated using the formula:
R
2
VV
=+
OUTADJ
15 1
IR
()()
R
1
2.–
The value of R1 should be less than 500k to minimize the
error in the output voltage caused by adjust pin bias
current. With 500k resistors for both R1 and R2, the error
induced by adjust pin bias current at 25°C is 3mV or 0.1%
of the total output voltage. With appropriate value and
tolerance resistors, the error due to adjust pin bias current
may often be ignored. Note that in shutdown, the output is
turned off and the divider current is zero. The parallel
combination of R1 and R2 should be greater than 20k to
allow the error amplifier to start. In applications where the
minimum parallel resistance requirement cannot be met,
a 20k resistor may be placed in series with the adjust pin.
This introduces an error in the reference point for the
resistor divider equal to (I
OUT
ADJ
GND
Figure 1. Adjustable Operation
ADJ
R2
R1
)(20k).
C
V
OUT
+
FB
C
OUT
1579 • F01
12
LT1579
U
WUU
APPLICATIONS INFORMATION
A small capacitor placed in parallel with the top resistor
(R2) of the output divider is necessary for stability and
transient performance of the adjustable LT1579. The
impedance of CFB at 10kHz should be less than the value
of R1.
The adjustable LT1579 is tested and specified with the
output pin tied to the adjust pin and a 3µA load (unless
otherwise noted) for an output voltage of 1.5V. Specifications for output voltages greater than 1.5V are proportional to the ratio of the desired output voltage to 1.5V;
(V
/1.5V). For example, load regulation for an output
OUT
current change of 1mA to 300mA is –2mV typical at
V
= 1.5V. At V
OUT
V
12
15
Output Capacitance and Transient Response
The LT1579 is designed to be stable with a wide range of
output capacitors. The ESR of the output capacitor affects
stability, most notably with small capacitors. A minimum
output capacitor of 4.7µF with an ESR of 3Ω or less is
recommended to prevent oscillations. Smaller value capacitors may be used, but capacitors which have a low
ESR (i.e. ceramics) may need a small series resistor added
to bring the ESR into the range suggested in Table 1. The
LT1579 is a micropower device and output transient
response is a function of output capacitance. Larger
values of output capacitance decrease the peak deviations
and provide improved output transient response for larger
load current changes. Bypass capacitors, used to decouple
individual components powered by the LT1579, will
increase the effective output capacitor value.
Table 1. Suggested ESR Range
OUTPUT CAPACITANCESUGGESTED ESR RANGE
––
216
()
V
.
1.5µF1Ω to 3Ω
2.2µF0.5Ω to 3Ω
3.3µF0.2Ω to 3Ω
≥4.7µF0Ω to 3Ω
= 12V, load regulation is:
OUT
mVmV
=
BIASCOMP Pin Compensation
The BIASCOMP pin is a connection to a compensation
point for the internal bias circuitry. It must be bypassed
with a 0.01µ F capacitor for stability during the switch from
V
to V
IN1
“Hot” Plugging and Unplugging of Inputs
The LT1579 is designed to maintain regulation even if one
of the outputs is instantaneously removed. If the primary
input is supplying load current, removal and insertion of
the secondary input creates no noticeable transient at the
output. In this case, the LT1579 continues to supply
current from the primary; no switching is required. However, when load current is being supplied from the primary
input and it is removed, load current must be switched
from the primary to the secondary input. In this case, the
LT1579 sees the input capacitor as a rapidly discharging
battery. If it discharges too quickly, the LT1579 does not
have ample time to switch over without a large transient
occurring at the output. The input capacitor must be large
enough to supply load current during the transition from
primary to secondary input. Replacement of the primary
creates a smaller transient on the output because both
inputs are present during the transition. For a 100mA load,
input and output capacitors of 10µ F will limit peak output
deviations to less than 50mV. See the “Hot” Plugging and
Unplugging Transient Response in the Typical Performance Characteristics. Proportionally larger values for
input and output capacitors are needed to limit peak
deviations on the output when delivering larger load
currents.
Standby Mode
“Standby” mode is where one input draws a minimum
quiescent current when the other input is delivering all
bias and load currents . In this mode, the standby current
is the quiescent current drawn from the standby input. The
secondary input will be in standby mode, when the primary input is delivering all load and bias currents. When
the secondary input is in standby mode the current drawn
from the secondary input will be 3µ A if V
IN2
.
> V
IN1
and 5µ A
IN2
13
LT1579
–
+
R2
R1
1.5V
R4
D1
R3
V
TRIP
V
OUT
LBI
LBO
I
SINK
LTC1579 • F02
R2 = (V
TRIP
– 1.5V)
R1
1.5V
()
HYSTERESIS = V
HYST
1 +
FOR I
SINK
≥ 20µA, V
HYST
= 18mV,
FOR I
SINK
< 20µA, SEE THE TYPICAL
PERFORMANCE CHARACTERISTICS
R2
R1
()
R3 =
(1.5V + V
HYST
– 0.6V – V
LBO
)(R2)
V
HYST(ADDED)
FOR ADDED HYSTERESIS
U
WUU
APPLICATIONS INFORMATION
if V
>V
IN2
automatically go into standby mode as the primary input
drops below the output voltage. The primary input can also
be forced into standby mode by asserting the SS pin. In
either case, the current drawn from the primary input is
reduced to a maximum of 7µA.
Shutdown
The LT1579 has a low power shutdown state where all
functions of the device are shut off. The device is put into
shutdown mode when the shutdown pin is pulled below
0.7V. The quiescent current in shutdown has three components: 2µ A drawn from the primary, 2µA drawn from the
secondary and 3µ A which is drawn from the higher of the
two inputs.
Protecting Batteries Using Secondary Select (SS)
Some batteries, such as lithium-ion cells, are sensitive to
deep discharge conditions. Discharging these batteries
below a certain threshold severely shortens battery life. To
prevent deep discharge of the primary cells, the LT1579
secondary select (SS) pin can be used to switch power
draw from the primary input to the secondary. When this
pin is pulled low, current out of the primary is reduced to
2µA. A low-battery detector with the trip point set at the
critical discharge point can signal the low battery condition and force the switchover to the secondary as shown
in Figure 2. The second low-battery comparator can be
used to set a latch to shutdown the LT1579 (see the Typical
Applications).
, so typically only 3µ A. The primary input will
IN1
Low-Battery Comparators
There are two independent low-battery comparators in the
LT1579. This allows for individual monitoring of each
input. The inverting inputs of both comparators are connected to an internal 1.5V reference. The low-battery
comparator trip point is set by an external resistor divider
as shown in Figure 3. The current in R1 at the trip point is
1.5V/R1. The current in R2 is equal to the current in R1.
The low-battery comparator input bias current, 2nA flowing out of the pin, is negligible and may be ignored. The
value of R1 should be less than 1.5M in order to minimize
errors in the trip point. The value of R2 for a given trip point
is calculated using the formulas in Figure 3.
The low-battery comparators have a small amount of
hysteresis built-in. The amount of hysteresis is dependent
upon the output sink current (I
) when the comparator
SINK
is tripped low. At no load, comparator hysteresis is zero,
increasing to a maximum of 18mV for sink currents above
20µ A. See the curve of Low-Battery Comparator Hysteresis in the Typical Performance Characteristics. If larger
amounts of hysteresis are desired, R3 and D1 can be
added. D1 can be any small diode, typically a 1N4148.
Calculating V
can be done using a load line on the curve
LBO
of Logic Flag Output Voltage vs Sink Current in the Typical
Performance Characteristics.
Figure 2. Connecting SS to Low-Battery Detector
Output to Prevent Damage to Batteries
14
V
CC
R
P
LBO
SS
GND
1579 F02
Figure 3. Low-Battery Comparator Operation
LT1579
U
WUU
APPLICATIONS INFORMATION
Example: The low-battery detector must be tripped at a
terminal voltage of 5.5V. There is a 100k pull-up resistor
to 5V on the output of the comparator and 200mV of
hysteresis is needed to prevent chatter. With a 1M resistor
for R1, what other resistor values are needed?
Using the formulas in Figure 3,
VVM
55151
R
15
.
.–.
()
Use a standard value of 2.7MΩ. With the 100k pull-up
resistor, this gives a sink current and logic flag voltage of
approximately 45µA at 0.4V. The hysteresis in this case
will be:
HysteresismV
An additional 133mV of hysteresis is needed, so a resistor
and diode must be added. The value of R3 will be:
VmV V VM
1518060427
+
.–.–..
()
R
A standard value of 10MΩ can be used. The additional
current flowing through R3 into the comparator output is
negligible and can usually be ignored
Ω
()
=Ω
V
.
27
M
1
133
M
mV
M2
267=
.
Ω
67
=181
mV=+
Ω
Ω
()
10 5=
=Ω
M3
.
current supplied to the load from each input. Normal
output deviation during transient load conditions (with
sufficient input voltages) will not set the status flags.
Timing Diagram
The timing diagram for the 5V dual battery supply is shown
in Figure 4. The schematic is the same as the 5V Dual
Battery Supply on the front of the data sheet. All logic flag
outputs have 100k pull-up resistors added. Note that there
is no time scale for the timing diagram. The timing diagram
is meant as a tool to help in understanding basic operation
of the LT1579. Actual discharge rates will be a function of
the load current and the type of batteries used. The load
current used in the example was 100mA DC.
ABCDE
6V
V
IN1
5V
6V
V
IN2
5V
5V
V
OUT
4.8V
100mA
Logic Flags
The low-battery comparator outputs and the status flags
of the LT1579 are open collector outputs capable of
sinking up to 5mA. See the curve of Logic Flag Output
Voltage vs. Current in the Typical Performance Characteristics.
There are two status flags on the LT1579. The BACKUP
flag and the DROPOUT flag provide information on which
input is supplying power to the load and give early warning
of loss of output regulation. The BACKUP flag goes low
when the secondary input begins supplying power to the
load. The DROPOUT flag signals the dropout condition on
both inputs, warning of an impending drop in output
voltage. The conditions that set either status flag are
determined by input to output voltage differentials and
I
IN1
100mA
I
IN2
LB01
BACKUP
LB02
DROPOUT
0
0
1
0
1
0
1
0
1
0
Figure 4. Basic Dual Battery Timing Diagram
LTC1579 • F03
15
LT1579
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APPLICATIONS INFORMATION
Five milestones are noted on the timing diagram. Time A
is where the primary input voltage drops enough to trip the
low-battery detector LB1. The trip threshold for LB1 is set
at set at 5.5V, slightly above the dropout voltage of the
primary input. At time B, the BACKUP flag goes low,
signaling the beginning of the transition from the primary
source to the secondary source. Between times B and C,
the input current makes a smooth transition from V
V
. By time C, the primary battery has dropped below the
IN2
point where it can deliver useful current to the output. The
primary input will still deliver a small amount of current to
the load, diminishing as the primary input voltage drops.
By time D, the secondary battery has dropped to a low
enough voltage to trip the second low-battery detector,
LB2. The trip threshold for LB2 is also set at 5.5V, slightly
above where the secondary input reaches dropout. At time
E, both inputs are low enough to cause the LT1579 to enter
dropout, with the DROPOUT flag signaling the impending
loss of output regulation. After time E, the output voltage
drops out of regulation.
Some interesting things can be noted on the timing
diagram. The amount of current available from a given
input is determined by the input/output voltage differential. As the differential voltage drops, the amount of
current drawn from the input also drops, which slows the
discharge of the battery. Dropout detection circuitry will
maintain the maximum current draw from the input for the
given input/output voltage differential. In the case shown,
this causes the current drawn from the primary input to
approach zero, though never actually dropping to zero.
Note that the primary begins to supply significant current
again when the output drops out of regulation. This occurs
because the input/output voltage differential of the primary input increases as the output voltage drops. The
LT1579 will automatically maximize the power drawn
from the inputs to maintain the highest possible output
voltage.
Thermal Considerations
The power handling capability of the LT1579 is limited by
the maximum rated junction temperature (125°C). Power
dissipated is made up of two components:
IN1
to
1. The output current from each input multiplied by the
respective input to output voltage differential:
(I
)(VIN – V
OUT
2. Ground pin current from the associated inputs multiplied by the respective input voltage: (I
If the primary input is not in dropout, all significant power
dissipation is from the primary input. Conversely, if SS has
been asserted to minimize power draw from the primary,
all significant power dissipation will be from the secondary. When the primary input enters dropout, calculation of
power dissipation requires consideration of power dissipation from both inputs. Worst-case power dissipation is
found using the worst-case input voltage from either input
and the worst-case load current.
Ground pin current is found by examining the Ground Pin
Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two
components above for the input supplying power to the
load. Power dissipation from the other input is negligible.
The LT1579 has internal thermal limiting designed to
protect the device during overload conditions. For continuous normal load conditions, the maximum junction
temperature rating of 125°C must not be exceeded. It is
important to give careful consideration to all sources of
thermal resistance from junction to ambient. Additional
heat sources nearby must also be considered.
Heating sinking for the device is accomplished by using
the heat spreading capabilities of the PC board and its
copper traces. Copper board stiffeners and plated throughholes can also be used to spread the heat. All ground pins
on the LT1579 are fused to the die paddle for improved
heat spreading capabilities.
The following tables list thermal resistances for each package. Measured values of thermal resistance for several
different board sizes and copper areas are listed for each
package. All measurements were taken in still air on 3/32”
FR-4 board with one ounce copper. All ground leads were
connected to the ground plane. All packages for the
LT1579 have all ground leads fused to the die attach
paddle to lower thermal resistance. Typical thermal
OUT
) and
GND
)(VIN).
16
LT1579
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APPLICATIONS INFORMATION
resistance from the junction to a ground lead is 40°C/W for
16-lead SSOP, 32°C/W for 16-lead SO and 35°C/W for
8-lead S0.
Table 2. 8-Lead SO Package (S8)
COPPER AREA
TOPSIDE*BACKSIDEBOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm2500 sq mm73°C/W
1000 sq mm 2500 sq mm2500 sq mm75°C/W
225 sq mm 2500 sq mm2500 sq mm80°C/W
100 sq mm 2500 sq mm2500 sq mm90°C/W
*Device is mounted on topside.
Table 3. 16-Lead SO Package (S)
COPPER AREA
TOPSIDE*BACKSIDEBOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm2500 sq mm55°C/W
1000 sq mm 2500 sq mm2500 sq mm58°C/W
225 sq mm 2500 sq mm2500 sq mm60°C/W
100 sq mm 2500 sq mm2500 sq mm68°C/W
*Device is mounted on topside.
Table 4. 16-Lead SSOP Package (GN)
COPPER AREA
TOPSIDE*BACKSIDEBOARD AREA (JUNCTION-TO-AMBIENT)
2500 sq mm 2500 sq mm2500 sq mm70°C/W
1000 sq mm 2500 sq mm2500 sq mm75°C/W
225 sq mm 2500 sq mm2500 sq mm80°C/W
100 sq mm 2500 sq mm2500 sq mm95°C/W
*Device is mounted on topside.
Calculating Junction Temperature
Example: Given an output voltage of 5V, an input voltage
range of 5V to 7V for V
and 8V to 10V for V
IN1
output current range of 10mA to 150mA and a maximum
ambient temperature of 50°C, what will the maximum
junction temperature be?
When run from the primary input, current drawn from the
secondary input is negligible and worst-case power dissipation will be:
(I
OUT(MAX)
)(V
IN1(MAX)
– V
OUT
Where:
I
OUT(MAX)
V
IN1(MAX)
I
GND
at (I
= 150mA
= 7V
= 150mA, V
OUT
IN1
THERMAL RESISTANCE
THERMAL RESISTANCE
THERMAL RESISTANCE
) + (I
GND
)(V
= 7V) = 2mA
, with an
IN2
IN1(MAX)
)
Therefore,
P = (150mA)(7V – 5V) + (2mA)(7V) = 0.31W
When switched to the secondary input, current from the
primary input is negligible and worst-case power dissipation will be:
(I
OUT(MAX)
)(V
IN2(MAX)
– V
OUT
) + (I
GND
)(V
IN2(MAX)
)
Where:
I
OUT(MAX)
V
IN2(MAX)
I
GND
at (I
= 150mA
= 10V
= 150mA, V
OUT
= 10V) = 2mA
IN2
Therefore,
P = (150mA)(10V – 5V) + (2mA)(10V) = 0.77W
Using a 16-lead SO package, the thermal resistance will be
in the range of 55°C/W to 68°C/W dependent upon the
copper area. So the junction temperature rise above
ambient will be approximately equal to:
(0.77W)(65°C/W) = 50.1°C
The maximum junction temperature will then be equal to
the maximum temperature rise above ambient plus the
maximum ambient temperature or:
T
= 50.1°C + 50°C = 100.1°C
JMAX
Protection Features
The LT1579 incorporates several protection features that
make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with
monolithic regulators, such as current limiting and thermal limiting, the device is protected against reverse input
voltages, reverse output voltages and reverse voltages
from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C.
Current limit protection is designed to protect the device
if the output is shorted to ground. With the output shorted
to ground, current will be drawn from the primary input
until it is discharged. The current drawn from V
will not
IN2
increase until the primary input is discharged. This prevents a short-circuit on the output from discharging both
inputs simultaneously.
17
LT1579
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APPLICATIONS INFORMATION
The inputs of the device can withstand reverse voltages up
to 20V. Current flow into the device will be limited to less
than 1mA (typically less than 100µA) and no negative
voltage will appear at the output. The device will protect
both itself and the load. This provides protection against
batteries which can be plugged in backwards. Internal
protection circuitry isolates the inputs to prevent current
flow from one input to the other. Even with one input
supplying all bias currents and the other being plugged in
backwards (a maximum total differential of 40V), current
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
GN Package
16-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
flow from one input to another will be limited to less than
1mA. Output voltage will be unaffected. In the case of
reverse inputs, no reverse voltages will appear at the load.
Pulling the SS pin low will cause all load currents to come
from the secondary input. If the secondary input is not
present, the output will be turned off. If the part is put into
current limit with the SS pin pulled low, current limit will
be drawn from the secondary input until it is discharged,
at which point the current limit will drop to zero.
0.015 ± 0.004
(0.38
0.007 – 0.0098
(0.178 – 0.249)
0.016 – 0.050
(0.406 – 1.270)
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
0° – 8° TYP
± 0.10)
× 45°
0.229 – 0.244
(5.817 – 6.198)
0.053 – 0.068
(1.351 – 1.727)
0.008 – 0.012
(0.203 – 0.305)
16
15
12
0.189 – 0.196*
(4.801 – 4.978)
14
12 11 10
13
5
4
3
678
9
0.004 – 0.0098
(0.102 – 0.249)
0.025
(0.635)
BSC
0.150 – 0.157**
(3.810 – 3.988)
GN16 (SSOP) 1197
18
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
8
5
6
LT1579
0.228 – 0.244
(5.791 – 6.197)
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
× 45°
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
16
15
1
2
0.386 – 0.394*
(9.804 – 10.008)
13
14
0.150 – 0.157**
(3.810 – 3.988)
3
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
SO8 0996
12
1110
9
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
× 45°
0.016 – 0.050
0.406 – 1.270
0° – 8° TYP
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
0.228 – 0.244
(5.791 – 6.197)
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.150 – 0.157**
(3.810 – 3.988)
4
5
0.050
(1.270)
TYP
3
2
1
7
6
8
0.004 – 0.010
(0.101 – 0.254)
S16 0695
19
LT1579
TYPICAL APPLICATION
Additional Logic Forces LT1579 Into Shutdown to Protect Input Batteries
IN2
RESET
C1
1µF
C5
0.1µF
R9
1.5M
D3
IN1
R8
330k
D4
5.1V
1N751A
D2
D1 TO D3: 1N4148
U
R1
1M
C2
1µF
V
CC
GND
1/4
74C02
D1
R4
10M
R5
1M
1/4
74C02
R2
2.7M
R3
1M
R6
2.7M
R7
1M
1/4
74C02
IN1
LBI1
LBO1
SS
IN2
LBI2
LBO2
SHDN
BACKUP
DROPOUT
LT1579-5
BIASCOMP
GND
OUT
1579 TA03
NC
R10
1M
C4
0.01µF
MAIN GOOD
C3
4.7µF
V
OUT
5V/300mA
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