Datasheet LT1468 Datasheet (Linear Technology)

FEATURES

LT1468

90MHz, 22V/µs

16-Bit Accurate

Operational Amplifier

U

DESCRIPTIO

■

90MHz Gain Bandwidth, f = 100kHz

■

22V/µs Slew Rate

■

Settling Time: 900ns (AV = –1, 150µV, 10V Step)

■

Low Distortion, –96.5dB for 100kHz, 10V

■

Maximum Input Offset Voltage: 75µV

■

Maximum Input Offset Voltage Drift: 2µV/°C

■

Maximum (–) Input Bias Current: 10nA

■

Minimum DC Gain: 1000V/mV

■

Minimum Output Swing into 2k: ±12.8V

■

Unity Gain Stable

■

Input Noise Voltage: 5nV/√Hz

■

Input Noise Current: 0.6pA/√Hz

■

Total Input Noise Optimized for 1k < RS < 20k

■

Specified at ±5V and ±15V

P-P

U

APPLICATIONS

■

16-Bit DAC Current-to-Voltage Converter

■

Precision Instrumentation

■

ADC Buffer

■

Low Distortion Active Filters

■

High Accuracy Data Acquisition Systems

■

Photodiode Amplifiers

The LT®1468 is a precision high speed operational amplifier with 16-bit accuracy and 900ns settling to 150µV for 10V signals. This unique blend of precision and AC performance makes the LT1468 the optimum choice for high accuracy applications such as DAC current-to-voltage conversion and ADC buffers. The initial accuracy and drift characteristics of the input offset voltage and inverting input bias current are tailored for inverting applications.

The 90MHz gain bandwidth ensures high open-loop gain at frequency for reducing distortion. In noninverting applications such as an ADC buffer, the low distortion and DC accuracy allow full 16-bit AC and DC performance.

The 22V/µ s slew rate of the LT1468 improves large-signal performance in applications such as active filters and instrumentation amplifiers compared to other precision op amps.

The LT1468 is manufactured on Linear Technology’s complementary bipolar process.

, LTC and LT are registered trademarks of Linear Technology Corporation.

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TYPICAL APPLICATIO

16-Bit DAC I-to-V Converter

20pF

16

DAC

INPUTS

LTC

OFFSET: VOS + IB (6kΩ) < 1LSB SETTLING TIME TO 150µV = 1.7µs SETTLING LIMITED BY 6k AND 20pF TO COMPENSATE DAC OUTPUT CAPACITANCE

®

1597

6k



–



+



LT1468

2k

V

OUT

50pF

OPTIONAL NOISE FILTER

1468 TA01

Total Harmonic Distortion vs Frequency

–80

VS = ±15V

= 2

A

V

= 2k

R

L

–90

–100

–110

–120

TOTAL HARMONIC DISTORTION (dB)

–130

100

= 10V

V

OUT

P-P

1k 10k 100k

FREQUENCY (Hz)

1468 TA02

1

LT1468

1

2

3

4

8

7

6

5

TOP VIEW

*DO NOT CONNECT

S8 PACKAGE

8-LEAD PLASTIC SO

N8 PACKAGE 8-LEAD PDIP

NULL

–IN +IN

V

–

DNC* V

+



V

OUT



NULL

WW

W

ABSOLUTE AXI U RATI GS

(Note 1)

Total Supply Voltage (V+ to V–) ............................... 36V

U

UUW

PACKAGE/ORDER I FOR ATIO

ORDER PART

NUMBER

Maximum Input Current (Note 2) ......................... 10mA

Output Short-Circuit Duration (Note 3)............ Indefinite

Operating Temperature Range ................ –40°C to 85°C

Specified Temperature Range (Note 4)... –40°C to 85°C

Junction Temperature...........................................150°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec)..................300°C

T

= 150°C, θJA = 130°C/W (N8)

JMAX

= 150°C, θJA = 190°C/W (S8)

T

JMAX

LT1468CN8 LT1468CS8 LT1468IN8 LT1468IS8

S8 PART MARKING

1468 1468I

Consult factory for Military Grade parts.

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS V

V

OS

I

OS

–

I

B

+

I

B

e

n

i

n

R

IN

C

IN

CMRR Common Mode Rejection Ratio V

PSRR Power Supply Rejection Ratio VS = ±4.5V to ±15V 100 112 dB A

VOL

V

OUT

I

OUT

I

SC

Input Offset Voltage ±15V 30 75 µV

Input Offset Current ±5V to ±15V 13 50 nA Inverting Input Bias Current ±5V to ±15V 3 ±10 nA Noninverting Input Bias Current ±5V to ±15V –10 ±40 nA Input Noise Voltage 0.1Hz to 10Hz ±5V to ±15V 0.3 µV Input Noise Voltage f = 10kHz ±5V to ±15V 5 nV/√Hz Input Noise Current f = 10kHz ±5V to ±15V 0.6 pA/√Hz Input Resistance V

Input Capacitance ±15V 4 pF Input Voltage Range + ±15V 12.5 13.5 V

Input Voltage Range – ±15V –14.3 –12.5 V

Large-Signal Voltage Gain V

Output Swing RL = 10k, V

Output Current V

Short-Circuit Current V

= ±12.5V ±15V 100 240 MΩ

CM

Differential ±15V 50 150 kΩ

= ±12.5V ±15V 96 110 dB

CM

= ±2.5V ±5V 96 112 dB

V

CM

= ±12.5V, RL = 10k ±15V 1000 9000 V/mV

OUT

V

= ±12.5V, RL = 2k ±15V 500 5000 V/mV

OUT

= ±2.5V, RL = 10k ±5V 1000 6000 V/mV

V

OUT

= ±2.5V, RL = 2k ±5V 500 3000 V/mV

V

OUT

= 2k, V

R

L

R

= 10k, V

L

= 2k, V

R

L

= ±12.5V ±15V ±15 ±22 mA

OUT

= ±2.5V ±5V ±15 ±22 mA

V

OUT

= 0V, V

OUT

TA = 25°C, VCM = 0V unless otherwise noted.

SUPPLY

±5V 50 175 µV

±5V 2.5 3.5 V

±5V –4.3 –2.5 V

= ±1mV ±15V ±13.0 ±13.6 V

IN

= ±1mV ±15V ±12.8 ±13.5 V

IN

= ±1mV ±5V ±3.0 ±3.6 V

IN

= ±1mV ±5V ±2.8 ±3.5 V

IN

= ±0.2V ±15V ±25 ±40 mA

IN

MIN TYP MAX UNITS

P-P

2

LT1468

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS V

TA = 25°C, VCM = 0V unless otherwise noted.

SUPPLY

MIN TYP MAX UNITS

SR Slew Rate AV = –1, RL = 2k (Note 5) ±15V 15 22 V/µs

±5V 11 17 V/µs

Full-Power Bandwidth 10V Peak, (Note 6) ±15V 350 kHz

3V Peak, (Note 6) ±5V 900 kHz

GBW Gain Bandwidth f = 100kHz, RL = 2k ±15V 60 90 MHz

±5V 55 88 MHz

THD Total Harmonic Distortion AV = 2, VO = 10V

= 2, VO = 10V

A

V

tr, t

f

Rise Time, Fall Time AV = 1, 10% to 90%, 0.1V ±15V 11 ns

, f = 1kHz ±15V 0.00007 %

P-P

, f = 100kHz ±15V 0.0015 %

P-P

±5V 12 ns

Overshoot AV = 1, 0.1V ±15V 30 %

±5V 35 %

Propagation Delay AV = 1, 50% VIN to 50% V

, 0.1V ±15V 9 ns

OUT

±5V 10 ns

t

s

R

O

I

S

Settling Time 10V Step, 0.01%, AV = –1 ±15V 760 ns

10V Step, 150µV, A 5V Step, 0.01%, A

= –1 ±15V 900 ns

V

= –1 ±5V 770 ns

V

Output Resistance AV = 1, f = 100kHz ±15V 0.02 Ω Supply Current ±15V 3.9 5.2 mA

±5V 3.6 5.0 mA

0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.

SYMBOL PARAMETER CONDITIONS V

V

OS

Input Offset Voltage ±15V ● 150 µV

SUPPLY

±5V

Input VOS Drift (Note 7) ±5V to ±15V ● 0.7 2.0 µV/°C

I

OS

Input Offset Current ±5V to ±15V ● 65 nA Input Offset Current Drift ±5V to ±15V 60 pA/°C

–

I

B

Inverting Input Bias Current ±5V to ±15V ● ±15 nA Negative Input Current Drift ±5V to ±15V 40 pA/°C

+

I

B

CMRR Common Mode Rejection Ratio V

Noninverting Input Bias Current ±5V to ±15V ● ±50 nA

= ±12.5V ±15V ● 94 dB

CM

= ±2.5V ±5V ● 94 dB

V

CM

PSRR Power Supply Rejection Ratio VS = ±4.5V to ±15V ● 98 dB A

V

I

VOL

OUT

SC

Large-Signal Voltage Gain V

= ±12.5V, RL = 10k ±15V ● 500 V/mV

OUT

= ±12.5V, RL = 2k ±15V ● 250 V/mV

V

OUT

V

= ±2.5V, RL = 10k ±5V ● 500 V/mV

OUT

= ±2.5V, RL = 2k ±5V ● 250 V/mV

V

OUT

Output Swing RL = 10k, V

= 2k, V

R

L

= 10k, V

R

L

R

= 2k, V

L

Output Current V

Short-Circuit Current V

= ±12.5V ±15V ● ±12.5 mA

OUT

= ±2.5V ±5V ● ±12.5 mA

V

OUT

= 0V, V

OUT

= ±1mV ±15V ● ±12.9 V

IN

= ±1mV ±15V ● ±12.7 V

IN

= ±1mV ±5V ● ±2.9 V

IN

= ±1mV ±5V ● ±2.7 V

IN

= ±0.2V ±15V ● ±17 mA

IN

SR Slew Rate AV = –1, RL = 2k (Note 5) ±15V ● 13 V/µs

±5V

MIN TYP MAX UNITS

● 250 µV

● 9V/µs

3

LT1468

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS V

0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.

SUPPLY

MIN TYP MAX UNITS

GBW Gain Bandwidth f = 100kHz, RL = 2k ±15V ● 55 MHz

±5V

I

S

Supply Current ±15V ● 6.5 mA

±5V

● 50 MHz

● 6.3 mA

–40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted (Note 4).

SYMBOL PARAMETER CONDITIONS V

V

OS

Input Offset Voltage ±15V ● 230 µV

SUPPLY

±5V

Input VOS Drift (Note 7) ±5V to ±15V ● 0.7 2.5 µV/°C

I

OS

Input Offset Current ±5V to ±15V ● 80 nA Input Offset Current Drift ±5V to ±15V 120 pA/°C

–

I

B

Inverting Input Bias Current ±5V to ±15V ● ±30 nA Negative Input Current Drift ±5V to ±15V 80 pA/°C

+

I

B

CMRR Common Mode Rejection Ratio V

Noninverting Input Bias Current ±5V to ±15V ● ±60 nA

= ±12.5V ±15V ● 92 dB

CM

= ±2.5V ±5V ● 92 dB

V

CM

PSRR Power Supply Rejection Ratio VS = ±4.5V to ±15V ● 96 dB A

VOL

V

OUT

I

OUT

I

SC

Large-Signal Voltage Gain V

= ±12V, RL = 10k ±15V ● 300 V/mV

OUT

= ±10V, RL = 2k ±15V ● 150 V/mV

V

OUT

V

= ±2.5V, RL = 10k ±5V ● 300 V/mV

OUT

= ±2.5V, RL = 2k ±5V ● 150 V/mV

V

OUT

Output Swing RL = 10k, V

= 2k, V

R

L

R

= 10k, V

L

= 2k, V

R

L

Output Current V

Short-Circuit Current V

= ±12.5V ±15V ● ±7mA

OUT

= ±2.5V ±5V ● ±7mA

V

OUT

= 0V, V

OUT

= ±1mV ±15V ● ±12.8 V

IN

= ±1mV ±15V ● ±12.6 V

IN

= ±1mV ±5V ● ±2.8 V

IN

= ±1mV ±5V ● ±2.6 V

IN

= ±0.2V ±15V ● ±12 mA

IN

SR Slew Rate AV = –1, RL = 2k (Note 5) ±15V ● 9V/µs

±5V

GBW Gain Bandwidth f = 100kHz, RL = 2k ±15V ● 45 MHz

±5V

I

S

Supply Current ±15V ● 7.0 mA

±5V

MIN TYP MAX UNITS

● 330 µV

● 6V/µs

● 40 MHz

● 6.8 mA

The ● denotes specifications that apply over the full operating temperature range.

Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.

Note 2: The inputs are protected by back-to-back diodes and two 100Ω series resistors. If the differential input voltage exceeds 0.7V, the input current should be limited to 10mA. Input voltages outside the supplies will be clamped by ESD protection devices and input currents should also be limited to 10mA.

Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely.

4

Note 4: The LT1468C is guaranteed to meet specified performance from 0°C to 70°C and is designed, characterized and expected to meet these extended temperature limits, but is not tested at –40°C and at 85°C. The LT1468I is guaranteed to meet the extended temperature limits.

Note 5: Slew rate is measured between ±8V on the output with ±12V input for ±15V supplies and ±2V on the output with ±3V input for ±5V supplies.

Note 6: Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/2πV

P

Note 7: This parameter is not 100% tested.

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1468

Supply Current vs Supply Voltage and Temperature

7

6

5

4

3

SUPPLY CURRENT (mA)

2

1

0

5101520

SUPPLY VOLTAGE (±V)

Input Bias Current vs Temperature

30

VS = ±15V

20

10

0



–10

–20

INPUT BIAS CURRENT (nA)

–30

–

I

B

+

I

B

125°C

25°C

–55°C

1468 G01

Input Common Mode Range vs Supply Voltage

+

V

TA = 25°C

–0.5 –1.0 –1.5 –2.0

2.0

1.5

COMMON MODE RANGE (V)

1.0

0.5 V

< 100µV

∆V

OS

–

3

0

SUPPLY VOLTAGE (±V)

6

912

Input Noise Spectral Density

1000

i

100

10

INPUT VOLTAGE NOISE (nV/√Hz)

n

e

n

VS = ±15V

= 25°C

T

A

= 101

A

V

= 100k FOR i

R

S

Input Bias Current vs Input Common Mode Voltage

80

VS = ±15V

= 25°C

T

60

A

40

20

0

–20

–40

INPUT BIAS CURRENT (nA)

–60

18

15

1468 G02

–80

–10 –5 5

–15

INPUT COMMON MODE VOLTAGE (V)

–

I

B

+

I

B

10

0

15

1468 G03

0.1Hz to 10Hz Voltage Noise

10

INPUT CURRENT NOISE (pA/√Hz)

n

1

0.1

VS = ±15V

VOLTAGE NOISE (100nV/DIV)

–40

–50

–25 0

TEMPERATURE (°C)

50 100 125

25 75

Warm-Up Drift vs Time

5

0

–5

–10

–15

–20

–25

–30

OFFSET VOLTAGE DRIFT (µV)

–35

–40

0 20 40 60 80 100 120 140

TIME AFTER POWER UP (s)

N8 ±5V

S0-8 ±5V

N8 ±15V

S0-8 ±15V

1468 G04

1468 G07

1

10 100 1k 10k

Open-Loop Gain vs Resistive Load

140

TA = 25°C

135

130

125

120

OPEN-LOOP GAIN (dB)

115

110

10

LOAD RESISTANCE (Ω)

FREQUENCY (Hz)

100k

1468 G05

VS = ±15V

VS = ±5V

100 1k 10k

1468 G08

0.01



Open-Loop Gain vs Temperature

160

RL = 2k

150

140

130

120

110

OPEN-LOOP GAIN (dB)

100

90

–50

–25 0

TIME (1s/DIV)

VS = ±15V

VS = ±5V

50 100 125

25 75

TEMPERATURE (°C)

1468 G06

1468 G09

5

LT1468

SETTLING TIME (ns)

0

OUTPUT STEP (V)

2

6

10

800

1468 G15

–2

–6

0

4

8

–4

–8

–10

200

400

600

1000

VS = ±15V A

V

= –1

R

F

= RG = 2k

C

F

= 8pF

FREQUENCY (Hz)

0.01

OUTPUT IMPEDANCE (Ω)

0.1

1

10

100

10k 1M 10M 100M

1468 G19

0.001 100k

VS = ±15V T

A

= 25°C

AV = 100

A

V

= 10

A

V

= 1

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Output Voltage Swing vs Supply Voltage

+

V

–1

–2

–3

–4

4

3

2

OUTPUT VOLTAGE SWING (V)

1

= 25°C

T

A

–

V

0

5

SUPPLY VOLTAGE (±V)

Settling Time to 0.01% vs Output Step, VS = ±15V

10

VS = ±15V

8

= 1k

R

L

6 4 2 0

–2

OUTPUT STEP (V)

–4 –6 –8

–10

0

AV = 1

200

400

SETTLING TIME (ns)

RL = 2k

= 10k

R

L

RL = 2k

RL = 10k

10 15 20

1468 G10

AV = –1

600

A

800

= 1

V

1468 G13

AV = –1

1000

Output Voltage Swing vs Load Current

+

V

–0.5

VS = ±15V

–1.0 –1.5 –2.0

–2.5

2.5

2.0

1.5

OUTPUT VOLTAGE SWING (V)

1.0

–

V

0.5 –20

40°C

85°C

–15 –5

–10

OUTPUT CURRENT (mA)

Settling Time to 0.01% vs Output Step, VS = ±5V

5

VS = ±5V

4

= 1k

R

L

3 2 1 0

–1

OUTPUT STEP (V)

–2 –3 –4 –5

300

AV = 1

400

SETTLING TIME (ns)

25°C

AV = 1

500

0

–40°C

25°C

600

5

AV = –1

85°C

10

15

AV = –1

700

1468 G11

1468 G14

20

800

Output Short-Circuit Current vs Temperature

60

VS = ±15V

55

V

= ±0.2V

IN

50

–50

–25

SOURCE

0

50

25

TEMPERATURE (°C)

SINK

75

45 40 35 30 25 20 15

OUTPUT SHORT-CIRCUIT CURRENT (mA)

10

Settling Time to 150µV vs Output Step

100

125

1468 G12

Gain Bandwidth and Phase Margin vs Supply Voltage

98

TA = 25°C

= –1

A

96

V

= RG = 5.1k

R

F

= 5pF

C

F

94

= 2k

R

L

92

90

88

GAIN BANDWIDTH (MHz)

86

84

82

6

GAIN BANDWIDTH

0

5

SUPPLY VOLTAGE (±V)

PHASE MARGIN

10

Gain Bandwidth and Phase Margin vs Temperature

100

1468 G18

46 44 42

PHASE MARGIN (DEG)

40 38 36 34 32 30 28 26

125

44

42

40

38

36

34

32

30

28

15

20

1468 G17

104 102 100

PHASE MARGIN (DEG)

98 96 94 92 90

GAIN BANDWIDTH (MHz)

88 86 84

PHASE MARGIN

GAIN BANDWIDTH

–55

–25

VS = ±15V

VS = ±5V

VS = 15V

VS = 5V

50

25

0

TEMPERATURE (°C)

75

Output Impedance vs Frequency

UW

FREQUENCY (Hz)

100

0

COMMON MODE REJECTION RATIO (dB)

20

40

60

80

120

1k

10k 100k 1M

1468 G21

10M 100M

100

VS = ±15V T

A

= 25°C

FREQUENCY (Hz)

100k

2

GAIN (dB)

4

6

8

10

1M 10M 100M

1468 G24

0

–2 –4 –6

12

14

VS = ±15V T

A

= 25°C

A

V

= 1

NO R

L

100pF

10pF

50pF

20pF

TYPICAL PERFOR A CE CHARACTERISTICS

LT1468

Gain and Phase vs Frequency

70

60

50

40

30

GAIN (dB)

20

TA = 25°C

10

= –1

A

V

= RG = 5.1k

R

F

0

= 5pF

C

F

= 2k

R

L

–10

10k 1M 10M 100M

100k

FREQUENCY (Hz)

PHASE

±15V

±5V

GAIN

±15V

±5V

Frequency Response vs Supply Voltage, AV = 1

5

TA = 25°C

4

= 1

A

V

= 2k

R

L

3 2 1

0

GAIN (dB)

–1 –2 –3 –4 –5

100k

±5V

±15V

1M 10M 100M

FREQUENCY (Hz)

1468 G16

1468 G22

100

80

60

PHASE (DEG)

40

20

0

–20

–40

–60

Power Supply Rejection Ratio vs Frequency

160

VS = ±15V

= 25°C

T

A

140

120

100

80

60

40

20

POWER SUPPLY REJECTION RATIO (dB)

+PSRR

–PSRR

0

1k 10k 1M

100

100k

FREQUENCY (Hz)

Frequency Response vs Supply Voltage, AV = –1

5 4 3

RF = RG = 5.1k

2 1

0

GAIN (dB)

–1 –2 –3 –4 –5

100k

TA = 25°C

= –1

A

V

= 2k

R

L

= 5pF

C

F

±5V

±15V

1M 10M 100M

FREQUENCY (Hz)

10M

RF = RG = 2k

±5V ±15V

1468 G23

Common Mode Rejection Ratio vs Frequency

100M

1468 G20

Frequency Response vs Capacitive Load, AV = 1

Frequency Response vs Capacitive Load, AV = –1

14

VS = ±15V

12

= 25°C

T

A

= –1

A

V

10

= RG = 5.1k

R

F

= 5pF

C

8

F

NO R

L

6

GAIN (dB)

4 2 0

–2

–4 –6

100k

1M 10M 100M

FREQUENCY (Hz)

200pF

50pF

300pF

100pF

1468 G25

Slew Rate vs Supply Voltage

30

TA = 25°C

= –1

A

V

28

= 2k

R

L

26

24

22

20

SLEW RATE (V/µs)

18

16

14

0

5

SUPPLY VOLTAGE (±V)

10

–SR

+SR

Slew Rate vs Temperature

45

VS = ±15V

= –1

A

V

40

= 2k

R

L

35

30

25

20

SLEW RATE (V/µs)

15

10

5

–25 0 50

15

20

1468 G26

–50

–SR

+SR

25

TEMPERATURE (°C)

75 100 125

1468 G27

7

LT1468

FREQUENCY (kHz)

1

0

OUTPUT VOLTAGE SWING (V

P-P

)

20

25

30

10 100 1000

1468 G30

15

10

5

AV = 1

AV = –1

VS = ±15V R

L

= 2k

FREQUENCY (kHz)

1

4

OUTPUT VOLTAGE SWING (V

P-P

)

5

6

7

8

10 100 1000

1468 G33

3 2 1 0

9

10

VS = ±5V R

L

= 2k

AV = 1

AV = –1

SOURCE RESISTANCE, RS (Ω)

1

TOTAL NOISE VOLTAGE (nV/√Hz)

10

10 1k 10k 100k

1468 G36

0.1 100

100

VS = ±15V T

A

= 25°C

f = 10kHz

TOTAL NOISE

RESISTOR NOISE ONLY

R

S

–

+

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Total Harmonic Distortion + Noise vs Frequency

0.010 VS = ±15V

= 25°C

T

A

= 600Ω

R

L

= 20V

V

O

NOISE BW = 80kHz

0.001

THD + NOISE (%)

0.0001 20



P-P

AV = 10

AV = 1

MEASUREMENT

LIMIT

100 1k 20k10k

FREQUENCY (Hz)

Small-Signal Transient, AV = 1

1468 G28

Total Harmonic Distortion + Noise vs Amplitude

–50

–60

–70

–80

–90

THD + NOISE (dB)

TA = 25°C

= 10

A

V

–100

–110

= 600Ω

R

L

f = 10kHz NOISE BW = 80kHz

0.01

0.1 1 10

OUTPUT SIGNAL (V

RMS

Small-Signal Transient, AV = –1

Undistorted Output Swing vs Frequency, ±15V

±15V±5V

)

1468 G29

Undistorted Output Swing vs Frequency, ±5V

VS = ±15V

Large-Signal Transient, AV = 1

8

VS = ±15V

1468 G31

1468 G34

VS = ±15V

Large-Signal Transient, AV = –1

VS = ±15V

1468 G32

Total Noise vs Unmatched Source Resistance

1468 G32

LT1468

U

WUU

APPLICATIONS INFORMATION

The LT1468 may be inserted directly into many operational amplifier applications improving both DC and AC performance, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT1468 is shown below.

Offset Nulling

+

V

3

+

LT1468

2

–

1

5

100k

7

6

4

0.1µF

–

V

Layout and Passive Components

The LT1468 requires attention to detail in board layout in order to maximize DC and AC performance. For best AC results (for example fast settling time) use a ground plane, short lead lengths, and RF-quality bypass capacitors (0.01µF to 0.1µ F) in parallel with low ESR bypass capaci- tors (1µ F to 10µF tantalum). For best DC performance, use “star” grounding techniques, equalize input trace lengths and minimize leakage (i.e., 1.5GΩ of leakage between an input and a 15V supply will generate 10nA—equal to the maximum I

–

specification.)

B

Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs. For inverting configurations tie the ring to ground, in noninverting connections tie the ring to the inverting input (note the input capacitance will increase which may require a compensating capacitor as discussed below.)

Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects caused by temperature gradients across dissimilar metals at the contacts to the inputs can exceed the inherent drift of the amplifier. Air currents over device leads should be minimized, package leads should be short, and the two input leads should be as close together as possible and maintained at the same temperature.

Make no connection to Pin 8. This pin is used for factory trim of the inverting input current.

2.2µF0.1µF

2.2µF

1468 AI01

The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole that can cause peaking or even oscillations. For feedback resistors greater than 2k, a feedback capacitor of the value:

CF > (RG)(CIN/RF)

should be used to cancel the input pole and optimize dynamic performance. For applications where the DC noise gain is one, and a large feedback resistor is used, CF should be greater than or equal to CIN. An example would be a DAC I-to-V converter as shown on the front page of this data sheet where the DAC can have many tens of pF of output capacitance. Another example would be a gain of –1 with 5k resistors; a 5pF to 10pF capacitor should be added across the feedback resistor. The frequency response in a gain of –1 is shown in the Typical Performance curves with 2k and 5.1k resistors with a 5pF feedback capacitor.

Nulling Input Capacitance

R

F

C

F

R

G

C

IN

V

–

LT1468

+

IN

V

1468 AI02

OUT

Input Considerations

Each input of the LT1468 is protected with a 100Ω series resistor and back-to-back diodes across the bases of the input devices. If the inputs can be pulled apart, the input current should be limited to less than 10mA with an external series resistor. Each input also has two ESD clamp diodes—one to each supply. If an input is driven above the supply, limit the current with an external resistor to less than 10mA.

The LT1468 employs bias current cancellation at the inputs. The inverting input current is trimmed at zero common mode voltage to minimize errors in inverting applications such as I-to-V converters. The noninverting input current is not trimmed and has a wider variation and therefore a larger maximum value. As the input offset

9

LT1468

–

+

LT1468

1468 AI04

R

G

R

O

R

F

C

F

C

L

V

IN

V

OUT

RO ≥ (1 + RF/RG)/(2πCL5MHz) R

F

≥ 10RO

C

F

= (2RO/RF)C

L

U

WUU

APPLICATIONS INFORMATION

current can be greater than either input current, the use of balanced source resistance is NOT recommended as it actually degrades DC accuracy and also increases noise.

The input bias currents vary with common mode voltage as shown in the Typical Performance Characteristics. The cancellation circuitry was not designed to track this common mode voltage because the settling time would have been adversely affected.

The LT1468 inputs can be driven to the negative supply and to within 0.5V of the positive supply without phase reversal. As the input moves closer than 0.5V to the positive supply, the output reverses phase.

Input Stage Protection

R1

100Ω

+IN –IN

Q1 Q2

Total Input Noise

The curve of Total Noise vs Unmatched Source Resistance in the Typical Performance Characteristics shows that with source resistance below 1k, the voltage noise of the amplifier dominates. In the 1k to 20k region the increase in noise is due to the source resistance. Above 20k the input current noise component is larger than the resistor noise.

Capacitive Loading

The LT1468 drives capacitive loads of up to 100pF in unity gain and 300pF in a gain of –1. When there is a need to drive a larger capacitive load, a small series resistor should be inserted between the output and the load. In addition, a capacitor should be added between the output and the inverting input as shown in Driving Capacitive Loads.

Settling Time

The LT1468 is a single stage amplifier with an optimal thermal layout that leads to outstanding settling performance. Measuring settling, even at the 12-bit level is very challenging, and at the 16-bit level requires a great deal of subtlety and expertise. Fortunately, there are two

10

R2

100Ω

1468 AI03

Driving Capacitive Loads

excellent Linear Technology reference sources for settling measurements, Application Notes 47 and 74. Appendix B of AN47 is a vital primer on 12-bit settling measurements, and AN74 extends the state of the art while concentrating on settling time with a 16-bit current output DAC input.

The 150µV settling curve in the Typical Performance Characteristics is measured using the Differential Amplifier method of AN74 followed by a clamped, nonsaturating gain of 100. The total gain of 500 allows a resolution of 100µV/DIV with an oscilloscope setting of 0.05V/DIV

The settling of the DAC I-to-V converter on the front page was measured using the exact methods of AN74. The optimum nulling of the DAC output capacitance requires 20pF across the 6k feedback resistor. The theoretical limit for 16-bit settling is 11.1 times this RC time constant or

1.33µs. The actual settling time is 1.7µs at the output of the LT1468. The LT1468 is the fastest Linear Technology amplifier in this application.

The optional noise filter adds a slight delay of 100ns, but reduces the noise bandwidth to 1.6MHz which increases the output resolution for 16-bit accuracy.

Distortion

The LT1468 has outstanding distortion performance as shown in the Typical Performance curves of Total Harmonic Distortion + Noise vs Frequency and Amplitude. The high open-loop gain and inherently balanced architecture reduce errors to yield 16-bit accuracy to frequencies as high as 100kHz. An example of this performance is the Typical Application titled 100kHz Low Distortion Bandpass Filter. This circuit is useful for cleaning up the output of a high performance signal generator such as the B & K type 1051 or HP3326A.

LT1468

1

2

3

4

0.150 – 0.157** (3.810 – 3.988)

8

7

6

5

0.189 – 0.197* (4.801 – 5.004)

0.228 – 0.244

(5.791 – 6.197)

0.016 – 0.050

0.406 – 1.270

0.010 – 0.020

(0.254 – 0.508)

× 45°

0°– 8° TYP

0.008 – 0.010

(0.203 – 0.254)

SO8 0996

0.053 – 0.069

(1.346 – 1.752)

0.014 – 0.019

(0.355 – 0.483)

0.004 – 0.010

(0.101 – 0.254)

0.050

(1.270)

TYP DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH  SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD  FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE  

*



**

U

WUU

APPLICATIONS INFORMATION

Another key application for LT1468 is buffering the input to a 16-bit A/D converter. In a gain of 1 or 2 this straightforward circuit provides uncorrupted AC and DC levels to the converter, while buffering the A/D input sample-and-

WW

SI PLIFIED

SCHEMATIC

+

V

I4 I6

I3

–

V

I2I1

Q5Q2

Q3

Q6Q1 –IN+IN

Q4

BIAS

hold circuit from high source impedance which can reduce the maximum sampling rate. The front page graph shows better than 16-bit distortion for a gain of 2 with a 10V

P-P

output.

I5

Q8

Q9

Q7

C

Q10

OUT

Q11

1468 SS

PACKAGE DESCRIPTION

8-Lead PDIP (Narrow 0.300)

(LTC DWG # 05-08-1510)

0.255 ± 0.015* (6.477 ± 0.381)

0.300 – 0.325

(7.620 – 8.255)

0.009 – 0.015

(0.229 – 0.381)

+0.035

0.325

–0.015

+0.889

8.255

()

–0.381

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

0.065

(1.651)

TYP

0.100 ± 0.010

(2.540 ± 0.254)

N8 Package

876



1234

0.045 – 0.065

(1.143 – 1.651)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

0.400* (10.160)

MAX

U

Dimensions in inches (millimeters) unless otherwise noted.

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

(LTC DWG # 05-08-1610)

5

0.130 ± 0.005

(3.302 ± 0.127)

0.125

0.020

(3.175)

MIN

(0.508)



0.018 ± 0.003

(0.457 ± 0.076)

MIN

N8 1197

11

LT1468

–

+

LT1468

1468 TA04

2k

200Ω

33.2k

2k

10pF

1000pF

V

IN

2.2µF

LTC1605

CAP

16 BITS

U

TYPICAL APPLICATIONS

Instrumentation Amplifier

R5

1.1k

R2

5k

–

LT1468

+

C1

10pF

R3

5k

R1

50k

–

V

IN

+

GAIN = [R4/R3][1 + (1/2)(R2/R1 + R3/R4) + (R2 + R3)/R5] = 102 TRIM R5 FOR GAIN TRIM R1 FOR COMMON MODE REJECTION BW = 480kHz

1000pF

11k

V

IN

121Ω

fO = 100kHz Q = 7

= –1

A

V

–

LT1468

+

–

LT1468

+

1000pF

R4

50k

C2

2pF

V

OUT

1468 TA03

100kHz Low Distortion Bandpass Filter

100kHz Distortion

22.1k

V

OUT

R

L

SIGNAL LEVEL

1V

RMS



2V

RMS



3.5V

RMS



1V

RMS



2V

RMS



3.5V

RMS

RL

2ND HARMONIC

1M



1M



1M



2k



2k



2k

16-Bit ADC Buffer

–106dB



–105dB



–106dB



–103dB



–99dB



–96.5dB

3RD HARMONIC

–103dB



–105dB



–104dB



–103dB



–103dB



–102dB

1468 TA05

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1167 Precision Instrumentation Amplifier Single Resistor Gain Set, 0.04% Max Gain Error, 10ppm Max Gain Nonlinearity LTC1595/LTC1596 16-Bit Serial Multiplying I LTC1597 16-Bit Parallel Multiplying I LTC1604 16-Bit, 333ksps Sampling ADC ±2.5V Input, SINAD = 90dB, THD = –100dB LTC1605 Single 5V, 16-Bit, 100ksps Sampling ADC Low Power, ±10V Inputs, Parallel/Byte Interface

12

Linear T echnolog y Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507

OUT

●

www.linear-tech.com

DACs ±1LSB Max INL/DNL, Low Glitch, DAC8043 16-Bit Upgrade

DAC ±1LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors

1468f LT/TP 1098 4K • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 1998

Datasheet LT1468 Datasheet (Linear Technology)

Specifications and Main Features

Frequently Asked Questions

User Manual