The LT®1461 is a low dropout micropower bandgap reference that combines very high accuracy and low drift with low
supply current and high output drive. This series reference
uses advanced curvature compensation techniques to obtain
low temperature coefficient and trimmed precision thin-film
resistors to achieve high output accuracy. The LT1461 draws
only 35µA of supply current, making it ideal for low power and
portable applications, however its high 50mA output drive
makes it suitable for higher power requirements, such as
precision regulators.
In low power applications, a dropout voltage of less than
300mV ensures maximum battery life while maintaining full
reference performance. Line regulation is nearly immeasurable, while the exceedingly good load and thermal regulation
will not add significantly to system error budgets. The
shutdown feature can be used to switch full load currents and
can be used for system power down. Thermal shutdown
protects the part from overload conditions.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
Basic Connection
≥ 2.8V2.5V
V
IN
C
1µF
LT1461-2.5
IN
U
C
L
2µF
1461 TA01
V
OUT
0mA
I
OUT
20mA
LOAD REG
1mV/DIV
Load Regulation, P
10ms/DIV
= 200mW
DISS
1461 TA02
1
Page 2
LT1461-2.5
1
2
3
4
8
7
6
5
TOP VIEW
*DNC: DO NOT CONNECT
DNC*
DNC*
V
OUT
DNC*
DNC*
V
IN
SHDN
GND
S8 PACKAGE
8-LEAD PLASTIC SO
WW
W
U
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Input Voltage ........................................................... 20V
Long-Term Drift of Output Voltage, SO-8 Package (Note 8)See Applications Information60ppm/√kHr
Thermal Hysteresis (Note 9)∆T = 0°C to 70°C40ppm
∆T = –40°C to 85°C70ppm
∆T = –40°C to 125°C120ppm
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LT1461 is guaranteed functional over the operating
temperature range of –40°C to 125°C.
Note 3: If the part is stored outside of the specified temperature range, the
output may shift due to hysteresis.
Note 4: ESD (Electrostatic Discharge) sensitive device. Extensive use of
ESD protection devices are used internal to the LT1461, however, high
electrostatic discharge can damage or degrade the device. Use proper ESD
handling precautions.
Note 5: Temperature coefficient is calculated from the minimum and
maximum output voltage measured at T
TC = (V
OMAX
– V
OMIN
)/(T
MAX
– T
MIN
MIN
)
, Room and T
as follows:
MAX
Incremental slope is also measured at 25°C.
Note 6: Load regulation is measured on a pulse basis from no load to the
specified load current. Output changes due to die temperature change
must be taken into account separately.
Note 7: Peak-to-peak noise is measured with a single pole highpass filter
at 0.1Hz and a 2-pole lowpass filter at 10Hz. The unit is enclosed in a stillair environment to eliminate thermocouple effects on the leads. The test
time is 10 sec. RMS noise is measured with a single pole highpass filter at
10Hz and a 2-pole lowpass filter at 1kHz. The resulting output is full-wave
rectified and then integrated for a fixed period, making the final reading an
average as opposed to RMS. A correction factor of 1.1 is used to convert
from average to RMS and a second correction of 0.88 is used to correct
for the nonideal bandpass of the filters.
Note 8: Long-term drift typically has a logarithmic characteristic and
therefore, changes after 1000 hours tend to be much smaller than before
that time. Total drift in the second thousand hours is normally less than
one third that of the first thousand hours with a continuing trend toward
reduced drift with time. Long-term drift will also be affected by differential
stresses between the IC and the board material created during board
assembly.
See the Applications Information section.
Note 9: Hysteresis in output voltage is created by package stress that
depends on whether the IC was previously at a higher or lower
temperature. Output voltage is always measured at 25°C, but the IC is
cycled hot or cold before successive measurements. Hysteresis is roughly
proportional to the square of the temperature change. Hysteresis is not
normally a problem for operational temperature excursions where the
instrument might be stored at high or low temperature. See Applications
Information.
3
Page 4
LT1461-2.5
FREQUENCY (kHz)
0.01
40
RIPPLE REJECTION RATIO (dB)
50
60
70
80
0.11100101000
1641 G01
30
20
10
0
90
100
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Reference Voltage vs Temperature
2.5020
TEMPCO –60°C TO 120°C
3 TYPICAL PARTS
2.5015
2.5010
2.5005
2.5000
2.4995
2.4990
REFERENCE VOLTAGE (V)
2.4985
2.4980
–60 –40 –20
0 20 40120
TEMPERATURE (°C)
Minimum Input/Output Voltage
Differential vs Load Current
10
1
INPUT/OUTPUT VOLTAGE (V)
0.1
0.1
110100
OUTPUT CURRENT (mA)
60 80 100
125°C
25°C
–55°C
1461 G04
1461 G01
4
3
2
1
OUTPUT VOLTAGE CHANGE (mV)
0
0.1
110100
OUTPUT CURRENT (mA)
Supply Current vs Input Voltage
1000
100
125°C
SUPPLY CURRENT (µA)
10
5252015100
–55°C
INPUT VOLTAGE (V)
25°C
125°C
25°C
–55°C
1461 G02
1461 G05
Line Regulation vs TemperatureLoad Regulation
0
–1
–2
–3
–4
–5
–6
LINE REGULATION (ppm/V)
–7
SUPPLY ∆ = 15V
5V – 20V
–8
–40 –20
0
40
20
TEMPERATURE (°C)
60
Supply Current vs Temperature
50
VIN = 5V
I
40
30
20
SUPPLY CURRENT (µA)
10
0
–40
–20 0
S
I
S(SHDN)
40
2060120
TEMPERATURE (°C)
100
80
80 100
120
1461 G03
1461 G06
Current Limit vs Temperature
140
120
100
80
CURRENT LIMIT (mA)
60
40
–50 –25
4
50
25
0
TEMPERATURE (°C)
SHDN Pin Current
vs SHDN Input Voltage
200
180
160
140
120
100
80
60
SHDN PIN CURRENT (µA)
40
20
100
125
1461 G07
75
0
0
5
SHDN PIN INPUT VOLTAGE (V)
25°C
10
125°C
15
–55°C
20
1461 G08
Ripple Rejection Ratio
vs Frequency
Page 5
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
LT1461-2.5
1000
100
10
OUTPUT IMPEDANCE (Ω)
1
0.01
I
OUT
0mA
10mA/DIV
C
= 2µF
OUT
C
= 1µF
OUT
0.1110
FREQUENCY (kHz)
1461 G10
Transient Response to 10mA
Load Step
Turn-On Time
20
10
0
VOLTAGE (V)
2
1
0
V
OUT
TIME (100µs/DIV)
Line Transient Response
5V
V
IN
4V
Turn-On TimeOutput Impedance vs Frequency
V
IN
CIN = 1µF
C
= 2µF
L
R
=
∞
L
1461 G11
20
10
0
VOLTAGE (V)
2
1
0
V
IN
V
OUT
TIME (100µs/DIV)
CIN = 1µF
C
= 2µF
L
= 50Ω
R
L
1461 G12
Output Noise 0.1Hz ≤ f ≤ 10Hz
V
OUT
50mV/DIV
CL = 2µF
V
OUT
50mV/DIV
1461 G13
CIN = 0.1µF
1461 G14
Long-Term Drift (Number of Data Points Reduced at 650 Hours)*
250
LT1461S8-2.5
3 TYPICAL PARTS SOLDERED ONTO PCB
200
= 30°C
T
A
150
100
ppm
50
0
–50
20060010001400
0
*SEE APPLICATIONS INFORMATION FOR DETAILED EXPLANATION OF LONG-TERM DRIFT
40080012001600
HOURS
1800
OUTPUT NOISE (20µV/DIV)
TIME (2SEC/DIV)
1461 G18
2000
1461 G15
5
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LT1461-2.5
W
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TYPICAL PERFORMANCE CHARACTERISTICS
0°C to 70°C Hysteresis
20
WORST-CASE HYSTERESIS
18
ON 35 UNITS
16
14
12
10
8
NUMBER OF UNITS
6
4
2
0
–80–60–40
–100
–40°C to 85°C Hysteresis
20
WORST-CASE HYSTERESIS
18
ON 35 UNITS
16
14
12
10
8
NUMBER OF UNITS
6
4
2
0
–80–60–40 –20
–100
70°C TO 25°C
–20
HYSTERESIS (ppm)
HYSTERESIS (ppm)
0°C TO 25°C
0 20406080100
–40°C TO 25°C85°C TO 25°C
0 20406080100
1461 G16
1461 G17
6
–40°C to 125°C Hysteresis
16
WORST-CASE HYSTERESIS
14
ON 35 UNITS
12
10
8
6
NUMBER OF UNITS
4
2
0
–160–120–80–40
–200
04080120160200
HYSTERESIS (ppm)
–40°C TO 25°C125°C TO 25°C
1461 G19
Page 7
LT1461-2.5
U
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APPLICATIONS INFORMATION
Bypass and Load Capacitors
The LT1461 requires a capacitor on the input and on the
output for stability. The capacitor on the input is a supply
bypass capacitor and if the bypass capacitors from other
components are close (within 2 inches) they should be
sufficient. The output capacitor acts as frequency compensation for the reference and cannot be omitted. For
light loads ≤1mA, a 1µF nonpolar output capacitor is
usually adequate, but for higher loads (up to 75mA), the
output capacitor should be 2µF or greater. Figures 1 and
2 show the transient response to a 1mA load step with a
1µF output capacitor and a 50mA load step with a 2µF
output capacitor.
0mA
I
OUT
1mA/DIV
1mA
load current or input voltage changes, is not measurable.
This often overlooked parameter must be added to normal
line and load regulation errors. The load regulation photo,
on the first page of this data sheet, shows the output
response to 200mW of instantaneous power dissipation
and the reference shows no sign of thermal errors. The
reference has thermal shutdown and will turn off if the
junction temperature exceeds 150°C.
Shutdown
The shutdown (Pin 3 low) serves to shut off load current
when the LT1461 is used as a regulator. The LT1461
operates normally with Pin 3 open or greater than or equal
to 2.4V. In shutdown, the reference draws a maximum
supply current of 35µA. Figure 3 shows the transient
response of shutdown while the part is delivering 25mA.
After shutdown, the reference powers up in about 200µs.
V
OUT
20mV/DIV
1461 F01
Figure 1. 1mA Load Step with CL = 1µF
I
OUT
50mA/DIV
V
OUT
200mV/DIV
1461 F02
Figure 2. 50mA Load Step with CL = 2µF
Precision Regulator
The LT1461 will deliver 50mA with VIN = V
+ 2.5V and
OUT
higher load current with higher VIN. Load regulation is
typically 12ppm/mA, which means for a 50mA load step,
the output will change by only 1.5mV. Thermal regulation,
caused by die temperature gradients and created from
5V
PIN 3
0V
V
OUT
0V
1461 F03
Figure 3. Shutdown While Delivering 25mA, RL = 100Ω
PC Board Layout
In 13- to 16-bit systems where initial accuracy and temperature coefficient calibrations have been done, the mechanical and thermal stress on a PC board (in a card cage
for instance) can shift the output voltage and mask the true
temperature coefficient of a reference. In addition, the
mechanical stress of being soldered into a PC board can
cause the output voltage to shift from its ideal value.
Surface mount voltage references are the most susceptible to PC board stress because of the small amount of
plastic used to hold the lead frame.
A simple way to improve the stress-related shifts is to
mount the reference near the short edge of the PC board,
or in a corner. The board edge acts as a stress boundary,
7
Page 8
LT1461-2.5
U
WUU
APPLICATIONS INFORMATION
or a region where the flexure of the board is minimum. The
package should always be mounted so that the leads
absorb the stress and not the package. The package is
generally aligned with the leads parallel to the long side of
the PC board as shown in Figure 5a.
A qualitative technique to evaluate the effect of stress on
voltage references is to solder the part into a PC board and
deform the board a fixed amount as shown in Figure 4. The
flexure #1 represents no displacement, flexure #2 is
concave movement, flexure #3 is relaxation to no displacement and finally, flexure #4 is a convex movement.
1
2
3
4
Figure 4. Flexure Numbers
2
1461 F04
This motion is repeated for a number of cycles and the
relative output deviation is noted. The result shown in
Figure 5a is for two LT1461S8-2.5s mounted vertically
and Figure 5b is for two LT1461S8-2.5s mounted horizontally. The parts oriented in Figure 5a impart less stress into
the package because stress is absorbed in the leads.
Figures 5a and 5b show the deviation to be between 125µV
and 250µV and implies a 50ppm and 100ppm change
respectively. This corresponds to a 13- to 14-bit system
and is not a problem for most 10- to 12-bit systems unless
the system has a calibration. In this case, as with temperature hysteresis, this low level can be important and even
more careful techniques are required.
The most effective technique to improve PC board stress
is to cut slots in the board around the reference to serve as
a strain relief. These slots can be cut on three sides of the
reference and the leads can exit on the fourth side. This
“tongue” of PC board material can be oriented in the long
direction of the board to further reduce stress transferred
to the reference.
2
1
0
OUTPUT DEVIATION (mV)
–1
0
Figure 5a. Two Typical LT1461S8-2.5s,
Vertical Orientation Without Slots
2
1
0
OUTPUT DEVIATION (mV)
–1
0
Figure 5b. Two Typical LT1461S8-2.5s,
Horizontal Orientation Without Slots
1
LONG DIMENSION
0
OUTPUT DEVIATION (mV)
1461 F05a
40
–1
0
10
FLEXURE NUMBER
10
FLEXURE NUMBER
3020
SLOT
3020
40
1461 F06a
Figure 6a. Same Two LT1461S8-2.5s in Figure 5a, but with Slots
2
1
LONG DIMENSION
0
FLEXURE NUMBER
OUTPUT DEVIATION (mV)
1461 F05b
40
–1
0
10
FLEXURE NUMBER
302010
SLOT
3020
40
1461 F06b
Figure 6b. Same Two LT1461S8-2.5s in Figure 5b, but with Slots
8
Page 9
LT1461-2.5
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APPLICATIONS INFORMATION
The results of slotting the PC boards of Figures 5a and
5b are shown in Figures 6a and 6b. In this example the
slots can improve the output shift from about 100ppm to
nearly zero.
Long-Term Drift
Long-term drift cannot be extrapolated from acceler-
ated high temperature testing. This erroneous technique
gives drift numbers that are wildly optimistic. The only
way long-term drift can be determined is to measure it
over the time interval of interest. The erroneous tech-
nique uses the Arrhenius Equation to derive an acceleration factor from elevated temperature readings. The
equation is:
111
–
2
E
A
=
F
KT T
Ae
where: EA = Activation Energy (Assume 0.7)
K = Boltzmann’s Constant
T2 = Test Condition in °Kelvin
T1 = Use Condition Temperature in °Kelvin
To show how absurd this technique is, compare the
LT1461 data. Typical 1000 hour long-term drift at 30°C =
60ppm. The typical 1000 hour long-term drift at 130°C =
120ppm. From the Arrhenius Equation the acceleration
factor is:
The LT1461 long-term drift data was taken with parts that
were soldered onto PC boards similar to a “real world”
application. The boards were then placed into a constant
temperature oven with TA = 30°C, their outputs were
scanned regularly and measured with an 8.5 digit DVM. As
an additional accuracy check on the DVM, a Fluke 732A
laboratory reference was also scanned. Figure 7 shows the
long-term drift measurement system. The long-term drift
is the trend line that asymptotes to a value beyond 2000
hours. Note the slope in output shift between 0 hours and
1000 hours compared to the slope between 1000 hours
and 2000 hours. Long-term drift is affected by differential
stresses between the IC and the board material created
during board assembly.
PCB3
PCB2
PCB1
FLUKE
732A
LABORATORY
REFERENCE
Figure 7. Long-Term Drift Measurement Setup
SCANNER
8.5 DIGIT
DVM
COMPUTER
1461 F07
.
0 000086313031403
Ae
=
F
.
07
–
767
=
The erroneous projected long-term drift is:
120ppm/767 = 0.156ppm/1000 hr
For a 2.5V reference, this corresponds to a 0.39µV shift
after 1000 hours. This is pretty hard to determine (read
impossible) if the peak-to-peak output noise is larger than
this number. As a practical matter, one of the best laboratory references available is the Fluke 732A and its longterm drift is 1.5µV/mo. This performance is only available
from the best subsurface zener references utilizing specialized heater techniques.
Hysteresis
The hysteresis curves found in the Typical Performance
Characteristics represent the worst-case data taken on 35
typical parts after multiple temperature cycles. As expected, the parts that are cycled over the wider –40°C to
125°C temperature range have more hysteresis than those
cycled over lower ranges. Note that the hysteresis coming
from 125°C to 25°C has an influence on the – 40°C to 25°C
hysteresis. The –40°C to 25°C hysteresis is different
depending on the part’s previous temperature. This is
because not all of the high temperature stress is relieved
during the 25°C measurement.
9
Page 10
LT1461-2.5
U
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APPLICATIONS INFORMATION
The typical performance hysteresis curves are for parts
mounted in a socket and represents the performance of
the parts alone. What is more interesting are parts IR soldered onto a PC board. If the PC board is then temperature
cycled several times from –40°C to 85°C, the resulting
hysteresis curve is shown in Figure 8. This graph shows
the influence of the PC board stress on the reference.
When the LT1461 is soldered onto a PC board, the output
shifts due to thermal hysteresis. Figure 9 shows the effect
of soldering 40 pieces onto a PC board using standard IR
reflow techniques. The average output voltage shift is
–110ppm. Remeasurement of these parts after 12 days
shows the outputs typically shift back 45ppm toward their
initial value. This second shift is due to the relaxation of
stress incurred during soldering.
12
WORST-CASE HYSTERESIS
11
ON 35 UNITS
10
9
8
7
6
5
4
NUMBER OF UNITS
3
2
1
0
–160–120–80– 40
–200
HYSTERESIS (ppm)
The LT1461 is capable of dissipating high power, i.e.,
17.5V • 50mA = 875mW. The SO-8 package has a thermal
resistance of 190°C/W and this dissipation causes a
166°C internal rise producing a junction temperature of
TJ = 25°C + 166°C = 191°C. What will actually occur is the
thermal shutdown will limit the junction temperature to
around 150°C. This high temperature excursion will cause
the output to shift due to thermal hysteresis. Under these
conditions, a typical output shift is –135ppm, although
this number can be higher. This high dissipation can cause
the 25°C output accuracy to exceed its specified limit. For
best accuracy and precision, the LT1461 junction temperature should not exceed 125°C.
–40°C TO 25°C85°C TO 25°C
04080120160200
1461 F08
10
Figure 8. –40°C to 85°C Hysteresis of 35 Parts Soldered Onto a PC Board
12
10
8
6
4
NUMBER OF UNITS
2
0
–300
–1000100
–200
OUTPUT VOLTAGE SHIFT (ppm)
200300
1461 F09
Figure 9. Typical Distribution of Output Voltage Shift After Soldering Onto PC Board
Page 11
WW
SI PLIFIED SCHE ATIC
3SHDN
LT1461-2.5
V
2
IN
V
6
OUT
GND
4
1461 SS
PACKAGE DESCRIPTION
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
×
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
45
7
8
0.228 – 0.244
(5.791 – 6.197)
1
2
°
0°– 8° TYP
0.053 – 0.069
(1.346 – 1.752)
5
6
0.150 – 0.157**
(3.810 – 3.988)
3
4
0.004 – 0.010
(0.101 – 0.254)
0.016 – 0.050
(0.406 – 1.270)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
0.014 – 0.019
(0.355 – 0.483)
TYP
0.050
(1.270)
BSC
SO8 1298
11
Page 12
LT1461-2.5
TYPICAL APPLICATION
U
Low Power 16-Bit A/D
200µA35µA1µF
V
CC
V
REF
V
IN
= 4µV
= 6.25µV
V
CC
LTC2400
GND
= 16µV
RMS
= 24µV
RMS
RMS
F
O
SCK
SD0
CS
= 36µV
P-P
1461 TA03
P-P
P-P
SPI
INTERFACE
V
CC
LT1461-2.5
V
GND
OUT
1µF
INPUT
0.1µF
NOISE PERFORMANCE*
= 0V, V
V
IN
VIN = V
VIN = V
*FOR 24-BIT PERFORMANCE USE LT1236 REFERENCE
REF
REF
NOISE
/2, V
, V
= 1.1ppm
NOISE
NOISE
= 1.6ppm
= 2.5ppm
RMS
RMS
= 2.25µV
RMS
RELATED PARTS
PART NUMBERDESCRIPTIONCOMMENTS
LT1019Precision ReferenceBandgap, 0.05%, 5ppm/°C
LT1027Precision 5V ReferenceLowest TC, High Accuracy, Low Noise, Zener Based
LT1236Precision Reference5V and 10V Zener-Based 5ppm/°C, SO-8 Package
LTC®1798Micropower Low Dropout Reference0.15% Max, 6.5µA Supply Current
LT1460Micropower Precision Series ReferenceBandgap, 130µA Supply Current 10ppm/°C, Available in SOT-23
LT1634Micropower Precision Shunt Voltage ReferenceBandgap 0.05%, 10ppm/°C, 10µA Supply Current
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear-tech.com
146125f LT/TP 0100 4K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1999
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