The LT®1351 is a low power, high speed, high slew rate
operational amplifier with outstanding AC and DC performance. The LT1351 features lower supply current, lower
input offset voltage, lower input bias current and higher
DC gain than devices with comparable bandwidth. The
circuit combines the slewing performance of a current
feedback amplifier in a true operational amplifier with
matched high impedance inputs. The high slew rate ensures that the large-signal bandwidth is not degraded. The
amplifier is a single gain stage with outstanding settling
characteristics which make the circuit an ideal choice for
data acquisition systems. The output drives a 1kΩ load to
±13V with ± 15V supplies and a 500Ω load to ±3.4V on ±5V
supplies. The amplifier is also stable with any capacitive
load which makes it useful in buffer or cable driver
applications.
The LT1351 is a member of a family of fast, high performance amplifiers using this unique topology and employing Linear Technology Corporation’s advanced
complementary bipolar processing. For dual and quad
amplifier versions of the LT1351 see the LT1352/LT1353
data sheet. For higher bandwidth devices with higher
supply current see the LT1354 through LT1365 data sheets.
Singles, duals and quads of each amplifier are available.
, LTC and LT are registered trademarks of Linear Technology Corporation.
C-Load is a trademark of Linear Technology Corporation.
U
TYPICAL APPLICATION
Instrumentation Amplifier
R1
50k
–
V
IN
+
GAIN = [R4/R3][1 + (1/2)(R2/R1 + R3/R4) + (R2 + R3)/R5] = 102
TRIM R5 FOR GAIN
TRIM R1 FOR COMMON MODE REJECTION
BW = 30kHz
–
LT1351
+
R2
5k
R5
1.1k
R3
5k
–
+
50k
LT1351
Large-Signal Response
R4
V
OUT
1351 TA01
AV = –11351 TA02
1
Page 2
LT1351
1
2
3
4
8
7
6
5
TOP VIEW
NULL
–IN
+IN
V
–
NULL
V
+
V
OUT
SHDN
N8 PACKAGE
8-LEAD PDIP
S8 PACKAGE
8-LEAD PLASTIC SO
WW
W
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ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V–) .............................. 36V
Differential Input Voltage (Transient Only, Note 1)...
±10V
Input Voltage .......................................................... ±V
Note 1: Differential inputs of ±10V are appropriate for transient operation
only, such as during slewing. Large, sustained differential inputs will cause
excessive power dissipation and may damage the part. See Input
Considerations in the Applications Information section of this data sheet
for more details.
Note 2: A heat sink may be required to keep the junction temperature
+ 0.1V±5V30µA
EE
Note 4: Full-power bandwidth is calculated from the slew rate
measurement: FPBW = (Slew Rate)/2πV
.
P
Note 5: This parameter is not 100% tested.
Note 6: The LT1351 is designed, characterized and expected to meet these
extended temperature limits, but is not tested at –40°C and at 85°C.
Guaranteed I grade parts are available; consult factory.
below absolute maximum when the output is shorted indefinitely.
Note 3: Slew rate is measured between ±8V on the output with ±12V
input for ±15V supplies and ±2V on the output with ±3V input for ±5V
supplies.
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
and Temperature
350
300
125°C
250
25°C
200
–55°C
SUPPLY CURRENT (µA)
150
100
0
5
10
SUPPLY VOLTAGE (±V)
15
20
1351 G01
Input Common Mode Range
vs Supply Voltage
+
V
TA = 25°C
–0.5
–1.0
–1.5
–2.0
2.0
1.5
COMMON MODE RANGE (V)
1.0
0.5
V
= 1mV
∆V
OS
–
0
5
10
SUPPLY VOLTAGE (±V)
15
1351 G02
Input Bias Current
vs Input Common Mode Voltage
30
TA = 25°C
= ±15V
V
S
+
–10
+ I
I
B
2
–
B
–505
1015
1351 G03
20
IB =
10
0
INPUT BIAS CURRENT (nA)
–10
–20
20
–15
INPUT COMMON MODE VOLTAGE (V)
5
Page 6
LT1351
LOAD RESISTANCE (Ω)
10
60
OPEN-LOOP GAIN (dB)
90
100
110
1001k10k
1351 G06
80
70
TA = 25°C
VS = ±5V
VS = ±15V
OUTPUT CURRENT (mA)
–20
V
–
OUTPUT VOLTAGE SWING (V)
0.5
1.5
2.0
V
+
25°C
25°C
–1.5
–10
0
5
1351 G09
1.0
–1.0
–0.5
–2.0
–15–5
10
15
20
VS = ±5V
V
IN
= 10mV
85°C
85°C
–40°C
–40°C
–40°C
–40°C
85°C
85°C
25°C
25°C
SETTLING TIME (µs)
0.5
OUTPUT STEP (V)
2
6
10
1.3
1351 G12
–2
–6
0
4
8
–4
–8
–10
0.7
0.9
1.1
0.61.4
0.8
1.0
1.2
1.5
VS = ±15V
A
V
= –1
R
G
= RF = 2k
C
F
= 5pF
R
L
= 2k
10mV1mV
1mV10mV
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U
TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current vs TemperatureOpen-Loop Gain vs Resistive LoadInput Noise Spectral Density
40
VS = ±15V
36
32
28
24
20
16
12
INPUT BIAS CURRENT (nA)
8
4
0
–50
+
=
–25
+ I
I
B
2
–
B
0
TEMPERATURE (°C)
I
B
50
25
75
100
1351 G04
125
INPUT VOLTAGE NOISE (nV/√Hz)
100
TA = 25°C
= ±15V
V
S
= 101
A
V
= 100k
R
S
e
n
10
i
n
1
1
10
FREQUENCY (Hz)
100
1k10k
1351 G05
10
INPUT CURRENT NOISE (pA/√Hz)
1
0.1
Open-Loop Gain vs Temperature
100
VS = ±15V
= ±12V
V
O
99
= 5k
R
L
98
97
96
OPEN-LOOP GAIN (dB)
95
94
–50
–250
Output Short-Circuit Current
vs Temperature
60
VS = ±15V
55
50
45
40
35
6
30
OUTPUT SHORT-CIRCUIT CURRENT (mA)
25
–50
–250
TEMPERATURE (°C)
SOURCE
TEMPERATURE (°C)
50100 125
2575
SINK
50100 125
2575
Output Voltage Swing
vs Supply Voltage
+
V
15
RL = 2k
R
= 1k
L
RL = 1k
RL = 2k
1351 G08
1351 G07
–1
–2
–3
OUTPUT VOLTAGE SWING (V)
TA = 25°C
V
3
2
1
–
V
0
= ±10mV
IN
51020
SUPPLY VOLTAGE (V)
Settling Time vs Output Step
(Noninverting)
10
8
6
4
2
0
–2
OUTPUT STEP (V)
–4
–6
–8
–10
0.7
1351 G10
10mV1mV
0.81
0.9
SETTLING TIME (µs)
10mV
1.21.6
1.1
1.3
1mV
VS = ±15V
= 1
A
V
OUTPUT
FILTER:
1.6MHz
LPF
1.4
1.5
1351 G11
Output Voltage Swing
vs Load Current
Settling Time vs Output Step
(Inverting)
Page 7
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FREQUENCY (Hz)
100
0
COMMON MODE REJECTION RATIO (dB)
20
40
60
80
100
120
1k10k100k1M
1351 G21
10M
TA = 25°C
V
S
= ±15V
FREQUENCY (Hz)
10k
–2
GAIN (dB)
0
2
4
6
100k1M10M
1351 G15
–4
–6
–8
–10
8
10
TA = 25°C
V
S
= ±15V
A
V
= –1
R
FB
= RG = 5k
C = 500pF
C = 100pF
C = 5000pF
C = 1000pF
C = 10pF
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TYPICAL PERFORMANCE CHARACTERISTICS
Gain and Phase vs Frequency
70
60
50
40
30
GAIN (dB)
20
10
0
–10
10k
1k100k1M100M
PHASE
VS = ±15V
V
GAIN
FREQUENCY (Hz)
T
= 25°C
A
= –1
A
V
= RG = 5k
R
F
V
= ±15V
S
= ±5VVS = ±5V
S
10M
1351 G13
120
100
80
PHASE (DEG)
60
40
20
0
–20
–40
Output Impedance vs Frequency
1000
TA = 25°C
= ±15V
V
S
100
AV = 100
AV = 10
10
1
OUTPUT IMPEDANCE (Ω)
0.1
0.01
1k100k1M10M
10k
AV = 1
FREQUENCY (Hz)
LT1351
Frequency Response
vs Capacitive Load
1351 G14
Gain Bandwidth and Phase Margin
vs Temperature
4.50
4.25
4.00
0
–25
TEMPERATURE (°C)
PHASE MARGIN
GAIN BANDWIDTH
3.75
3.50
3.25
3.00
2.75
GAIN BANDWIDTH (MHz)
2.50
2.25
2.00
–50
Gain Bandwidth and Phase Margin
vs Supply Voltage
4.50
TA = 25°C
4.25
4.00
3.75
3.50
3.25
3.00
2.75
GAIN BANDWIDTH (MHz)
2.50
2.25
2.00
0
5
SUPPLY VOLTAGE (±V)
VS = ±15V
V
= ±5V
S
V
= ±15V
S
= ±5V
V
S
50
25
PHASE MARGIN
GAIN BANDWIDTH
75
10
Frequency Response
vs Supply Voltage (AV = 1)
100
1351 G16
50
48
46
PHASE MARGIN (DEG)
44
42
40
38
36
34
32
30
125
5
4
3
2
1
0
GAIN (dB)
–1
–2
–3
–4
–5
10k
TA = 25°C
= 1
A
V
= 5k
R
L
±15V
±5V
±2.5V
100k1M10M
FREQUENCY (Hz)
1351 G17
Power Supply Rejection Ratio
vs Frequency
50
48
46
44
42
40
38
36
34
32
30
15
20
1351 G19
120
100
PHASE MARGIN (DEG)
80
60
40
20
POWER SUPPLY REJECTION RATIO (dB)
0
10
100
1k10k 100k
FREQUENCY (Hz)
–PSRR = +PSRR
TA = 25°C
= ±15V
V
S
1M10M
1351 G20
Frequency Response
vs Supply Voltage (AV = –1)
5
TA = 25°C
4
= –1
A
V
= RG = 5k
R
L
3
2
1
0
GAIN (dB)
–1
–2
–3
–4
–5
10k
100k1M10M
FREQUENCY (Hz)
±2.5V
Common Mode Rejection Ratio
vs Frequency
±15V
±5V
1351 G18
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Page 8
LT1351
CAPACITIVE LOAD (F)
10p
40
OVERSHOOT (%)
50
60
70
80
100p1n10n0.1µ1µ
1351 G30
30
20
10
0
90
100
TA = 25°C
V
S
= ±15V
R
L
= 5k
AV = 1
A
V
= –1
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Slew Rate vs Supply Voltage
200
TA = 25°C
= –1
A
V
= RG = 5k
R
F
+
+ SR–)/2
SR = (SR
150
100
SLEW RATE (V/µs)
50
0
0
510
SUPPLY VOLTAGE (±V)
Total Harmonic Distortion
vs Frequency
1
TA = 25°C
= ±15V
V
S
= 5k
R
L
= 2V
V
O
P-P
0.1
0.01
AV = –1
TOTAL HARMONIC DISTORTION (%)
0.001
10
AV = 1
1001k10k100k
FREQUENCY (Hz)
1351 G22
1351 G25
Slew Rate vs TemperatureSlew Rate vs Input Level
250
200
VS = ±15V
150
100
SLEW RATE (V/µs)
50
15
0
–50 –25
0
TEMPERATURE (°C)
VS = ±5V
25
AV = –1
= RG = RL = 5k
R
F
SR = (SR
50
75
+
+ SR–)/2
100
125
1351 G23
Undistorted Output Swing
vs Frequency (±15V)
30
AV = –1
25
)
P-P
20
15
10
OUTPUT VOLTAGE (V
VS = ±15V
5
= 5k
R
L
THD = 1%
0
10k
AV = 1
100k1M
FREQUENCY (Hz)
1351 G26
200
TA = 25°C
= ±15V
V
S
175
= –1
A
V
= RG = 5k
R
FB
150
125
100
75
SLEW RATE (V/µs)
50
25
0
0
+
+ SR–)/2
SR = (SR
48 16
INPUT LEVEL (V
Undistorted Output Swing
vs Frequency (±5V)
10
9
8
)
P-P
7
6
5
4
3
OUTPUT VOLTAGE (V
2
VS = ±5V
= 5k
R
L
1
THD = 1%
0
10k
FREQUENCY (Hz)
P-P
20
)
1351 G24
AV = 1
1351 G27
12
= –1
A
V
100k1M
24
8
2nd and 3rd Harmonic Distortion
vs Frequency
–30
= ±15V
V
S
= 1
A
V
–40
= 5k
R
L
= 2V
V
O
P-P
–50
3RD HARMONIC
–60
–70
HARMONIC DISTORTION (dB)
–80
–90
100k
2ND HARMONIC
FREQUENCY (Hz)
1351 G28
1M
Shutdown Supply Current
vs Temperature
100
VS = ±15V
90
80
70
60
50
40
30
SUPPLY CURRENT (µA)
20
10
0
–50
–25
V
V
SHDN
0
= V
SHDN
= V
EE
V
SHDN
25
TEMPERATURE (°C)
EE
+ 0.1
= V
+ 0.2
EE
50
Capacitive Load Handling
100
125
1351 G29
75
Page 9
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TYPICAL PERFORMANCE CHARACTERISTICS
LT1351
Small-Signal Transient
(AV = 1)
Large-Signal Transient
(AV = 1)
Small-Signal Transient
(AV = –1)
Large-Signal Transient
(AV = –1)
Small-Signal Transient
(AV = –1, CL = 1000pF)
1351 G331351 G321351 G31
Large-Signal Transient
(AV = 1, CL = 10,000pF)
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WUU
APPLICATIONS INFORMATION
The LT1351 may be inserted directly into many high
speed amplifier applications improving both DC and AC
performance, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT1351 is
shown in Figure 1.
+
V
3
+
LT1351
2
–
Figure 1. Offset Nulling
7
4
8
1
100k
–
V
0.1µF
6
0.1µF
1351 F01
1351 G361351 G351351 G34
Layout and Passive Components
The LT1351 amplifier is easy to apply and tolerant of less
than ideal layouts. For maximum performance (for example fast settling time) use a ground plane, short lead
lengths and RF-quality bypass capacitors (0.01µF to 0.1µF).
For high drive current applications use low ESR bypass
capacitors (1µ F to 10µ F tantalum). For details see Design
Note 50.
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input can combine with
the input capacitance to form a pole which can cause
peaking or even oscillations. For feedback resistors greater
than 10k, a parallel capacitor of value, CF > (RG)(CIN/RF)
should be used to cancel the input pole and optimize
dynamic performance. For applications where the DC
9
Page 10
LT1351
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APPLICATIONS INFORMATION
noise gain is one and a large feedback resistor is used, C
should be greater than or equal to CIN. An example would
be an I-to-V converter as shown in the Typical Applications
section.
Capacitive Loading
The LT1351 is stable with any capacitive load. As the
capacitive load increases, both the bandwidth and phase
margin decrease so there will be peaking in the frequency
domain and in the transient response. Graphs of Frequency Response vs Capacitive Load, Capacitive Load
Handling and the transient response photos clearly show
these effects.
Input Considerations
Each of the LT1351 inputs is the base of an NPN and
a PNP transistor whose base currents are of opposite
polarity and provide first-order bias current cancellation.
Because of variation in the matching of NPN and PNP
beta, the polarity of the input bias current can be positive
or negative. The offset current does not depend on
NPN/PNP beta matching and is well controlled. The use of
balanced source resistance at each input is recommended
for applications where DC accuracy must be maximized.
The inputs can withstand transient differential input voltages up to 10V without damage and need no clamping or
source resistance for protection. Differential inputs, however, generate large supply currents (tens of mA) as
required for high slew rates. If the device is used with
sustained differential inputs, the average supply current
will increase, excessive power dissipation will result and
the part may be damaged.
a comparator, peak detector or other open-loop application with large, sustained differential inputs
normal, closed-loop operation, an increase of power
dissipation is only noticeable in applications with large
slewing outputs and is proportional to the magnitude of
the differential input voltage and the percent of the time
that the inputs are apart. Measure the average supply
current for the application in order to calculate the power
dissipation.
The part should not be used as
. Under
F
Shutdown
The LT1351 has a Shutdown pin for conserving power.
When this pin is open or 2V above the negative supply the
part operates normally. When pulled down to V– the
supply current will drop to about 10µ A. The current out of
the Shutdown pin is also typically 10µA. In shutdown the
amplifier output is not isolated from the inputs so the
LT1351 cannot be used in multiplexing applications using
the shutdown feature.
A level shift application is shown in the Typical Applications section so that a ground-referenced logic signal can
control the Shutdown pin.
Circuit Operation
The LT1351 circuit topology is a true voltage feedback
amplifier that has the slewing behavior of a current
feedback amplifier. The operation of the circuit can be
understood by referring to the simplified schematic.
The inputs are buffered by complementary NPN and PNP
emitter followers which drive R1, a 1k resistor. The input
voltage appears across the resistor generating currents
which are mirrored into the high impedance node and
compensation capacitor CT. Complementary followers
form an output stage which buffers the gain node from
the load. The output devices Q19 and Q22 are connected
to form a composite PNP and composite NPN.
The bandwidth is set by the input resistor and the
capacitance on the high impedance node. The slew rate
is determined by the current available to charge the
capacitance. This current is the differential input voltage
divided by R1, so the slew rate is proportional to the
input. Highest slew rates are therefore seen in the lowest
gain configurations. For example, a 10V output step in a
gain of 10 has only a 1V input step whereas the same
output step in unity gain has a 10 times greater input step.
The curve of Slew Rate vs Input Level illustrates this
relationship.
Capacitive load compensation is provided by the RC, C
network which is bootstrapped across the output stage.
When the amplifier is driving a light load the network has
no effect. When driving a capacitive load (or a low value
C
10
Page 11
LT1351
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WUU
APPLICATIONS INFORMATION
resistive load) the network is incompletely bootstrapped
and adds to the compensation at the high impedance
node. The added capacitance slows down the amplifier
and a zero is created by the RC combination, both of
WW
SI PLIFIED SCHE ATIC
+
V
Q10
Q3
Q7
R1
–IN
Q5
Q6
1k
Q4
Q8
Q1
Q2
+IN
which improve the phase margin. The design ensures
that even for very large load capacitances the total phase
lag can never exceed 180 degrees (zero phase margin)
and the amplifier remains stable.
R3
Q21
OUTPUT
Q11
Q9
Q13
R2
Q12
R6
Q17
C
T
Q18
R
C
R7
Q20
C1
Q19
C
C
Q22
C2
–
V
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TYPICAL APPLICATIONS
4.64k
V
IN
13.3k
2200pF
Q14
Q15
20kHz, 4th Order Butterworth Filter
4.64k
470pF
–
LT1351
+
5.49k
11.3k
4700pF
5.49k
–
+
Q16
220pF
LT1351
Q23
V
1351 TA03
OUT
Q24
R4
R5
1351 SS
11
Page 12
LT1351
TYPICAL APPLICATIONS
SHDN
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1N4148
Shutdown Circuit
1M
S
G
SST177
D
1M
3
+
LT1351
2
–
G
5
S
SST177
D
–
V
6
1351 TA04
DAC I-to-V Converter
12
DAC
INPUTS
565A TYPE
V
VOS + IOS (5kΩ) + < 0.5LSB
OUT
A
VOL
10pF
5k
–
LT1351
V
OUT
+
5k
1351 TA05
12
Page 13
PACKAGE DESCRIPTION
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Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
7
6
5
LT1351
0.192 ± 0.004
(4.88 ± 0.10)
12
3
0.040 ± 0.006
SEATING
PLANE
(1.02 ± 0.15)
0.012
(0.30)
0.0256
REF
(0.65)
TYP
0.007
(0.18)
0.021 ± 0.006
(0.53 ± 0.015)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
0° – 6° TYP
0.118 ± 0.004**
(3.00 ± 0.102)
4
0.034 ± 0.004
(0.86 ± 0.102)
0.006 ± 0.004
(0.15 ± 0.102)
MSOP (MS8) 1197
13
Page 14
LT1351
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
876
5
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.065
(1.651)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
TYP
(2.540 ± 0.254)
12
0.045 – 0.065
(1.143 – 1.651)
0.100 ± 0.010
3
4
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.020
(0.508)
MIN
N8 1197
14
Page 15
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
7
8
5
6
LT1351
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
× 45°
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.228 – 0.244
(5.791 – 6.197)
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.150 – 0.157**
(3.810 – 3.988)
1
3
2
4
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
SO8 0996
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1352/LT1353Dual/Quad 250µA, 3MHz, 200V/µs Op AmpGood DC Precision, Stable with All Capacitive Loads
LT13541mA, 12MHz, 400V/µs Op AmpGood DC Precision, Stable with All Capacitive Loads
16
Linear T echnolog y Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear-tech.com
1351fa LT/TP 0498 REV A 2K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1996
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