Datasheet LT1226 Datasheet (Linear Technology)

LT1226

Low Noise Very High Speed

Operational Amplifier

EATU

F

■

Gain of 25 Stable

■

1GHz Gain Bandwidth

■

400V/µs Slew Rate

■

2.6nV/√Hz Input Noise Voltage

■

50V/mV Minimum DC Gain, RL = 500Ω

■

1mV Maximum Input Offset Voltage

■

±12V Minimum Output Swing into 500Ω

■

Wide Supply Range ±2.5V to ±15V

■

7mA Supply Current

■

100ns Settling Time to 0.1%, 10V Step

■

Drives All Capacitive Loads

PPLICATI

A

■

Wideband Amplifiers

■

Buffers

■

Active Filters

■

Video and RF Amplification

■

Cable Drivers

■

Data Acquisition Systems

RE

S

O

U S

DUESCRIPTIO

The LT1226 is a low noise, very high speed operational amplifier with excellent DC performance. The LT1226 features low input offset voltage and high DC gain. The circuit is a single gain stage with outstanding settling characteristics. The fast settling time makes the circuit an ideal choice for data acquisition systems. The output is capable of driving a 500Ω load to ±12V with ± 15V supplies and a 150Ω load to ±3V on ±5V supplies. The circuit is also capable of driving large capacitive loads which makes it useful in buffer or cable driver applications.

The LT1226 is a member of a family of fast, high performance amplifiers that employ Linear Technology Corporation’s advanced bipolar complementary processing.

U

O

A

PPLICATITYPICAL

Photodiode Preamplifier, AV = 5.1kΩ, BW = 15MHz Gain of +25 Pulse Response

+

V

+

51Ω

LT1226

–

5.1k

LT1226 TA01

LT1226 TA02

1

LT1226

WU

U

PACKAGE

/

O

RDER I FOR ATIO

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O

A

LUTEXI T

S

Total Supply Voltage (V+ to V–) ............................... 36V

Differential Input Voltage .........................................±6V

Input Voltage ............................................................±V

Output Short Circuit Duration (Note 1) ............Indefinite

Operating Temperature Range

LT1226C................................................ 0°C to 70°C

Maximum Junction Temperature

Plastic Package .............................................. 150°C

Storage Temperature Range ................. – 65°C to 150°C

A

WUW

ARB

U G

I

S

TOP VIEW

1

NULL

2

–IN

3

+IN

–

4

V

N8 PACKAGE

8-LEAD PLASTIC DIP

8

NULL

+

V

7

OUT

6

NC

5

S8 PACKAGE

8-LEAD PLASTIC SOIC

LT1226 PO01

ORDER PART

NUMBER

LT1226CN8 LT1226CS8

S8 PART MARKING

1226

Lead Temperature (Soldering, 10 sec.)................. 300°C

LECTRICAL C CHARA TERIST

E

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

I

OS

I

B

e

n

i

n

R

IN

C

IN

CMRR Common-Mode Rejection Ratio VCM = ±12V 94 103 dB PSRR Power Supply Rejection Ratio VS = ±5V to ±15V 94 110 dB A

VOL

V

OUT

I

OUT

SR Slew Rate (Note 3) 250 400 V/µs

GBW Gain Bandwidth f = 1MHz 1 GHz tr, t

f

t

s

R

O

I

S

Input Offset Voltage (Note 2) 0.3 1.0 mV Input Offset Current 100 400 nA Input Bias Current 48 µA Input Noise Voltage f = 10kHz 2.6 nV/√Hz Input Noise Current f = 10kHz 1.5 pA/√Hz Input Resistance VCM = ±12V 24 40 MΩ

Input Capacitance 2pF Input Voltage Range + 12 14 V Input Voltage Range – –13 –12 V

Large Signal Voltage Gain V Output Swing RL = 500Ω 12.0 13.3 ±V Output Current V

Full Power Bandwidth 10V Peak, (Note 4) 6.4 MHz

Rise Time, Fall Time A Overshoot A Propagation Delay 50% VIN to 50% V Settling Time 10V Step, 0.1%, AV = –25 100 ns Differential Gain f = 3.58MHz, AV = +25, RL = 150Ω 0.7 % Differential Phase f = 3.58MHz, AV = +25, RL = 150Ω 0.6 Deg Output Resistance A Supply Current 79 mA

ICS

VS = ±15V, TA = 25°C, VCM = 0V unless otherwise noted.

Differential 15 kΩ

= ±10V, RL = 500Ω 50 150 V/mV

OUT

= ±12V 24 40 mA

OUT

= +25,10% to 90%, 0.1V 5.5 ns

VCL

= +25, 0.1V 35 %

VCL

OUT

= +25, f = 1MHz 3.1 Ω

VCL

5.5 ns

2

LT1226

LECTRICAL C CHARA TERIST

E

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

I

OS

I

B

CMRR Common-Mode Rejection Ratio VCM = ±2.5V 94 103 dB A

VOL

V

OUT

I

OUT

SR Slew Rate (Note 3) 250 V/µs

GBW Gain Bandwidth f = 1MHz 700 MHz tr, t

f

t

s

I

S

Input Offset Voltage (Note 2) 1.0 1.4 mV Input Offset Current 100 400 nA Input Bias Current 48 µA Input Voltage Range + 2.5 4 V Input Voltage Range – –3 – 2.5 V

Large Signal Voltage Gain V

Output Voltage RL = 500Ω 3.0 3.7 ±V

Output Current V

Full Power Bandwidth 3V Peak, (Note 4) 13.3 MHz

Rise Time, Fall Time A Overshoot A Propagation Delay 50% VIN to 50% V Settling Time –2.5V to 2.5V, 0.1%, AV = –24 60 ns Supply Current 79 mA

ICS

VS = ±5V, TA = 25°C, VCM = 0V unless otherwise noted.

= ±2.5V, RL = 500Ω 50 100 V/mV

OUT

= ±2.5V, RL = 150Ω 75 V/mV

V

OUT

= 150Ω 3.0 3.3 ±V

R

L

= ±3V 20 40 mA

OUT

= +25, 10% to 90%, 0.1V 8 ns

VCL

= +25, 0.1V 25 %

VCL

OUT

8ns

LECTRICAL C CHARA TERIST

E

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

I

OS

I

B

CMRR Common-Mode Rejection Ratio VS = ±15V, VCM = ±12V and VS = ±5V, VCM = ±2.5V 92 103 dB PSRR Power Supply Rejection Ratio VS = ±5V to ±15V 92 110 dB A

VOL

V

OUT

I

OUT

SR Slew Rate VS = ±15V, (Note 3) 250 400 V/µs I

S

Note 1: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely.

Note 2: Input offset voltage is tested with automated test equipment in <1 second.

Input Offset Voltage VS = ±15V, (Note 2) 0.3 1.3 mV

= ± 5V, (Note 2) 1.0 1.8 mV

V

S

Input V Input Offset Current VS = ±15V and VS = ±5V 100 600 nA Input Bias Current VS = ±15V and VS = ±5V 4 9 µA

Large Signal Voltage Gain VS = ±15V, V

Output Swing VS = ±15V, RL = 500Ω 12.0 13.3 ±V

Output Current VS = ±15V, V

Supply Current VS = ±15V and VS = ±5V 7 10.5 mA

Drift 6 µ V/°C

OS

= ±5V, V

V

S

= ±5V, RL = 500Ω or 150Ω 3.0 3.3 ±V

V

S

= ±5V, V

V

S

0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.

ICS

= ±10V, RL = 500Ω 35 150 V/mV

OUT

= ±2.5V, RL = 500Ω 35 100 V/mV

OUT

= ±12V 24 40 mA

OUT

= ±3V 20 40 mA

OUT

Note 3: Slew rate is measured between ±10V on an output swing of ±12V on ±15V supplies, and ±2V on an output swing of ±3.5V on ±5V supplies.

Note 4: Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/2πVp.

3

LT1226

SUPPLY VOLTAGE (±V)

0

OUTPUT VOLTAGE SWING (V)

5

10

15

20

5101520

LT1226 TPC03

TA = 25°C R

L

= 500Ω

∆V

OS

= 30mV

+V

SW

–V

SW

UW

Y

PICA

20

15

LPER

F

O

R

AT

CCHARA TERIST

E

C

ICS

Input Common Mode Range vs Output Voltage Swing vs Supply Voltage Supply Current vs Supply Voltage Supply Voltage

8.0

TA = 25°C

< 1mV

∆V

OS

TA = 25°C

7.5

10

5

MAGNITUDE OF INPUT VOLTAGE (V)

0

+V

CM

–V

5101520

SUPPLY VOLTAGE (±V)

CM

LT1226 TPC01

7.0

SUPPLY CURRENT (mA)

6.5

6.0 0

5101520

SUPPLY VOLTAGE (±V)

LT1226 TPC02

Output Voltage Swing vs Input Bias Current vs Input Open Loop Gain vs Resistive Load Common Mode Voltage Resistive Load

30

TA = 25°C

= 30mV

∆V

25

20

15

10

OUTPUT VOLTAGE SWING (Vp-p)

OS

5

0

10

100 1k 10k

LOAD RESISTANCE (Ω)

VS = ±15V

VS = ±5V

LT1226 TPC04

5.0

VS = ±15V

= 25°C

T

A

+ I

I

B+

IB =

4.5

4.0

3.5

INPUT BIAS CURRENT (µA)

3.0

–15

INPUT COMMON MODE VOLTAGE (V)

B–

2

–10 0 10 15

–5 5

LT1226 TPC05

120

TA = 25°C

110

100

90

OPEN LOOP GAIN (dB)

80

70

10

VS = ±15V

VS = ±5V

100 1k 10k

LOAD RESISTANCE (Ω)

LT1226 TPC06

Supply Current vs Temperature Input Bias Current vs Temperature Temperature

10

VS = ±15V

9

8

7

6

SUPPLY CURRENT (mA)

5

4

–25 25 75 125

–50

4

TEMPERATURE (°C)

100500

LT1226 TPC07

INPUT BIAS CURRENT (µA)

5.0

4.75

4.5

4.25

4.0

3.75

3.5

–25 25 75 125

–50

TEMPERATURE (°C)

VS = ±15V

+ I

I

B+

B–

IB =

2

100500

LT1226 TPC08

Output Short Circuit Current vs

55

50

45

40

35

30

OUTPUT SHORT CIRCUIT CURRENT (mA)

25

–50

SOURCE

–25 25 75 125

TEMPERATURE (°C)

SINK

VS = ±5V

100500

LT1226 TPC09

UW

FREQUENCY (Hz)

1k

0

COMMON MODE REJECTION RATIO (dB)

20

40

60

80

100

120

10k 100k 1M 10M

LT1226 TPC12

100M

VS = ±15V T

A

= 25°C

FREQUENCY (HZ)

1M

18

VOLTAGE MAGNITUDE (dB)

22

26

30

34

38

10M 100M

C = 100pF

C = 0pF

C = 50pF

LT1226 TPC15

20

24

28

32

36

VS = ±15V T

A

= 25°C

A

V

= –25

C = 1000pF 

C = 500pF

Y

PICA

1000

100

10

LPER

F

O

R

AT

CCHARA TERIST

E

C

ICS

Power Supply Rejection Ratio vs Common Mode Rejection Ratio vs

Input Noise Spectral Density Frequency Frequency

VS = ±15V

= 25°C

T

A

= +101

A

V

i

n

= 100kΩ

R

S

10

1.0

0.1

INPUT VOLTAGE NOISE (nV/√Hz)

120

100

VS = ±15V

= 25°C

T

A

80

+PSRR–PSRR

60

LT1226

INPUT VOLTAGE NOISE (nV/√Hz)

1

10 1k 10k 100k

100

e

n

FREQUENCY (Hz)

0.01

LT1226 TPC10

40

POWER SUPPLY REJECTION RATIO (dB)

0

100

10k 100k 1M

1k

FREQUENCY (Hz)

10M 100M

LT1226 TPC11

Voltage Gain and Phase vs Frequency Response vs Frequency Output Swing vs Settling Time Capacitive Load

110

90

70

50

VOLTAGE GAIN (dB)

30

TA = 25°C

10

100

1k

VS = ±5V

V

= ±5V

S

10k 100k 1M

FREQUENCY (Hz)

VS = ±15V

10M 100M

LT1226 TPC13

100

80

60

40

20

0

10

8

PHASE MARGIN (DEGREES)

6 4

2 0

–2

OUTPUT SWING (V)

–4 –6 –8

–10

0

VS = ±15

= 25°C

T

A

10mV SETTLING

AV = –25

20

40

SETTLING TIME (ns)

A

= +25

V

60

AV = +25

AV = –25

80

100

LTC1226 TPC14

120

Closed Loop Output Impedance vs Frequency Gain Bandwidth vs Temperature Slew Rate vs Temperature

100

VS = ±15V T

= 25°C

A

= +25

A

V

10

1

0.1

OUTPUT IMPEDANCE (Ω)

0.01 10k

100k

FREQUENCY (Hz)

1M

10M

LT1226 TPC16

100M



1.15 VS = ±15V

1.10

1.05

1.0

0.95

GAIN BANDWIDTH (MHz)

0.90

0.85

–50

–25 0

TEMPERATURE (˚C)

50 100 125

25 75

LT1226 TPC17

500

VS = ±15V

= –25

A

V

450

400

350

300

SLEW RATE (V/µs)

250

200

–50

–25 0

–SR

+SR

50 100 125

25 75

TEMPERATURE (˚C)

LT1226 TPC18

5

LT1226

PPLICATI

A

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I FOR ATIO

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The LT1226 may be inserted directly into HA2541, HA2544, AD847, EL2020 and LM6361 applications, provided that the amplifier configuration is a noise gain of 25 or greater, and the nulling circuitry is removed. The suggested nulling circuit for the LT1226 is shown below.

Offset Nulling

+

V

5k

1

+

LT1226

–

8

7

4

–

V

3

2

0.1µF

6

0.1µF

LT1226 AI01

Layout and Passive Components

As with any high speed operational amplifier, care must be taken in board layout in order to obtain maximum performance. Key layout issues include: use of a ground plane, minimization of stray capacitance at the input pins, short lead lengths, RF-quality bypass capacitors located close to the device (typically 0.01µF to 0.1µF), and use of low ESR bypass capacitors for high drive current applications (typically 1µF to 10µF tantalum). Sockets should be avoided when maximum frequency performance is required, although low profile sockets can provide reasonable performance up to 50MHz. For more details see Design Note 50. Feedback resistors greater than 5kΩ are not recommended because a pole is formed with the input capacitance which can cause peaking. If feedback resistors greater than 5kΩ are used, a parallel capacitor of 5pF to 10pF should be used to cancel the input pole and optimize dynamic performance.

Transient Response

Small Signal, AV = +25 Small Signal, AV = –25

LT1226 AI02

The large signal response in both inverting and noninverting gain shows symmetrical slewing characteristics. Normally the noninverting response has a much faster rising edge due to the rapid change in input common mode voltage which affects the tail current of the input differential pair. Slew enhancement circuitry has been added to the LT1226 so that the falling edge slew rate is enhanced which balances the noninverting slew rate response.

Large Signal, AV = +25 Large Signal, AV = –25

LT1226 AI03

Input Considerations

Resistors in series with the inputs are recommended for the LT1226 in applications where the differential input voltage exceeds ±6V continuously or on a transient basis. An example would be in noninverting configurations with high input slew rates or when driving heavy capacitive loads. The use of balanced source resistance at each input is recommended for applications where DC accuracy must be maximized.

The LT1226 gain bandwidth is 1GHz when measured at 1MHz. The actual frequency response in a gain of +25 is considerably higher than 40MHz due to peaking caused by a second pole beyond the gain of 25 crossover point. This is reflected in the small signal transient response. Higher noise gain configurations exhibit less overshoot as seen in the inverting gain of 25 response.

6

Capacitive Loading

The LT1226 is stable with all capacitive loads. This is accomplished by sensing the load induced output pole and adding compensation at the amplifier gain node. As the capacitive load increases, both the bandwidth and phase margin decrease so there will be peaking in the

LT1226

V

IN

V

OUT

LT1226 TA06

–

+

LT1226

300k 300k

1

8

10k 10k

25k

25Ω

100pF

LT1097

–

+

AV = 1001

PPLICATI

A

U

O

S

I FOR ATIO

WU

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frequency domain and in the transient response. The photo of the small signal response with 1000pF load shows 55% peaking. The large signal response with a 10,000pF load shows the output slew rate being limited by the short circuit current.

AV = –25, CL = 1000pF AV = +25, CL = 10,000pF

LT1226 AI04

The LT1226 can drive coaxial cable directly, but for best pulse fidelity the cable should be doubly terminated with a resistor in series with the output.

Compensation

configurations (i.e., in a gain of 1000 it will have a bandwidth of about 1MHz). The amplifier is stable in a noise gain of 25 so the ratio of the output signal to the inverting input must be 1/25 or less. Straightforward gain configurations of +25 or –24 are stable, but there are a few configurations that allow the amplifier to be stable for lower signal gains (the noise gain, however, remains 25 or more). One example is the inverting amplifier shown in the typical applications sections below. The input signal has a gain of –RF/RIN to the output, but it is easily seen that this configuration is equivalent to a gain of –24 as far as the amplifier is concerned. Lag compensation can also be used to give a low frequency gain less than 25 with a high frequency gain of 25 or greater. The example below has a DC gain of 6, but an AC gain of +31. The break frequency of the RC combination across the amplifier inputs should be at least a factor of 10 less than the gain bandwidth of the amplifier divided by the high frequency gain (in this case 1/10 of 1GHz/31 or 3MHz).

The LT1226 has a typical gain bandwidth product of 1GHz which allows it to have wide bandwidth in high gain

U

O

CA

PPLICATITYPI

L

Lag Compensation

V

IN

200Ω

330pF

1k

+

LT1226

–

AV = +6, f < 2MHz

Compensation for Lower Closed-Loop Gains

R

F

R

V

IN

R

C

–

LT1226

+

SA

+

V

IN

LT1226

–

V

OUT

R2 50Ω

5k

LT1226 TA03

V

OUT

R1

1.2k

Cable Driving

R3

75 Ω

VOS Null Loop

75 CABLE

Ω

R4 75

Ω

LT1226 TA04

V

OUT

AV = –

RF 

; R

≥ 24 × (RIN || RC)

F

R

IN

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights.

LT1226 TA05

7

LT1226

E

W

A

NULL

1 8

W

SPL

I

IIFED S

CH

+

7V

3

–

4V

PACKAGEDESCRIPTI

TI

O

C

BIAS 1

–IN+IN

2

BIAS 2

U

Dimensions in inches (millimeters) unless otherwise noted.

6 OUT

LT1226 SS

0°– 8° TYP

0.300 – 0.320

(7.620 – 8.128)

0.009 - 0.015

(0.229 - 0.381)

+0.025

0.325

–0.015

+0.635

8.255

()

–0.381

0.010 – 0.020

(0.254 – 0.508)

0.016 – 0.050

0.406 – 1.270

× 45°

0.008 – 0.010

(0.203 – 0.254)

0.045 – 0.065

(1.143 – 1.651)

0.065

(1.651)

TYP

0.045 ± 0.015

(1.143 ± 0.381)

0.100 ± 0.010

(2.540 ± 0.254)

0.053 – 0.069

(1.346 – 1.753)

0.014 – 0.019

(0.356 – 0.483)

N8 Package

8-Lead Plastic DIP

0.130 ± 0.005

(3.302 ± 0.127)

T

J MAX

150°C 130°C/W

θ

JA

S8 Package

8-Lead Plastic SOIC

0.050

(1.270)

BSC

0.125

(3.175)

MIN

(0.508)

0.018 ± 0.003

(0.457 ± 0.076)

0.004 – 0.010

(0.102 – 0.254)

0.020

MIN

8

1234

0.228 – 0.244

(5.791 – 6.198)

0.400

(10.160)

MAX

76

0.189 – 0.197

(4.801 – 5.004)

7

8

5

6

0.250 ± 0.010

(6.350 ± 0.254)

N8 1291

5

0.150 – 0.157

(3.810 – 3.988)



8

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7487

(408) 432-1900

●

FAX

: (408) 434-0507

●

TELEX

: 499-3977

T

J MAX

150°C 220°C/W

θ

JA

1

 LINEAR TECHNOLOGY CORPORATION 1992

3

2

4

LT/GP 0692 10K REV 0

S8 1291

Datasheet LT1226 Datasheet (Linear Technology)

Specifications and Main Features

Frequently Asked Questions

User Manual