Outputs Assume a High Impedance State When Off
or Powered Down
■
Meets All RS232 Specifications
■
Available With or Without Shutdown
■
Absolutely No Latch-up
■
Available in SO Package
U
APPLICATIO S
■
Portable Computers
■
Battery-Powered Systems
■
Power Supply Generator
■
Terminals
■
Modems
The LT®1180A/LT1181A are dual RS232 driver/receiver
pairs with integral charge pump to generate RS232 voltage levels from a single 5V supply. These circuits feature
rugged bipolar design to provide operating fault tolerance
and ESD protection unmatched by competing CMOS
designs. Using only 0.1µF external capacitors, these cir-
cuits consume only 40mW of power, and can operate to
120k baud even while driving heavy capacitive loads. New
ESD structures on the chip allow the LT1180A/LT1181A to
survive multiple ±10kV strikes, eliminating the need for
costly TransZorbs® on the RS232 line pins. The LT1180A/
LT1181A are fully compliant with EIA RS232 standards.
Driver outputs are protected from overload, and can be
shorted to ground or up to ±30V without damage. During
shutdown or power-off conditions, driver and receiver
outputs are in a high impedance state, allowing line
sharing.
The LT1181A is available in 16-pin DIP and SO packages.
The LT1180A is supplied in 18-pin DIP and SO packages
for applications which require shutdown.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TransZorb is a registered trademark of General Instruments, GSI
TYPICAL APPLICATIO
LOGIC
INPUTS
LOGIC
OUTPUTS
ON/OFF
0.1µF
0.1µF
2
+
4
LT1180A
5
+
6
12
11
13
10
18
17
3
7
15
8
14
5k
9
5k
16
U
5V INPUT
+
OUT
0.1µF
0.1µF
V
V– OUT
RS232 OUTPUT
RS232 OUTPUT
RS232 INPUT
RS232 INPUT
LT1180A • TA01
DRIVER
OUTPUT
RL = 3k
= 2500pF
C
L
RECEIVER
OUTPUT
R
CL = 50pF
INPUT
+
+
Output Waveforms
LT1180A • TA02
11801afb
1
Page 2
LT1180A/LT1181A
A
W
O
LUTEXI TIS
S
A
WUW
U
(Note 1)
ARB
G
Supply Voltage (VCC) ................................................ 6V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: Testing done at V
specified.
Note 3: Supply current is measured as the average over several charge
pump cycles. C
driver inputs tied high.
Note 4: Supply current measurements in SHUTDOWN are performed with
≤ 0.1V.
V
ON/OFF
= Low)●2.01.4V
OUT
= 5V and V
CC
+
= C– = C1 = C2 = 0.1µF. All outputs are open, with all
ON/OFF
ON/OFF
= 0V±917mA
OUT
= 3k, CL = 1000pF250kBaud
R
L
Output Transition t
Input High Threshold (V
Input LowI,M Grade●0.21.3V
Input HighI,M Grade
Output High, I
Sourcing Current, V
Output Transition t
= 3V, unless otherwise
ICS
≤ 5V●–1580µA
= ±30V (Note 4)●10100µA
OUT
OUT
OUT
The ● denotes specifications which apply over the operating temperature
Negative
= High)●1.40.8V
OUT
Low-to-High0.51.3µs
LH
= High)C Grade●0.81.3V
OUT
= Low)C Grade●1.72.4V
OUT
≤ V
OUT
CC
= –1.6mA●0.20.4V
= 160µA (VCC = 5V)●3.54.2V
= V
OUT
CC
= 0V10 20mA
OUT
Low-to-High350600ns
LH
Note 5: For driver delay measurements, R
points are set between the driver’s input logic threshold and the output
transition to the zero crossing (t
Note 6: For receiver delay measurements, CL = 51pF. Trigger points are
set between the receiver’s input logic threshold and the output transition
to standard TTL/CMOS logic threshold (tHL = 1.3V to 2.4V and tLH = 1.7V
to 0.8V).
Note 7: Data rate operation guaranteed by slew rate, short-circuit current
and propagation delay tests.
●–6.3–5.0V
●1.73.0V
●110µA
–20–10mA
= 3k and CL = 51pF. Trigger
L
= 1.4V to 0V and tLH = 1.4V to 0V).
HL
11801afb
3
Page 4
LT1180A/LT1181A
TEMPERATURE (°C)
–55
–10
DRIVER OUTPUT VOLTAGE (V)
–8
–4
–2
0
10
4
0
50
75
LT1180A • TPC03
–6
6
8
2
–25
25
100
125
OUTPUT HIGH
OUTPUT LOW
RL = 3k
VCC = 5V
V
CC
= 4.5V
V
CC
= 5.5V
VCC = 4.5V
V
CC
= 5V
V
CC
= 5.5V
LPER
F
O
R
ATYPICA
UW
CCHARA TERIST
E
C
ICS
Driver Maximum Output Voltage
vs Load Capacitance
8.0
7.5
7.0
6.5
6.0
PEAK OUTPUT VOLTAGE (V)
5.5
5.0
2468
0
LOAD CAPACITANCE (nF)
20kBAUD
60kBAUD
120kBAUD
Receiver Input Thresholds
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
THRESHOLD VOLTAGE (V)
1.00
0.75
0.50
–55
–25
INPUT HIGH
INPUT LOW
50
25
0
TEMPERATURE (°C)
75
LT1180A • TPC01
100
LT1180A • TPC04
1013579
125
Driver Minimum Output Voltage
vs Load Capacitance
–4.0
–4.5
–5.0
–5.5
–6.0
PEAK OUTPUT VOLTAGE (V)
–6.5
–7.0
0
120kBAUD
2468
LOAD CAPACITANCE (nF)
60kBAUD
20kBAUD
1013579
LT1180A • TPC02
Driver Output Voltage
Supply Current vs Data RateON/OFF Thresholds
50
2 DRIVERS ACTIVE
= 3k
R
L
= 2500pF
C
L
40
30
20
SUPPLY CURRENT (mA)
10
0
0
5075100
25
DATA RATE (kBAUD)
125150
LT1180A • TPC05
3.0
2.5
2.0
1.5
1.0
THRESHOLD VOLTAGE (V)
0.5
0
–55
–250
ON THRESHOLD
OFF THRESHOLD
50100 125
2575
TEMPERATURE (°C)
LT1180A • TPC06
Supply Current
25
20
15
10
SUPPLY CURRENT (mA)
5
0
–55
4
–25
2 DRIVERS LOADED RL = 3k
1 DRIVER LOADED RL = 3k
NO LOAD
50
25
0
TEMPERATURE (°C)
75
100
LT1180A • TPC07
125
Driver Leakage in Shutdown
100
10
1
LEAKAGE CURRENT (µA)
0.1
–550
–25
V
OUT
25
TEMPERATURE (°C)
V
50
OUT
= 30V
= –30V
75
100
LT1180A • TPC08
125
Driver Short-Circuit Current
30
25
20
15
10
SHORT-CIRCUIT CURRENT (mA)
5
0
–55
–250
2575
TEMPERATURE (°C)
+
I
SC
–
I
SC
50100 125
LT1180A • TPC09
11801afb
Page 5
LPER
F
O
R
ATYPICA
UW
CCHARA TERIST
E
C
LT1180A/LT1181A
ICS
DRIVER 1
OUTPUT
DRIVER 2
OUTPUT
ON/OFF PIN
Receiver Short-Circuit Current
50
40
RX I
SC
30
20
10
SHORT-CIRCUIT CURRENT (mA)
0
–55
–25
+
RX I
SC
50
25
0
TEMPERATURE (°C)
–
100
LT1180A • TPC10
125
75
Slew Rate vs Load Capacitance
16
14
12
10
8
6
SLEW RATE (V/µs)
4
2
0
0.5
0
–SLEW
1.0
2.0
1.5
LOAD CAPACITANCE (nF)
Shutdown to Driver OutputsDriver Output Waveforms
10V
5V
GND
GND
–5V
–10V
LT1180A • TPC12
DRIVER OUTPUT
DRIVER OUTPUT
R
C
= 2500pF
L
R
= 3k
L
= 3k
L
INPUT
2.5
+SLEW
3.0
3.5
4.0
4.5
LT1180A • TPC11
LT1180A • TPC13
5.0
U
UU
PI FU CTIO S
VCC: 5V Input Supply Pin. This pin should be decoupled
with a 0.1µF ceramic capacitor close to the package pin.
Insufficient supply bypassing can result in low output
drive levels and erratic charge pump operation.
GND: Ground Pin.
ON/OFF: A TTL/CMOS Compatible Operating Mode Con-
trol. A logic low puts the LT1180A in shutdown mode.
Supply current drops to zero and both driver and receiver
outputs assume a high impedance state. A logic high fully
enables the device.
1.5V. This pin requires an external charge storage capacitor C ≥ 0.1µF, tied to ground or VCC. Larger value capacitors may be used to reduce supply ripple. With multiple
transceivers, the V+ and V– pins may be paralleled into
common capacitors.
– 2.5V). This pin requires an external charge storage
capacitor C ≥ 0.1µF. Larger value capacitors may be used
to reduce supply ripple. With multiple transceivers, the V
+
and V– pins may be paralleled into common capacitors.
11801afb
5
Page 6
LT1180A/LT1181A
U
UU
PI FU CTIO S
TR1 IN, TR2 IN: RS232 Driver Input Pins. These inputs are
TTL/CMOS compatible. Inputs should not be allowed to
float. Tie unused inputs to VCC.
TR1 OUT, TR2 OUT: Driver Outputs at RS232 Voltage
Levels. Driver output swing meets RS232 levels for loads
up to 3k. Slew rates are controlled for lightly loaded lines.
Output current capability is sufficient for load conditions
up to 2500pF. Outputs are in a high impedance state when
in shutdown mode, VCC = 0V, or when the driver disable
pin is active. Outputs are fully short-circuit protected from
V– + 30V to V+ – 30V. Applying higher voltages will not
damage the device if the overdrive is moderately current
limited. Short circuits on one output can load the power
supply generator and may disrupt the signal levels of the
other outputs. The driver outputs are protected against
ESD to ±10kV for human body model discharges.
REC1 IN, REC2 IN: Receiver Inputs. These pins accept
RS232 level signals (±30V) into a protected 5k terminating
resistor. The receiver inputs are protected against ESD to
±10kV for human body model discharges. Each receiver
provides 0.4V of hysteresis for noise immunity. Open
receiver inputs assume a logic low state.
REC1 OUT, REC2 OUT: Receiver outputs with TTL/CMOS
Voltage Levels. Outputs are in a high impedance state
when in shutdown mode to allow data line sharing. Outputs
are fully short-circuit protected to ground or VCC with the
power on, off or in the shutdown mode.
C1+, C1–, C2+, C2–: Commutating Capacitor Inputs.
These pins require two external capacitors C ≥ 0.1µF: one
from C1+ to C1– and another from C2+ to C2–. C1 should
be deleted if a separate 12V supply is available and connected to pin C1+. Similarly, C2 should be deleted if a
separate –12V supply is connected to pin V–.
U
ESD PROTECTIO
The RS232 line inputs of the LT1180A/LT1181A have onchip protection from ESD transients up to ±10kV. The
protection structures act to divert the static discharge
safely to system ground. In order for the ESD protection to
function effectively, the power supply and ground pins of
the circuit must be connected to ground through low
impedances. The power supply decoupling capacitors and
charge pump storage capacitors provide this low impedance in normal application of the circuit. The only constraint is that low ESR capacitors must be used for
bypassing and charge storage. ESD testing must be done
with pins VCC, VL, V+, V–, and GND shorted to ground or
connected with low ESR capacitors.
0.1µF
0.1µF
+
+
0.1µF
0.1µF
RS232
LINE PINS
PROTECTED
TO ±10kV
ESD Test Circuit
1
NC
+
C1
+
V
–
C1
+
C2
–
C2
–
V
DR2 OUT
RX2 IN
LT1180A
DR1 OUT
RX1 OUT
RX2 OUT
2
3
+
4
5
6
7
+
8
9
ON/OFF
5V V
GND
RX1 IN
DR1 IN
DR2 IN
18
17
CC
16
15
14
13
12
11
10
+
RS232
LINE PINS
PROTECTED
TO ±10kV
LT1180A • ESD TC
0.1µF
6
11801afb
Page 7
A
LT1180A/LT1181A
U
O
PPLICATITYPICAL
Supporting an LT1039 (Triple Driver/Receiver)
SHUTDOWN
TTL INPUT
TTL INPUT
TTL OUTPUT
TTL OUTPUT
1µF
1µF
1817
ON/OFF
LT1180A
11
12
13
10
2
+
+
+
C1
4
–
C1
5
+
C2
6
–
C2
GND
5V
1817
V
CC
TTL OUTPUT
TTL OUTPUT
TTL OUTPUT
+
TTL INPUT
TTL INPUT
TTL INPUT
1µF
8
RS232 OUTPUT
15
RS232 OUTPUT
14
RS232 INPUT
5k
9
RS232 INPUT
5k
3
+
V
7
–
V
16
+
1µF
V
15
13
11
16
14
12
1
V
9
V
CC
+
–
LT1039
GND
10
ON/OFF
30k
30k
30k
4
RS232 OUTPUT
6
RS232 OUTPUT
8
RS232 OUTPUT
3
RS232 INPUT
5
RS232 INPUT
7
RS232 INPUT
LT1180A • TA04
11801afb
7
Page 8
LT1180A/LT1181A
PACKAGE DESCRIPTIO
CORNER LEADS OPTION
(4 PLCS)
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.300 BSC
(0.762 BSC)
U
J Package
16-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
0.005
(0.127)
OPTION
MIN
0.025
(0.635)
RAD TYP
0.015 – 0.060
(0.380 – 1.520)
16
1
23
0.840
(21.336)
MAX
13
4
10
11121415
5
6
9
78
0.220 – 0.310
(5.588 – 7.874)
0.200
(5.080)
MAX
0.008 – 0.018
(0.203 – 0.457)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
0° – 15°
18-Lead CERDIP (Narrow .300 Inch, Hermetic)
CORNER LEADS OPTION
(4 PLCS)
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.300 BSC
(0.762 BSC)
OPTION
0.125
(3.175)
MIN
0.014 – 0.026
(0.360 – 0.660)
J Package
(Reference LTC DWG # 05-08-1110)
0.005
(0.127)
MIN
0.025
(0.635)
RAD TYP
0.015 – 0.060
(0.380 – 1.520)
18
1
16
17
3
2
0.045 – 0.065
(1.143 – 1.651)
0.960
(24.384)
MAX
1415
56
4
13
11
12
78
0.100
(2.54)
BSC
10
9
J16 1298
0.220 – 0.310
(5.590 – 7.870)
0.200
(5.080)
MAX
8
0.008 – 0.018
(0.203 – 0.457)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
0° – 15°
0.125
(3.175)
MIN
0.045 – 0.065
(1.143 – 1.651)
0.014 – 0.026
(0.360 – 0.660)
OBSOLETE PACKAGES
0.100
(2.54)
BSC
J18 1298
11801afb
Page 9
PACKAGE DESCRIPTIO
U
N Package
16-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
16
0.255 ± 0.015*
(6.477 ± 0.381)
1
LT1180A/LT1181A
0.770*
(19.558)
MAX
14
15
2
3
12
13
4
11
6
5
910
8
7
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.020
(0.508)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
N Package
18-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
18
0.255 ± 0.015*
(6.477 ± 0.381)
0.100
(2.54)
BSC
16
0.045 – 0.065
(1.143 – 1.651)
0.900*
(22.860)
MAX
1517
0.065
(1.651)
TYP
0.018 ± 0.003
(0.457 ± 0.076)
N16 1098
121314
1011
12
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.020
(0.508)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
0.005
(0.127)
MIN
3
4
0.045 – 0.065
(1.143 – 1.651)
0.100
(2.54)
BSC
56
9
8
7
0.065
(1.651)
TYP
0.018 ± 0.003
(0.457 ± 0.076)
N18 1098
11801afb
9
Page 10
LT1180A/LT1181A
PACKAGE DESCRIPTIO
U
SW Package
16-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
0.398 – 0.413*
(10.109 – 10.490)
15 14
16
13
12
10 9
11
NOTE 1
2345
0.050
(1.270)
BSC
1
0.014 – 0.019
(0.356 – 0.482)
TYP
0.291 – 0.299**
(7.391 – 7.595)
0.010 – 0.029
(0.254 – 0.737)
0.009 – 0.013
(0.229 – 0.330)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
*
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
**
NOTE 1
× 45°
0.016 – 0.050
(0.406 – 1.270)
° – 8° TYP
0
0.093 – 0.104
(2.362 – 2.642)
6
0.394 – 0.419
(10.007 – 10.643)
78
0.037 – 0.045
(0.940 – 1.143)
0.004 – 0.012
(0.102 – 0.305)
S16 (WIDE) 1098
10
11801afb
Page 11
PACKAGE DESCRIPTIO
U
SW Package
18-Lead Plastic Small Outline (Wide .300 Inch)
(Reference LTC DWG # 05-08-1620)
0.447 – 0.463*
(11.354 – 11.760)
14 13
15
16
1718
LT1180A/LT1181A
11
12
10
NOTE 1
0.291 – 0.299**
(7.391 – 7.595)
0.010 – 0.029
(0.254 – 0.737)
0.009 – 0.013
(0.229 – 0.330)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS.
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
*
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
**
NOTE 1
45
×
°
0.016 – 0.050
(0.406 – 1.270)
° – 8° TYP
0
0.093 – 0.104
(2.362 – 2.642)
0.050
(1.270)
1
BSC
0.014 – 0.019
(0.356 – 0.482)
2345
TYP
6
78
(10.007 – 10.643)
9
0.037 – 0.045
(0.940 – 1.143)
0.004 – 0.012
(0.102 – 0.305)
0.394 – 0.419
S18 (WIDE) 1098
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11801afb
11
Page 12
LT1180A/LT1181A
A
PPLICATITYPICAL
U
O
Operation Using 5V and 12V Power Supplies
12V INPUT
LOGIC INPUTS
LOGIC OUTPUTS
ON/OFF
0.1µF
2
4
LT1180A
5
+
6
12
11
13
10
18
17
3
7
+
15
8
14
5k
9
5k
16
0.1µF
5V INPUT
–12V
OUT
RS232 OUTPUT
RS232 OUTPUT
RS232 INPUT
RS232 INPUT
LT1180A • TA03
RELATED PARTS
PART NUMBERDESCRIPTIONCOMMENTS
LT1280A/LT1281A5V 2-Driver/2-Receiver RS232 TransceiversPin Compatible with LT1180A/LT1181A, ICC = 10mA Max
LT13815V 2-Driver/2-Receiver RS232 TransceiverNarrow 16-Pin SO Package
LT1780/LT17815V 2-Driver/2-Receiver RS232 TransceiversIEC 1000-4-2 Level 4 Compliance
11801afb
LT/CPI 11/01 REV B 1.5K • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1994
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
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