Datasheet LT1168 Datasheet (Linear Technology)

LT1168

Final Electrical Specifications

Low Power, Single

Resistor Gain Programmable, Micropower

FEATURES

■

Supply Current: 530µA Max

■

Meets IEC 1000-4-2 Level 4 ESD Tests with
Two External 5k Resistors

■

Single Gain Set Resistor: G = 1 to 10,000

■

Gain Error: G = 10, 0.4% Max

■

Input Offset Voltage Drift: 0.3µV/°C Max

■

Gain Nonlinearity: G = 10, 20ppm Max

■

Input Offset Voltage: 40µV Max

■

Input Bias Current: 250pA Max

■

PSRR at AV =1: 103dB Min

■

CMRR at AV = 1: 90dB Min

■

Wide Supply Range: ±2.3V to ±18V

■

1kHz Voltage Noise: 10nV/√Hz

■

0.1Hz to 10Hz Noise: 0.28µV

■

Available in 8-Pin PDIP and SO Packages

P-P

U

APPLICATIO S

■

Bridge Amplifiers

■

Strain Gauge Amplifiers

■

Thermocouple Amplifiers

■

Differential to Single-Ended Converters

■

Differential Voltage to Current Converters

■

Data Acquisition

■

Battery-Powered and Portable Equipment

■

Medical Instrumentation

■

Scales

Precision Instrumentation Amplifier

DESCRIPTIO

U

March 2000

The LT®1168 is a micropower, precision instrumentation
amplifier that requires only one external resistor to set gains
of 1 to 10,000. The low voltage noise of 10nV/√Hz (at 1kHz)
is not compromised by low power dissipation (350µA typical
for ±15V supplies). The wide supply range of ±2.3V to ±18V
allows the LT1168 to fit into a wide variety of industrial as well
as battery-powered applications.

The high accuracy of the LT1168 is due to a 20ppm maximum
nonlinearity and 0.4% max gain error (G = 10). Previous
monolithic instrumentation amps cannot handle a 2k load
resistor whereas the nonlinearity of the LT1168 is specified
for loads as low as 2k. The LT1168 is laser trimmed for very
low input offset voltage (40µV max), drift (0.3µV/°C), high
CMRR (90dB, G = 1) and PSRR (103dB, G = 1). Low input
bias currents of 250pA max are achieved with the use of
superbeta processing. The output can handle capacitive
loads up to 1000pF in any gain configuration while the inputs
are ESD protected up to 13kV (human body). The LT1168
with two external 5k resistors passes the IEC 1000-4-2 level
4 specification.

The LT1168 is a pin-for-pin improved second source for the
AD620 and INA118. The LT1168, offered in 8-pin PDIP and
SO packages, requires significantly less PC board area than
discrete op amp resistor designs. These advantages make
the LT1168 the most cost effective solution for precision
instrumentation amplifier applications.

, LTC and LT are registered trademarks of Linear Technology Corporation.

TYPICAL APPLICATIO

5V

1

3.5k

3.5k

*See Theory of Operation section

3.5k

G = 200

3.5k

249Ω

3
8

R1

1
2

U

Single Supply* Pressure Monitor

+

LT1168

–

4

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

BI TECHNOLOGIES

67-8-3 R40KQ, (0.02% RATIO MATCH)

7

5

40k

6

20k

3

+

40k

1/2

LT1112

2

–

REF

IN

1

AGND

LTC

ADC

®

1286

DIGITAL

DATA

OUTPUT

1168 TA01

Gain Nonlinearity

NONLINEARITY (100ppm/DIV)

G = 1000 OUTPUT VOLTAGE (2V/DIV)
RL = 2K
V

= ±10V

OUT

1168 TA01a

1

LT1168

1
2
3
4

8
7
6
5

TOP VIEW

R

G

–IN
+IN

–V

S

R

G

+V

S

OUTPUT
REF

N8 PACKAGE
8-LEAD PDIP

S8 PACKAGE

8-LEAD PLASTIC SO

+

–

WW

W

U

ABSOLUTE MAXIMUM RATINGS

(Note 1)

Supply Voltage ...................................................... ±20V

Differential Input Voltage (Within the

Supply Voltage) ..................................................... ±40V

Input Voltage (Equal to Supply Voltage) ................±20V

Input Current (Note 2) ....................................... ±20mA

Output Short-Circuit Duration (Note 3)............ Indefinite

Operating Temperature Range (Note 4) .. – 40°C to 85°C
Specified Temperature Range

LT1168AC/LT1168C (Note 5) ............. – 40°C to 85°C

LT1168AI/LT1168I ............................. –40°C to 85°C

Storage Temperature Range ................. –40°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

U

W

PACKAGE/ORDER INFORMATION

ORDER PART

NUMBER

LT1168ACN8
LT1168ACS8
LT1168AIN8
LT1168AIS8
LT1168CN8
LT1168CS8
LT1168IN8
LT1168IS8

T

= 150°C, θJA = 130°C/ W (N8)

JMAX

= 150°C, θJA = 190°C/W (S8)

T

JMAX

Consult factory for Military grade parts.

S8 PART MARKING

1168A
1168AI

1168
1168I

U

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS (Note 6) MIN TYP MAX MIN TYP MAX UNITS

G Gain Range G = 1 + (49.4k/RG) 1 10k 1 10k

Gain Error G = 1 0.008 0.02 0.015 0.03 %

G = 10 (Note 7) 0.04 0.4 0.05 0.5 %
G = 100 (Note 7) 0.04 0.5 0.05 0.6 %
G = 1000 (Note 7) 0.08 0.5 0.08 0.6 %

Gain Nonlinearity (Notes 7, 8) VO = ±10V, G = 1 2 6 3 10 ppm

V

= ±10V,G = 10 and 100 10 20 15 25 ppm

O

= ±10V, G = 1000 20 40 25 60 ppm

V

O

VO = ±10V, G = 1, RL = 2k 4 15 5 20 ppm

= ±10V,G = 10 and 100, RL = 2k 20 40 30 60 ppm

V

O

= ±10V, G = 1000, RL = 2k 40 75 50 90 ppm

V

O

V

OST

V

OSI

V

OSO

I

OS

I

B

e

n

i

n

R

IN

2

Total Input Referred Offset Voltage V
Input Offset Voltage G = 1000, VS = ±5V to ±15V 15 40 20 60 µV
Output Offset Voltage G = 1, VS = ±5V to ±15V 40 200 50 300 µV
Input Offset Current 90 300 100 450 pA
Input Bias Current 40 250 80 500 pA
Input Noise Voltage, RTI 0.1Hz to 10Hz, G = 1 2.00 2.00 µV

Input Noise Voltage Density, RTI fO = 1kHz 10 15 10 15 nV/√Hz
Output Noise Voltage Density, RTI fO = 1kHz (Note 9) 165 220 165 220 nV/√Hz
Input Noise Current fO = 0.1Hz to 10Hz 5 5 pA
Input Noise Current Density fO = 10Hz 74 74 fA/√Hz
Input Resistance VIN = ±10V 300 1000 200 1000 GΩ

= V

OST

0.1Hz to 10Hz, G = 1000 0.28 0.28 µV

TA = 25°C. VS = ±15V, VCM = 0V, RL = 10k unless otherwise noted.

LT1168AC/LT1168AI LT1168C/LT1168I

+ V

OSO

/G

OSI

P-P
P-P

P-P

LT1168

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS (Note 6) MIN TYP MAX MIN TYP MAX UNITS

C

IN(DIFF)

C

IN(CM)

V

CM

CMRR Common Mode 1k Source Imbalance,

PSRR Power Supply VS = ±2.3V to ±18V

I

S

V

OUT

I

OUT

BW Bandwidth G = 1 400 400 kHz

SR Slew Rate G = 1, V

REFIN Reference Input Resistance 60 60 kΩ
I

REFIN

V

REF

A

VREF

Differential Input Capacitance fO = 100kHz 1.6 1.6 pF
Common Mode Input fO = 100kHz 1.6 1.6 pF

Capacitance
Input Voltage Range G = 1, Other Input Grounded

= ±2.3V to ±5V –VS + 1.9 +VS – 1.2 –VS + 1.9 +VS – 1.2 V

V

S

V

= ±5V to ±18V –VS + 1.9 +VS – 1.4 –VS + 1.9 +VS – 1.4 V

S

Rejection Ratio V

Rejection Ratio G = 1 103 108 100 108 dB

Supply Current VS = ±2.3V to ±18V 350 530 350 530 µA
Output Voltage Swing RL = 10k

Output Current 20 27 20 27 mA

Settling Time to 0.01% 10V Step

Reference Input Current V
Reference Voltage Range –VS + 1.6 +VS – 1.6 –VS + 1.6 +VS – 1.6 V
Reference Gain to Output 1 ± 0.0001 1 ± 0.0001

= 0V to ±10V

CM

G = 1 90 95 85 95 dB
G = 10 106 115 100 115 dB
G = 100 120 135 110 135 dB
G = 1000 126 140 120 140 dB

G = 10 122 128 118 128 dB
G = 100 131 145 126 145 dB
G = 1000 135 150 130 150 dB

V

= ±2.3V to ±5V –VS + 1.1 +VS – 1.2 –VS + 1.1 +VS – 1.2 V

S

= ±5V to ±18V –VS + 1.2 +VS – 1.3 –VS + 1.2 +VS – 1.3 V

V

S

G = 10 200 200 kHz
G = 100 13 13 kHz
G = 1000 1 1 kHz

OUT

G = 1 to 100 30 30 µs
G = 1000 200 200 µs

= 0V 18 18 µA

REF

TA = 25°C. VS = ±15V, VCM = 0V, RL = 10k unless otherwise noted.

LT1168AC/LT1168AI LT1168C/LT1168I

= ±10V 0.3 0.5 0.3 0.5 V/µs

The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C temperature range. VS = ±15V, VCM = 0V, RL = 10k unless
otherwise noted.

LT1168AC LT1168C

SYMBOL PARAMETER CONDITIONS (Note 6) MIN TYP MAX MIN TYP MAX UNITS

Gain Error G = 1 ● 0.01 0.03 0.012 0.04 %

G = 10 (Note 7)
G = 100 (Note 7)
G = 1000 (Note 7)

Gain Nonlinearity V
(Notes 7, 8) V

G/T Gain vs Temperature G < 1000 (Note 7) ● 100 200 100 200 ppm/°C

= ±10V, G = 1 ● 2 15 3 20 ppm

OUT

= ±10V, G = 10 and 100 ● 7 30 10 35 ppm

OUT

= ±10V, G = 1000 ● 25 60 30 80 ppm

V

OUT

● 0.40 1.5 0.500 1.6 %

● 0.45 1.6 0.550 1.7 %

● 0.50 1.7 0.600 1.8 %

3

LT1168

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the 0°C ≤ TA ≤ 70°C

temperature range. VS = ±15V, VCM = 0V, RL = 10k unless otherwise noted.

LT1168AC LT1168C

SYMBOL PARAMETER CONDITIONS (Note 6) MIN TYP MAX MIN TYP MAX UNITS

V

OST

V

OSI

V

OSIH

V

OSO

V

OSOH

V

OSI

V

OSO

I

OS

IOS/T Input Offset Current Drift ● 0.3 0.4 pA/°C
I

B

IB/T Input Bias Current Drift ● 1.4 1.4 pA/°C
V

CM

CMRR Common Mode 1k Source Imbalance,

PSRR Power Supply VS = ±2.3V to ±18V

I

S

V

OUT

I

OUT

SR Slew Rate G = 1, V
V

REF

Total Input Referred Offset Voltage V

OST

= V

OSI

+ V

OSO

/G

Input Offset Voltage VS = ±5V to ±15V ● 18 60 23 80 µV
Input Offset Voltage Hysteresis (Notes 7, 10) ● 3.0 3.0 µV
Output Offset Voltage VS = ±5V to ±15V ● 60 380 70 500 µV
Output Offset Voltage Hysteresis (Notes 7, 10) ● 30 30 µV

/T Input Offset Drift (RTI) (Note 9) ● 0.05 0.3 0.06 0.4 µV/°C

/T Output Offset Drift (Note 9) ● 0.7 3 0.8 4 µV/°C

Input Offset Current ● 100 400 120 550 pA

Input Bias Current ● 65 350 105 600 pA

Input Voltage Range G = 1, Other Input Grounded

V

= ±2.3V to ±5V ● –VS + 2.1 +VS – 1.3 –VS + 2.1 +VS – 1.3 V

S

= ±5V to ±18V ● –VS + 2.1 +VS – 1.4 –VS + 2.1 +VS – 1.4 V

V

S

Rejection Ratio V

Rejection Ratio G = 1

= 0V to ±10V

CM

G = 1
G = 10
G = 100
G = 1000

G = 10
G = 100
G = 1000

● 88 92 83 92 dB

● 100 110 97 110 dB

● 115 120 113 120 dB

● 117 135 114 135 dB

● 102 115 98 115 dB

● 123 130 118 130 dB

● 127 135 124 135 dB

● 129 145 126 145 dB

Supply Current VS = ±2.3V to ±18V ● 390 615 390 615 µA
Output Voltage Swing RL = 10k

= ±2.3V to ±5V ● –VS + 1.4 +VS – 1.3 –VS + 1.4 +VS – 1.3 V

V

S

V

= ±5V to ±18V ● –VS + 1.6 +VS – 1.5 –VS + 1.6 +VS – 1.5 V

S

Output Current ● 16 21 16 21 mA

= ±10V ● 0.25 0.48 0.25 0.48 V/µs

OUT

Voltage Range (Note 9) ● –VS + 1.6 +VS – 1.6 –VS + 1.6 +VS – 1.6 V

The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range. VS = ±15V, VCM = 0V, RL = 10k unless
otherwise noted. (Note 8)

LT1168AI LT1168I

SYMBOL PARAMETER CONDITIONS (Note 6) MIN TYP MAX MIN TYP MAX UNITS

Gain Error G = 1 ● 0.014 0.04 0.015 0.05 %

G = 10 (Note 7)
G = 100 (Note 7)
G = 1000 (Note 7)

G

N

Gain Nonlinearity VO = ±10V, G = 1 ● 3 20 5 25 ppm
(Notes 7, 8) V

= ±10V, G = 10 and 100 ● 10 35 15 40 ppm

O

VO = ±10V, G = 1000

● 0.600 1.9 0.700 2.0 %

● 0.600 2.0 0.700 2.1 %

● 0.600 2.1 0.700 2.2 %

● 30 70 35 100 ppm

G/T Gain vs Temperature G < 1000 (Note 7) ● 100 200 100 200 ppm/°C

4

LT1168

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the –40°C ≤ TA ≤ 85°C temperature range. VS = ±15V, VCM = 0V, RL = 10k unless
otherwise noted. (Note 5)

LT1168AI LT1168I

SYMBOL PARAMETER CONDITIONS (Note 6) MIN TYP MAX MIN TYP MAX UNITS

V

OST

V

OSI

V

OSIH

V

OSO

V

OSOH

V

OSI

V

OSO

I

OS

IOS/T Input Offset Current Drift ● 0.3 0.3 pA/°C
I

B

IB/T Input Bias Current Drift ● 1.4 1.4 pA/°C
V

CM

CMRR Common Mode 1k Source Imbalance,

PSRR Power Supply VS = ±2.3V to ±18V

I

S

V

OUT

I

OUT

SR Slew Rate ● 0.22 0.41 0.22 0.42 V/µs
V

REF

Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be imparied.

Note 2: If the input voltage exceeds the supplies, the input current should
be limited to less than 20mA.

Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum.

Note 4: The LT1168AC/LT1168C are guaranteed functional over the
operating temperature range of –40°C and 85°C.

Note 5: The LT1168AC/LT1168C are guaranteed to meet specified
performance from 0°C to 70°C. The LT1168AC/LT1168C are designed,
characterized and expected to meet specified performance from –40°C
and 85°C but are not tested or QA sampled at these temperatures. The
LT1168AI/LT1168I are guaranteed to meet specified performance from
–40°C to 85°C.

Total Input Referred Offset Voltage V

OST

= V

OSI

+ V

OSO

/G

Input Offset Voltage ● 20 75 25 100 µV
Input Offset Voltage Hysteresis (Notes 7, 10) ● 3.0 3.0 µV
Output Offset Voltage ● 180 500 200 600 µV
Output Offset Voltage Hysteresis (Notes 7, 10) ● 30 30 µV

/T Input Offset Drift (RTI) (Note 9) ● 0.05 0.3 0.06 0.4 µV/°C

/T Output Offset Drift (Note 9) ● 0.8 5 1 6 µV/°C

Input Offset Current ● 110 550 120 700 pA

Input Bias Current ● 120 500 220 800 pA

Input Voltage Range VS = ±2.3V to ±5V ● –VS + 2.1 +VS – 1.3 –VS + 2.1 +VS – 1.3 V

V

= ±5V to ±18V ● –VS + 2.1 +VS – 1.4 –VS + 2.1 +VS – 1.4 V

S

Rejection Ratio V

Rejection Ratio G = 1

= 0V to ±10V

CM

G = 1
G = 10
G = 100
G = 1000

G = 10
G = 100
G = 1000

● 86 90 81 90 dB

● 98 105 95 105 dB

● 114 118 112 118 dB

● 116 133 112 133 dB

● 100 112 95 112 dB

● 120 125 115 125 dB

● 125 132 120 132 dB

● 128 140 125 140 dB

Supply Current ● 420 650 420 650 µA
Output Voltage Swing VS = ±2.3V to ±5V ● –VS + 1.4 +VS – 1.3 –VS + 1.4 +VS – 1.3 V

V

= ±5V to ±18V ● –VS + 1.6 +VS – 1.5 –VS + 1.6 +VS – 1.5 V

S

Output Current ● 15 20 15 20 mA

Voltage Range (Note 9) ● –VS + 1.6 +VS – 1.6 –VS + 1.6 +VS – 1.6 V

Note 6: Typical parameters are defined as the 60% of the yield parameter
distribution.

Note 7: Does not include the tolerance of the external gain resistor RG.
Note 8: This parameter is measured in a high speed automatic tester that

does not measure the thermal effects with longer time constants. The
magnitude of these thermal effects are dependent on the package used,
heat sinking and air flow conditions.

Note 9: This parameter is not 100% tested.
Note 10: Hysteresis in offset voltage is created by package stress that

differs depending on whether the IC was previously at a higher or lower
temperature. Offset voltage hysteresis is always measured at 25°C, but
the IC is cycled to 85°C I-grade (or 70°C C-grade) or –40°C I-grade
(0°C C-grade) before successive measurement. 60% of the parts will
pass the typical limit on the data sheet.

5

LT1168

TIME (SEC)

0

NOISE VOLTAGE (2µV/DIV)

8

1168 G11

2

4

5

10

6

1

3

9

7

VS = ±15V
T

A

= 25°C

TIME (SEC)

0

NOISE CURRENT (5pA/DIV)

8

1168 G14

2

4

5

10

6

1

3

9

7

VS = ±15V
T

A

= 25°C

UW

TYPICAL PERFOR A CE CHARACTERISTICS

60

G = 1000

50

40

G = 100

30

20

G = 10

GAIN (dB)

10

0

G = 1

–10

–20

0.01

1 100 10000.1 10

FREQUENCY (kHz)

0.1Hz to 10Hz Noise Voltage, RTI
G = 1000

VS = ±15V

= 25°C

T

A

VS = ±15V
T

= 25°C

A

LT1168 • G02

Voltage Noise Density vs
FrequencyGain vs Frequency

1000

1/f CORNER = 2Hz

GAIN = 1

100

1/f CORNER = 7Hz

GAIN = 10

10

1/f CORNER = 3Hz

VOLTAGE NOISE DENSITY (nV/√Hz)

1

1 10 100 1k 10k 100k

GAIN = 100, 1000

BW LIMIT
GAIN = 1000

FREQUENCY (Hz)

BW LIMIT
GAIN = 100

VS = ±15V

= 25°C

T

A

LT1168 • G01

0.1Hz to 10Hz Noise Voltage,
G = 1

Current Noise Density vs
Frequency 0.1Hz to 10Hz Current Noise

1000

VS = ±15V

= 25°C

T

A

RS

NOISE VOLTAGE (0.2µV/DIV)

1

0

Short-Circuit Current vs Time Overshoot vs Capacitive Load

50
40
30
20
10

0
–10
–20

OUTPUT CURRENT (mA)

–30

(SINK) (SOURCE)

–40
–50

0

TIME FROM OUTPUT SHORT TO GROUND (MINUTES)

2

3

VS = ±15V

5

4

TIME (SEC)

1

6

7

TA = –40°C

TA = 25°C

TA = 85°C

TA = 85°C

TA = 25°C

TA = –40°C

2

100

1

1/f CORNER = 55Hz

10 100 1000

FREQUENCY (Hz)

1168 G13

CURRENT NOISE DENSITY (fA/√Hz)

8

10

9

1168 G12

10

Output Impedance vs Frequency

100

VS = ±15V

90
80
70
60

50
40

OVERSHOOT (%)

30
20
10

0

10

= ±50mV

V

OUT

=

∞

R

L

G = 1

G = 10

G = 100, 1000

100 1000 10000

CAPACITIVE LOAD (pF)

1168 G16

3

1168 G15

OUTPUT IMPEDANCE (Ω)

1k

100

10

1

0.1

VS = ±15V

= 25°C

T

A

G = 1 TO 1000

1k

10k 100k 1M

FREQUENCY (Hz)

1168 G17

6

UW

TYPICAL PERFOR A CE CHARACTERISTICS

LT1168

10

VS = ±15

8

G = 1

= 25°C

T

A

6

= 30pF

C

L

R

= 1k

4

L

2
0

–2

OUTPUT STEP (V)

–4
–6
–8

–10

8 101214161820222426283032

TO 0.1%

TO 0.01%

0V

0V

TO 0.01%

TO 0.1%

SETTLING TIME (µs)

Falling Edge Settling Time
(0.10%)

0

(V)

–5

IN

V

–10

0

(V)

–5

OUT

V

–10

Settling Time vs GainSettling Time vs Step Size

1000

VS = ±15V
T

= 25°C

A

= 10V TO 0.01%

∆V

OUT

V

OUT

V

OUT

1168 G19

100

10

SETTLING TIME (µs)

1

1

10 100 1000

GAIN

1168 G18

Capacitance

34

32

G = 1, RISING EDGE

30

28

G = 100, FALLING EDGE

26

G = 100,

24

RISING EDGE

22

SETTLING TIME (µs)

VS = ±15V

20

T

A

18

R

L

STEP SIZE = 10V

16

10

G = 1, FALLING EDGE

G = 10,
FALLING EDGE

G = 10,

= 25°C
= 1k

30 100 300 1000
LOAD CAPACITANCE (pF)

RISING EDGE

1168 G25

Rising Edge Settling Time
(O.10%)

10

Settling Time (0.1%) vs Load

0.10

0.05
0

0.05

0.10

SETTLING (%)

(V)

IN

V

(V)

OUT

V

5
0

10

5
0

0.10

0.05
0

0.05

0.10

SETTLING (%)

5µs/DIV 1168 G29

t = 0

TA = 25°C

= ±15V

V

S

= 2k

R

L

CL = 15pF

Settling Time (0.01%) vs Load
Capacitance

36

G = 100,

34

FALLING EDGE

32

G = 1, RISING EDGE

30

28

G = 10, FALLING EDGE

26

G = 10, RISING EDGE

24

SETTLING TIME (µs)

VS = ±15V

22

= 25°C

T

A

20

= 1k

R

L

STEP SIZE = 10V

18

10

30 100 300 1000
LOAD CAPACITANCE (pF)

G = 100,
RISING EDGE

G = 1,
FALLING
EDGE

1168 G26

5µs/DIV 1168 G28

t = 0

TA = 25°C

= ±15V

V

S

= 2k

R

L

CL = 15pF

Undistorted Output Swing vs
Frequency

35

G = 10, 100, 1000

30

25

G = 1

20

15

10

5

PEAK-TO-PEAK OUTPUT SWING (V)

0

1

10 100 1000
FREQUENCY (kHz)

VS = ±15V

= 25°C

T

A

1168 G31

7

LT1168

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Output Voltage Swing vs
Load Current

+V

S

VS = ±15V

– 0.5

+V

S

– 1.0

+V

S

– 1.5

+V

S

– 2.0

+V

S

REFERRED TO

SUPPLY VOLTAGE

+V

– 2.5

S

+ 2.5

–V

S

+ 2.0

–V

S

+ 1.5

–V

S

(SINK) (SOURCE)

+ 1.0

–V

S

SWING (V)

–VS + 0.5

OUTPUT VOLTAGE

–V

S

0.01 1 10 100

0.1
OUTPUT CURRENT (mA)

Large-Signal Transient Response

5V/DIV

Large-Signal Transient Response

85°C
25°C
–40°C

5V/DIV

G = 1

= ±15V

V

S

RL = 2k

= 60pF

C

L

1168 G20

Small-Signal Transient Response

20mV/DIV

50µs/DIV

1168 G03

Small-Signal Transient Response

20mV/DIV

G = 1

= ±15V

V

S

= 2k

R

L

= 60pF

C

L

10µs/DIV

Large-Signal Transient Response

5V/DIV

1168 G04

G = 10

= ±15V

V

S

= 2k

R

L

= 60pF

C

L

50µs/DIV

Small-Signal Transient Response

20mV/DIV

G = 100

= ±15V

V

S

RL = 2k

= 60pF

C

L

10µs/DIV

1168 G05

1168 G08

G = 10

= ±15V

V

S

= 2k

R

L

= 60pF

C

L

10µs/DIV

Large-Signal Transient Response

5V/DIV

G = 1000

= ±15V

V

S

= 2k

R

L

CL = 60pF

200µs/DIV

1168 G06

1168 G09

G = 100

= ±15V

V

S

= 2k

R

L

= 60pF

C

L

50µs/DIV

1168 G07

Small-Signal Transient Response

20mV/DIV

G = 1000

= ±15V

V

S

= 2k

R

L

= 60pF

C

L

200µs/DIV

1168 G10

8

UW

TEMPERATURE

–75

–50 –25 0 25 50 75 100 125

INPUT BIAS AND OFFSET CURRENT (pA)

1168 G30

500
400
300
200
100

0
–100
–200
–300
–400
–500

VS = ±15V
V

CM

= 0V

I

OS

I

B

TYPICAL PERFOR A CE CHARACTERISTICS

LT1168

Negative Power Supply Rejection
Ratio vs Frequency

160

140

120

100

80

60

40

V+ = 15V

20

T

0

NEGATIVE POWR SUPPLY REJECTION RATIO (dB)

0.1 1 10 100 1k 10k 100k

G = 100
G = 10

G = 1

= 25°C

A

G = 1000

FREQUENCY (Hz)

Warm-Up Drift

35

30

25

20

1168 G21

SO-8

Positive Power Supply Rejection
Ratio vs Frequency

160

140

120

100

80

60

40

20

0

POSITIVE POWR SUPPLY REJECTION RATIO (dB)

0.1 1 10 100 1k 10k 100k

V– = –15V

= 25°C

T

A

G = 100

G = 10

G = 1

G = 1000

FREQUENCY (Hz)

Common Mode Rejection Ratio vs
Frequency (1k Source Impedance)

160

140

120

100

COMMON MODE REJECTION RATIO (dB)

1168 G22

G = 1000

G = 100

G = 10

G = 1

80

60

40

VS = 15V

= 25°C

T

A

20

1k SOURCE IMBALANCE

0

0.1 1 10 100 1k 10k 100k
FREQUENCY (Hz)

Input Bias and Offset Current vs
Temperature

1168 G23

15

10

5

CHANGE IN OFFSET VOLTAGE (µV)

0

012345

BLOCK DIAGRAM

N-8

TIME AFTER POWER-ON (MINUTES)

W

+

V

R3

–IN

2

1

R

G

8

R

G

+IN

3

400Ω

–

V

+

V

R4

400Ω

–

V

1168 G24

VB

+

A1

–

C1

Q1

R1

24.7k

VB

+

A2

–

C2

Q2 V

R2

24.7k

30k

30k

R5

R6
30k

–

A3

+

R7

DIFFERENCE AMPLIFIER STAGEPREAMP STAGE

R8
30k

Figure 1. Block Diagram

OUTPUT

6

–

V

REF

5

–

+

V

7

–

V

4

1168 F01

9

LT1168

THEORY OF OPERATIO

U

The LT1168 is a modified version of the three op amp
instrumentation amplifier. Laser trimming and monolithic
construction allow tight matching and tracking of circuit
parameters over the specified temperature range. Refer to
the block diagram (Figure 1) to understand the following
circuit description. The collector currents in Q1 and Q2 are
trimmed to minimize offset voltage drift, thus assuring a
high level of performance. R1 and R2 are trimmed to an
absolute value of 24.7k to assure that the gain can be set
accurately (0.6% at G = 100) with only one external
resistor RG. The value of RG in parallel with R1 (R2)
determines the transconductance of the preamp stage. As
RG is reduced for larger programmed gains, the transcon­ductance of the input preamp stage increases to that of the
input transistors Q1 and Q2. This increases the open-loop
gain when the programmed gain is increased, reducing
the input referred gain related errors and noise. The input
voltage noise at gains greater than 50 is determined only
by Q1 and Q2. At lower gains the noise of the difference
amplifier and preamp gain setting resistors increase the
noise. The gain bandwidth product is determined by C1,
C2 and the preamp transconductance which increases
with programmed gain. Therefore, the bandwidth does not
drop proportionally with gain.

The input transistors Q1 and Q2 offer excellent matching,
which is inherent in NPN bipolar transistors, as well as
picoampere input bias current due to superbeta process­ing. The collector currents in Q1 and Q2 are held constant
due to the feedback through the Q1-A1-R1 loop and
Q2-A2-R2 loop which in turn impresses the differential
input voltage across the external gain set resistor RG.
Since the current that flows through RG also flows through
R

1 and R2, the ratios provide a gained-up differential volt-

age, G = (R1 + R2)/RG, to the unity-gain difference

amplifier
A3. The common mode voltage is removed by A3, result­ing in a single-ended output voltage referenced to the
voltage on the REF pin. The resulting gain equation is:

Table 1

DESIRED GAIN R

1 Open Open 1
2 49400 49900 1.99
5 12350 12400 4.984
10 5488.89 5490 9.998
20 2600 2610 19.927
50 1008.16 1000 50.4
100 498.99 499 99.998
200 248.24 249 199.394
500 99 100 495
1000 49.95 49.4 1001

CLOSEST 1% VALUE RESULTANT GAIN

G

Input and Output Offset Voltage

The offset voltage of the LT1168 has two components: the
output offset and the input offset. The total offset voltage
referred to the input (RTI) is found by dividing the output
offset by the programmed gain (G) and adding it to the
input offset. At high gains the input offset voltage domi­nates, whereas at low gains the output offset voltage
dominates. The total offset voltage is:

Total input offset voltage (RTI)
= input offset + (output offset/G)

Total output offset voltage (RTO)
= (input offset • G) + output offset

Reference Terminal

The reference terminal is one end of one of the four 30k
resistors around the difference amplifier. The output volt­age of the LT1168 (Pin 6) is referenced to the voltage on
the reference terminal (Pin 5). Resistance in series with
the REF pin must be minimized for best common mode
rejection. For example, a 6Ω resistance from the REF pin
to ground will not only increase the gain error by 0.02%
but will lower the CMRR to 80dB.

G = (49.4kΩ/RG) + 1

solving for the gain set resistor gives:

RG = 49.4kΩ/(G – 1)

Table 1 shows appropriate 1% resistor values for a variety
of gains.

10

Single Supply Operation

For single supply operation, the REF pin can be at the same
potential as the negative supply (Pin 4) provided the
output of the instrumentation amplifier remains inside the
specified operating range and that one of the inputs is at
least 2.5V above ground. The barometer application later

THEORY OF OPERATIO

–

+

2

–IN

OUTPUT

+IN

1

8

10k

100Ω

100Ω

–10mV

1168 F02

V

–

V

+

10mV

5

6

LT1112

±10mV

ADJUSTMENT RANGE

R

G

3

–

+

LT1168

REF

LT1168

U

in this data sheet is an example that satisfies these
conditions. The resistance Rb from the bridge transducer
to ground sets the operating current for the bridge and
also has the effect of raising the input common mode
voltage. The output of the LT1168 is always inside the
specified range since the barometric pressure rarely goes
low enough to cause the output to rail (30.00 inches of Hg
corresponds to 3.000V). For applications that require the
output to swing at or below the REF potential, the voltage
on the REF pin can be level shifted. An op amp is used to
buffer the voltage on the REF pin since a parasitic series
resistance will degrade the CMRR. The application in the
front of this data sheet, Single Supply Pressure Monitor,
is an example.

Output Offset Trimming

The LT1168 is laser trimmed for low offset voltage so that
no external offset trimming is required for most applica­tions. In the event that the offset needs to be adjusted, the
circuit in Figure 2 is an example of an optional offset adjust
circuit. The op amp buffer provides a low impedance to the
REF pin where resistance must be kept to minimum for
best CMRR and lowest gain error.

required. However, a path must be provided for the input
bias currents of both inputs when a purely differential
signal is being amplified. Without this path the inputs will
float to either rail and exceed the input common mode
range of the LT1168, resulting in a saturated input stage.
Figure 3 shows three examples of an input bias current
path. The first example is of a purely differential signal
source with a 10kΩ input current path to ground. Since the
impedance of the signal source is low, only one resistor is
needed. Two matching resistors are needed for higher
impedance signal sources as shown in the second
example. Balancing the input impedance improves both
common mode rejection and DC offset.

Input Bias Current Return Path

The low input bias current of the LT1168 (250pA) and the
high input impedance (200GΩ) allow the use of high
impedance sources without introducing additional offset
voltage errors, even when the full common mode range is

–

THERMOCOUPLE

10k

+

LT1168

Figure 3. Providing an Input Common Mode Current Path

MICROPHONE,

HYDROPHONE,

ETC

200k

Figure 2. Optional Trimming of Output Offset Voltage

–

LT1168

+

200k

–

+

CENTER-TAP PROVIDES
BIAS CURRENT RETURN

LT1167

LT1168

1168 F03

11

LT1168

U

WUU

APPLICATIONS INFORMATION

The LT1168 is a low power precision instrumentation
amplifier that requires only one external resistor to accu­rately set the gain anywhere from 1 to 1000. The LT1168
is trimmed for critical DC parameters such as gain error
(0.04%, G = 10), input offset voltage (40µV, RTI), CMRR
(90dB min, G = 1) and PSRR (103dB min, G = 1). These
trims allow the amplifier to achieve very high DC accuracy.
The LT1168 achieves low input bias current of just 250pA
(max) through the use of superbeta processing. The
output can handle capacitive loads up to 1000pF in any
gain configuration and the inputs are protected against
ESD strikes up to ±13kV (human body).

Input Protection

The LT1168 can safely handle up to ±20mA of input
current in an overload condition. Adding an external 5k
input resistor in series with each input allows DC input
fault voltage up to ±100V and improves the ESD immunity
to ±8kV (contact) and ±15kV (air discharge), which is the
IEC 1000-4-2 level 4 specification. If lower value input
resistors must be used, a clamp diode from the positive
supply to each input will maintain the IEC 1000-4-2
specification to level 4 for both air and contact discharge.
A 2N4393 drain/source to gate is a good low leakage diode
for use with 1k resistors, see Figure 4. The input resistors
should be carbon and not metal film or carbon film.

OPTIONAL FOR

< 20k

R

J1
2N4393

R

IN

R

IN

Figure 4. Input Protection

J2
2N4393

IN

V

CC

+

R

LT1168

G

–

REF

V

EE

OUT

1168 F04

these very small signals (on the order of microvolts or
millivolts) are sensors that can be a significant distance
from the signal conditioning circuit. Although these sen­sors may be connected to signal conditioning circuitry,
using shielded or unshielded twisted-pair cabling, the ca­bling may act as antennae, conveying very high frequency
interference directly into the input stage of the LT1168.

The amplitude and frequency of the interference can have
an adverse effect on an instrumentation amplifier’s input
stage by causing an unwanted DC shift in the amplifier’s
input offset voltage. This well known effect is called RFI
rectification and is produced when out-of-band interfer­ence is coupled (inductively, capacitively or via radiation)
and rectified by the instrumentation amplifier’s input tran­sistors. These transistors act as high frequency signal
detectors, in the same way diodes were used as RF
envelope detectors in early radio designs. Regardless of
the type of interference or the method by which it is
coupled into the circuit, an out-of-band error signal ap­pears in series with the instrumentation amplifier’s inputs.

To significantly reduce the effect of these out-of-band
signals on the input offset voltage of instrumentation
amplifiers, simple lowpass filters can be used at the
inputs. This filter should be located very close to the input
pins of the circuit. An effective filter configuration is
illustrated in Figure 5, where three capacitors have been
added to the inputs of the LT1168. Capacitors C
C

form lowpass filters with the external series resis-

XCM2

tors R

to any out-of-band signal appearing on each of

S1, 2

XCM1

and

the input traces. Capacitor CXD forms a filter to reduce any
unwanted signal that would appear across the input traces.
An added benefit to using CXD is that the circuit’s AC
common mode rejection is not degraded due to common
mode capacitive imbalance. The differential mode and
common mode time constants associated with the capaci­tors are:

t

DM(LPF)

= (2)(RS)(CXD)

RFI Reduction

In many industrial and data acquisition applications,
instrumentation amplifiers are used to accurately amplify
small signals in the presence of large common mode
voltages or high levels of noise. Typically, the sources of

12

t

CM(LPF)

= (R

S1, 2

)(C

XCM1, 2

)

Setting the time constants requires a knowledge of the
frequency, or frequencies of the interference. Once this
frequency is known, the common mode time constants
can be set followed by the differential mode time constant.

LT1168

U

WUU

APPLICATIONS INFORMATION

To avoid any possibility of inadvertently affecting the
signal to be processed, set the common mode time
constant an order of magnitude (or more) larger than the
differential mode time constant. Set the common mode
time constants such that they do not degrade the LT1168
inherent AC CMR. Then the differential mode time con­stant can be set for the bandwidth required for the appli­cation. Setting the differential mode time constant close to
the sensor’s BW also minimizes any noise pickup along
the leads. To avoid any possibility of common mode to
differential mode signal conversion, match the common
mode time constants to 1% or better. If the sensor is an
RTD or a resistive strain gauge, then the series resistors
R

can be omitted, if the sensor is in proximity to the

S1, 2

instrumentation amplifier.

+

C

R

XCM1

S1

0.001µF

1.6k

+

IN

C

XD

0.1µF

R

S2

1.6k

–

IN

C

XCM2

0.001µF

EXTERNAL RFI

FILTER

R

G

V

+

LT1168

V

OUT

–

–

V

f

–3dB

≈ 500Hz

1168 F05

Nerve Impulse Amplifier

The LT1168’s low current noise makes it ideal for EMG
monitors that have high source impedances. Demonstrat­ing the LT1168’s ability to amplify low level signals, the
circuit in Figure 6 takes advantage of the amplifier’s high
gain and low noise operation. This circuit amplifies the low
level nerve impulse signals received from a patient at
Pins␣ 2 and 3. RG and the parallel combination of R3 and R4
set a gain of ten. The potential on LT1112’s Pin 1 creates
a ground for the common mode signal. C1 was chosen to
maintain the stability of the patient ground. The LT1168’s
high CMRR ensures that the desired differential signal is
amplified and unwanted common mode signals are at­tenuated. Since the DC portion of the signal is not impor­tant, R6 and C2 make up a 0.3Hz highpass filter. The AC
signal at LT1112’s Pin 5 is amplified by a gain of 101 set
by R7/R8 +1. The parallel combination of C3 and R7 form
a lowpass filter that decreases this gain at frequencies
above 1kHz. The ability to operate at ±3V on 350µA of
supply current makes the LT1168 ideal for battery-pow­ered applications. Total supply current for this application
is 1.05mA. Proper safeguards, such as isolation, must be
added to this circuit to protect the patient from possible
harm.

Figure 5. Adding a Simple RC Filter at the Inputs to an
Instrumentation Amplifier is Effective in Reducing Rectification
of High Frequency Out-of-Band Signals

3V
3
8

1
2

+

–

7

LT1168

G = 10

4

–3V

+IN

PATIENT

GND

–IN

PATIENT/CIRCUIT
PROTECTION/ISOLATION

C1

0.01µF

R2
1M

R1

12k

–

1

1/2

LT1112

+

R3
30k

R

G

6k

R4
30k

2

3

AV = 101
POLE AT 1kHz

Figure 6. Nerve Impulse Amplifier

0.3Hz
HIGHPASS

C2

0.47µF

6

R6

5

1M

R8

100Ω

3V

5

6

+

LT1112

–

1/2

–3V

C3

15nF

8

7

4

R7

10k

OUTPUT
1V/mV

1168 F06

13

LT1168

U

WUU

APPLICATIONS INFORMATION

Low IB Favors High Impedance Bridges, Lowers
Dissipation

The LT1168’s low supply current, low supply voltage
operation and low input bias currents allow it to fit nicely
into battery-powered applications. Low overall power
dissipation necessitates using higher impedance bridges.
The single supply pressure monitor application, Figure␣ 7,
shows the LT1168 connected to the differential output of

BI TECHNOLOGIES

(0.02% RATIO MATCH)

7

5

3.5k

3.5k

5V

1

3.5k
G = 200

249Ω

3.5k

3

+

8

LT1168

1
2

–

4

a 3.5k bridge. The picoampere input bias currents keep the
error caused by offset current to a negligible level. The
LT1112 level shifts the LT1168’s reference pin and the
ADC’s analog ground pins above ground. The LT1168’s
and LT1112’s combined power dissipation is still less than
the bridge’s. This circuit’s total supply current is just

2.2mA.

67-8-3 R40KQ

40k

6

20k

+

40k

1/2

LT1112

–

REF

IN

LTC

AGND

ADC

®

1286

DIGITAL

DATA

OUTPUT

U

TYPICAL APPLICATIONS

R5

392k

LT1634CCZ-1.25

2

1

R4

50k

R3

50k

3

2

R8

100k

+

1/2

LT1490

–

Figure 7. Single Supply Pressure Monitor

Single Supply Barometer

V

S

LUCAS NOVA SENOR

1

4

2

6

R7

50k

NPC-1220-015-A-3L

5k

5k

R

7

5k

5k

SET

5

1

–

R2
12Ω

3

+

0.6% ACCURACY AT 25°C

1.7% ACCURACY AT 0°C TO 60°C

= 8V TO 30V

V

S

8

4

R6
1k

5

+

1/2

LT1490

6

–

R1
825Ω

1168 TA05

V

S

–

2

1

8

+

3

LT1168

G = 60

7

6

5

4

VOLTS

2.800

3.000

3.200

TO
4-DIGIT
DVM

INCHES Hg

28.00

30.00

32.00

1168 TA03

14

U

TYPICAL APPLICATIONS

LT1168

AC Coupled Instrumentation Amplifier

392k

LT1634CCZ-1.25

R8

3

+

2

1

1/4

LT1114

2

–

0.6% ACCURACY AT ROOM TEMP

1.7% ACCURACY AT 0°C TO 60°C

VOLTS

INCHES Hg

2.800

3.000

3.200

–IN

+IN

9V

4

11

28.00

30.00

32.00

2
1

R

G

8
3

1

4

R9

1k

2

6

–

LT1168

REF

+

5

1

4-Digit Pressure Sensor

LUCAS NOVA SENOR

NPC-1220-015A-3L

–

5k

5k

R

5k

5k

+

SET

5

6

C1

0.1µF

1/2

LT1124

1

3

825Ω

12Ω

OUTPUT

R1
1M

–

2

=

(2π)(R1)(C1)

= 1.59Hz

9V

7

4

14

1

1168 TA02

5

6

10

9

R5
100k

+

LT1114

–

1/4

R6

50k

C1

1µF

TO
4-DIGIT
DVM

8

R7

180k

1168 TA04

f

2
1

8
3

+

LT1114

–

–3dB

–

LT1168

G = 60

+

1/4

R4

100k

+

3

R1

R2

12

13

R3
51k

PACKAGE DESCRIPTIO

0.300 – 0.325

(7.620 – 8.255)

0.009 – 0.015

(0.229 – 0.381)

+0.035

0.325

–0.015

+0.889

8.255

()

–0.381

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

0.065

(1.651)

TYP

U

Dimensions in inches (millimeters) unless otherwise noted.

N8 Package

8-Lead PDIP (Narrow 0.300)

(LTC DWG # 05-08-1510)

0.045 – 0.065

(1.143 – 1.651)

0.100
(2.54)

BSC

0.130 ± 0.005

(3.302 ± 0.127)

0.125

(3.175)

MIN

0.018 ± 0.003

(0.457 ± 0.076)

0.020

(0.508)

MIN

0.255 ± 0.015*
(6.477 ± 0.381)

0.400*

(10.160)

876

1234

MAX

5

N8 1098

15

LT1168

TYPICAL APPLICATIO

Programmable Audio HPF/LPF with “Pop-Less” Switching

R3

8k

314

+15V

8

2

–

1/2 LT1462

3

V

+

IN

–15V

1

4

215

TOTAL SUPPLY CURRENT < 400µA

PACKAGE DESCRIPTIO

U

+15V

7

3

+

R2

4k

P

1

116

LTC201

12 13

+15VNC –15V

P

2

89

5

4

R1
4k

611

710

GAIN SET

C1
100µF

8
1
2

5

6

LT1168

–

–15V

+

1/2 LT1462

–

6

5

4

7

U

Dimensions in inches (millimeters) unless otherwise noted.

HPF

LPF

— 0 1 0 < 0.8V

P

1

P

0 1 1 1 > 2.4V

2

POLE 100 200 400 Hz

1168 TA06

S8 Package

8-Lead Plastic Small Outline (Narrow 0.150)

0.010 – 0.020

(0.254 – 0.508)

0.008 – 0.010

(0.203 – 0.254)

*

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

× 45°

0.016 – 0.050

(0.406 – 1.270)

0.053 – 0.069

(1.346 – 1.752)

0°– 8° TYP

0.014 – 0.019

(0.355 – 0.483)

TYP

(LTC DWG # 05-08-1610)

0.004 – 0.010

(0.101 – 0.254)

0.050

(1.270)

BSC

0.228 – 0.244

(5.791 – 6.197)

0.189 – 0.197*
(4.801 – 5.004)

7

8

1

2

5

6

3

4

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LTC1100 Precision Chopper-Stabilized Instrumentation Amplifier G = 10 or 100, VOS = 10µV, IB = 50pA
LT1101 Precision, Micropower, Single Supply Instrumentation Amplifier G = 10 or 100, IS = 105µA
LT1102 High Speed, JFET Instrumentation Amplifier G = 10 or 100, Slew Rate = 30V/µs
LT1167 Single Resistor Programmable Precision Instrumentation Amplifier Lower Noise than LT1168, eN = 7.5nV/√Hz

0.150 – 0.157**
(3.810 – 3.988)

SO8 1298

16

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear-tech.com

1168i LT/TP 0300 4K • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 1998