Datasheet LT1055, LT1056 Datasheet (LINEAR TECHNOLOGY)

FEATURES

■

Guaranteed

Offset Voltage: 150µV Max

–55°C to 125°C: 500µV Max

■

Guaranteed

■

Guaranteed

Drift: 4µV/°C Max

Bias Current 70°C: 150pA Max 125°C: 2.5nA Max

■

Guaranteed

■

Available in 8-Pin PDIP and SO Packages

Slew Rate: 12V/µs Min

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APPLICATIO S

■

Precision, High Speed Instrumentation

■

Logarithmic Amplifiers

■

D/A Output Amplifiers

■

Photodiode Amplifiers

■

Voltage-to-Frequency Converters

■

Frequency-to-Voltage Converters

■

Fast, Precision Sample-and-Hold

LT1055/LT1056

Precision, High Speed,

JFET Input Operational Amplifiers

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DESCRIPTIO

The LT®1055/LT1056 JFET input operational amplifiers combine precision specifications with high speed performance.

For the first time, 16V/µs slew rate and 6.5MHz gain bandwidth product are simultaneously achieved with offset voltage of typically 50µV, 1.2µV/°C drift, bias currents of 40pA at 70°C and 500pA at 125°C.

The 150µV maximum offset voltage specification is the best available on any JFET input operational amplifier.

The LT1055 and LT1056 are differentiated by their operating currents. The lower power dissipation LT1055 achieves lower bias and offset currents and offset voltage. The additional power dissipation of the LT1056 permits higher slew rate, bandwidth and faster settling time with a slight sacrifice in DC performance.

The voltage-to-frequency converter shown below is one of the many applications which utilize both the precision and high speed of the LT1055/LT1056.

TYPICAL APPLICATIO

1Hz to 10kHz Voltage-to-Frequency Converter

4.7k 15V

10kHZ

TRIM

75k

0V TO 10V

INPUT

*1% FILM

5k

= 1N4148

2N3906

–15V

0.1µF

22k

3.3M

0.1µF

THE LOW OFFSET VOLTAGE OF LT1056 CONTRIBUTES ONLY 0.1Hz OF ERROR WHILE ITS HIGH SLEW RATE PERMITS 10kHz OPERATION.

U

3M

0.001 (POLYSTYRENE)

33pF

–

+

15V

7

LT1056

4

–15V

2

3

For a JFET input op amp with 23V/µs guaranteed slew rate, refer to the LT1022 data sheet.

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

Distribution of Input Offset Voltage

(H Package)

140

VS = ±15V

= 25°C

T

A

120

634 UNITS TESTED FROM THREE RUNS

OUTPUT 1Hz TO 10kHz

LM329

0.005% LINEARITY

LT1055/56 TA01

1.5k

6

100

80

60

NUMBER OF UNITS

40

20

0

–400

INPUT OFFSET VOLTAGE (µV)

–200

0

50% TO ±60µV

200

400

LT1055/56 TA02

10556fc

1

LT1055/LT1056

WW

W

ABSOLUTE MAXIMUM RATINGS

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(Note 1)

Supply Voltage ...................................................... ±20V

Differential Input Voltage ....................................... ±40V

Input Voltage ......................................................... ±20V

Output Short-Circuit Duration .......................... Indefinite

Operating Temperature Range

LT1055AM/LT1055M/LT1056AM/

LT1056M (OBSOLETE) .............. –55°C to 125°C

U

W

PACKAGE/ORDER INFORMATION

ORDER PART

NUMBER

LT1055CN8 LT1056CN8

BAL

1

–IN

2

+IN

3

–

V

4

N8 PACKAGE 8-LEAD PDIP

T

= 150°C, θJA = 130°C/ W

JMAX

TOP VIEW

N/C

8

+

V

7

OUT

6

BAL

5

LT1055AC/LT1055C/LT1056AC/

LT1056C................................................ 0°C to 70°C

Storage Temperature Range

All Devices ...................................... –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

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ORDER PART

NUMBER

LT1055S8 LT1056S8

S8 PART

MARKING

1

BAL

–IN

2

+IN

3

–

V

4

S8 PACKAGE

8-LEAD PLASTIC SO

T

= 150°C, θJA = 150°C/ W

JMAX

TOP VIEW

8

N/C

+

V

7

OUT

6

BAL

5

1055 1056

TOP VIEW

NC

BALANCE

–IN

+IN

8-LEAD TO-5 METAL CAN

T

= 150°C, θJA = 150°C/ W, θJC = 45°C/ W

JMAX

Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts specified with wider operating temperature ranges.

1

2

3

H PACKAGE

8

4

V

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

V

OS

I

OS

Input Offset Voltage (Note 2) LT1055 H Package — 50 150 — 70 400 µV

Input Offset Current Fully Warmed Up — 2 10 — 2 20 pA

+

V

7

6

OUT

5

BALANCE

–

LT1055ACH LT1055CH LT1055AMH LT1055MH

OBSOLETE PACKAGE

Consider the N8 Package for Alternate Source

TA = 25°C. VS = ± 15V, VCM = 0V unless otherwise noted.

LT1055AM/LT1056AM LT1055CH/LT1056CH LT1055AC/LT1056AC LT1055CN8/LT1056CN8

LT1056 H Package — 50 180 — 70 450 µV LT1055 N8 Package — — — — 120 700 µV LT1056 N8 Package — — — — 140 800 µV

ORDER PART

NUMBER

LT1056ACH LT1056CH LT1056AMH LT1056MH

LT1055M/LT1056M

10556fc

2

LT1055/LT1056

ELECTRICAL CHARACTERISTICS

TA = 25°C. VS = ± 15V, VCM = 0V unless otherwise noted.

LT1055M/LT1056M LT1055AM/LT1056AM LT1055CH/LT1056CH LT1055AC/LT1056AC LT1055CN8/LT1056CN8

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

I

B

Input Bias Current Fully Warmed Up — ±10 ±50 — ±10 ±50 pA

= 10V — 30 130 — 30 150 pA

V

CM

Input Resistance:Differential — 10

Common Mode V

= –11V to 8V — 10

CM

V

= 8V to 11V — 10

CM

12 12 11

—— 1012— Ω —— 1012— Ω —— 1011— Ω

Input Capacitance — 4 — — 4 — pF

e

n

Input Noise Voltage 0.1Hz to 10Hz LT1055 — 1.8 — — 2.0 — µV

LT1056 — 2.5 — — 2.8 — µV

P-P P-P

Input Noise Voltage Density f0 = 10Hz (Note 3) — 28 50 — 30 60 nV/√Hz

f

= 1kHz (Note 4) — 14 20 — 15 22 nV/√Hz

0

I

n

A

VOL

Input Noise Current Density f0 = 10Hz, 1kHz (Note 5) — 1.8 4 — 1.8 4 fA/√Hz

Large-Signal Voltage Gain V0 = ±10V RL = 2k 150 400 — 120 400 — V/mV

R

= 1k 130 300 — 100 300 — V/mV

L

Input Voltage Range ±11 ±12 — ±11 ±12 — V

CMRR Common Mode Rejection Ratio VCM = ±11V 86100—8398— dB

PSRR Power Supply Rejection Ratio VS = ±10V to ±18V 90 106 — 88 104 — dB

V

OUT

Output Voltage Swing RL = 2k ±12 ±13.2 — ±12 ±13.2 — V

SR Slew Rate LT1055 10 13 — 7.5 12 — V/µs

LT1056 12 16 — 9.0 14 — V/µs

GBW Gain Bandwidth Product f = 1MHz LT1055 — 5.0 — — 4.5 — MHz

LT1056 — 6.5 — — 5.5 — MHz

I

S

Supply Current LT1055 — 2.8 4.0 — 2.8 4.0 mA

LT1056 — 5.0 6.5 — 5.0 7.0 mA

Offset Voltage Adjustment Range R

= 100k — ±5—— ±5—mV

POT

The ● denotes the specifications which apply over the temperature range 0°C ≤ TA ≤ 70°C. V

= ±15V, VCM = 0V unless otherwise noted.

S

LT1055AC LT1055CH/LT1056CH LT1056AC LT1055CN8/LT1056CN8

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

V

OS

Input Offset Voltage (Note 2) LT1055 H Package

LT1056 H Package LT1055 N8 Package LT1056 N8 Package

Average Temperature H Package (Note 6) Coefficient of Input Offset N8 Package (Note 6)

●

— 100 330 — 140 750 µV

●

— 100 360 — 140 800 µV

●

— — — — 250 1250 µV

●

— — — — 280 1350 µV

●

— 1.2 4.0 — 1.6 8.0 µV/°C

●

— — — — 3.0 12.0 µV/°C

Voltage

I

OS

I

B

A

VOL

CMRR Common Mode Rejection Ratio VCM = ±10.5V

PSRR Power Supply Rejection Ratio VS = ±10V to ±18V

V

OUT

Input Offset Current Warmed Up LT1055

T

= 70°C LT1056

A

Input Bias Current Warmed Up LT1055

= 70°C LT1056

T

A

Large-Signal Voltage Gain VO = ±10V, RL = 2k

Output Voltage Swing RL = 2k

●

— 10 50 — 16 80 pA

●

— 14 70 — 18 100 pA

●

— ±30 ±150 — ±40 ±200 pA

●

— ±40 ±80 — ±50 ±240 pA

●

80 250 — 60 250 — V/mV

●

85100—8298— dB

●

89 105 — 87 103 — dB

●

±12 ±13.1 — ±12 ±13.1 — V

10556fc

3

LT1055/LT1056

ELECTRICAL CHARACTERISTICS

–55°C ≤ T

≤ 125°C. VS = ±15V, VCM = 0V, unless otherwise noted.

A

The ● denotes the specifications which apply over the temperature range

LT1055AM LT1055M LT1056AM LT1056M

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

V

OS

Input Offset Voltage (Note 2) LT1055

LT1056

Average Temperature (Note 6)

●

— 180 500 — 250 1200 µV

●

— 180 550 — 250 1250 µV

●

— 1.3 4.0 — 1.8 8.0 µV/°C Coefficient of Input Offset Voltage

I

OS

I

B

A

VOL

CMRR Common Mode Rejection Ratio VCM = ±10.5V

PSRR Power Supply Rejection Ratio VS = ±10V to ±17V

V

OUT

Input Offset Current Warmed Up LT1055

= 125°C LT1056

T

A

Input Bias Current Warmed Up LT1055

= 125°C LT1056

T

A

Large-Signal Voltage Gain VO = ±10V, RL = 2k

Output Voltage Swing RL = 2k

●

— 0.20 1.2 — 0.25 1.8 nA

●

— 0.25 1.5 — 0.30 2.4 nA

●

— ± 0.4 ±2.5 — ± 0.5 ±4.0 nA

●

— ± 0.5 ±3.0 — ± 0.6 ±5.0 nA

●

40 120 — 35 120 — V/mV

●

85100—8298— dB

●

88 104 — 86 102 — dB

●

±12 ± 12.9 — ± 12 ±12.9 — V

TA = 25°C. VS = ± 15V, VCM = 0V unless otherwise noted.

LT1055CS8/LT1056CS8

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

OS

I

OS

I

B

e

n

i

n

A

VOL

CMRR Common Mode Rejection Ratio VCM = ±11V 83 98 dB

PSRR Power Supply Rejection Ratio VS = ±10V to ±18V 88 104 dB

V

OUT

SR Slew Rate LT1055 7.5 12 V/µs

GBW Gain Bandwidth Product f = 1MHz LT1055 4.5 MHz

I

S

Input Offset Voltage (Note 2) 500 1500 µV

Input Offset Current Fully Warmed Up 5 30 pA

Input Bias Current Fully Warmed Up ± 30 ±100 pA

V

= 10V 30 150 pA

CM

Input Resistance Differential 0.4 TΩ

Common Mode V

= –11V to 8V 0.4 TΩ

CM

= 8V to 11V 0.05 TΩ

V

CM

Input Capacitance 4pF

Input Noise Voltage 0.1Hz to 10Hz LT1055 2.5 µV

LT1056 3.5 µV

P-P P-P

Input Noise Voltage Density fO = 10Hz (Note 4) 35 70 nV/√Hz

f

= 1kHz (Note 4) 15 22 nV/√Hz

O

Input Noise Current Density fO = 10Hz, 1kHz (Note 5) 2.5 10 fA/√Hz

Large-Signal Voltage Gain VO = ±10V RL = 2k 120 400 V/mV

= 1k 100 300 V/mV

R

L

Input Voltage Range ±11 ± 12 V

Output Voltage Swing RL = 2K ±12 ± 13.2 V

LT1056 9.0 14 V/µs

LT1056 5.5 MHz

Supply Current LT1055 2.8 4.0 mA

LT1056 5.0 7.0 mA

Offset Voltage Adjustment Range R

= 100k ±5mV

POT

10556fc

4

LT1055/LT1056

ELECTRICAL CHARACTERISTICS

0°C ≤ T

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

I

OS

I

B

A

CMRR Common Mode Rejection Ratio VCM = ±10.5V ● 82 98 dB

PSRR Power Supply Rejection Ratio VS = ±10V to ±18V ● 87 103 dB

V

For MIL-STD components, please refer to LTC883 data sheet for test listing and parameters.

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.

Note 2: Offset voltage is measured under two different conditions: (a) approximately 0.5 seconds after application of power; (b) at T only, with the chip heated to approximately 38°C for the LT1055 and to 45°C for the LT1056, to account for chip temperature rise when the device is fully warmed up.

≤ 70°C. VS = ±15V, VCM = 0V, unless otherwise noted.

A

OS

VOL

OUT

Input Offset Voltage (Note 2) ● 800 2200 µV

Average Temperature Coefficient of Input Offset Voltage ● 415µV/°C

Input Offset Current Warmed Up, TA = 70°C ● 18 150 pA

Input Bias Current Warmed Up, TA = 70°C ● ± 60 ±400 pA

Large-Signal Voltage Gain VO = ±10V, RL = 2k ● 60 250 V/mV

Output Voltage Swing RL = 2K ● ±12 ± 13.1 V

The ● denotes the specifications which apply over the temperature range

LT1055CS8/LT1056CS8

Note 3: 10Hz noise voltage density is sample tested on every lot of A

grades. Devices 100% tested at 10Hz are available on request.

= 25°C

A

Note 4: This parameter is tested on a sample basis only. Note 5: Current noise is calculated from the formula: i

q = 1.6 • 10 the contribution of current noise.

Note 6: Offset voltage drift with temperature is practically unchanged when the offset voltage is trimmed to zero with a 100k potentiometer between the balance terminals and the wiper tied to V tighter drift specifications are available on request.

–19

coulomb. The noise of source resistors up to 1GΩ swamps

n

+

1/2

= (2qlB)

. Devices tested to

, where

10556fc

5

LT1055/LT1056

RMS NOISE VOLTAGE DENSITY (nV/√Hz)

FREQUENCY (Hz)

1

100

30

300

LT1055/56 G09

30

10

3 10 100

300

1000

LT1056

1/f CORNER = 28HZ

LT1055

1/f CORNER

= 20HZ

VS = ±15V T

A

= 25°C

W

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TYPICAL PERFORMANCE CHARACTERISTICS

Input Bias and Offset Currents vs Temperature

1000

VS = ±15V

= 0V

V

CM

WARMED UP

300

BIAS OR OFFSET CURRENTS MAY BE POSITIVE OR NEGATIVE

100

BIAS CURRENT

30

10

INPUT BIAS AND OFFSET CURRENT (pA)

3

25

0

AMBIENT TEMPERATURE (°C)

OFFSET CURRENT

50

75

100

LT1055/56 G01

Distribution of Offset Voltage Drift with Temperature (H Package)*

140

VS = ±15V 634 UNITS TESTED

120

FROM THREE RUNS

100

80

60

40

BATTERY VOLTAGE (V)

20

0

–10

OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)

*DISTRIBUTION IN THE PLASTIC (N8) PACKAGE IS SIGNIFICANTLY WIDER.

–4

0

–2

–6

–8

50% TO ±1.5µV/°C

4

26

8

LT1055/56 G04

120

80

= 70°C (pA)

A

40

= 25°C, T

A

0

–40

–80

–120

INPUT BIAS CURRENT, T

125

10

–15

100

80

60

40

20

CHANGE IN OFFSET VOLTAGE (µV)

Input Bias Current Over the Common Mode Range

VS = ±15V WARMED UP

TA = 125°C

A

TA = 70°C

B

A = POSITIVE INPUT CURRENT

B

B = NEGATIVE INPUT CURRENT

–5 0 5 10 15

–10

COMMON MODE INPUT VOLTAGE (V)

TA = 70°C

TA = 25°C

TA = 125°C

Warm-Up Drift

VS = ±15V

= 25°C

T

A

LT1056CN8

LT1055CN8

LT1056 H PACKAGE

LT1055 H PACKAGE

0

1

0

TIME AFTER POWER ON (MINUTES)

2

3

LT1055/56 G02

4

LT1055/56 G05

1200

INPUT BIAS CURRENT, T

800

400

0

A

= 125°C (pA)

–400

–800

–1200

5

NUMBER OF INPUTS

50

40

30

20

10

–10

–20

–30

OFFSET VOLTAGE CHANGE µV)

–40

–50

Distribution of Input Offset Voltage (N8 Package)

160

VS = ±15V

= 25°C

T

A

140

550 UNITS TESTED FROM

120

TWO RUNS (LT1056)

100

80

60

40

20

0 –800

–600

–400

INPUT OFFSET VOLTAGE (µV)

–200

0

Long Term Drift of Representative Units

VS = ±15V

= 25°C

T

A

0

1

0

2

TIME (MONTHS)

3

200

50% YIELD TO ±140µV

400

600

LT1055/56 G03

4

LT1055/56 GO6

800

5

NOISE VOLTAGE (1µV/DIVISION)

0

6

0.1Hz to 10Hz Noise

LT1056

LT1055

2

4

TIME (SECONDS)

6

8

LT1055/56 GO7

Voltage Noise vs FrequencyNoise vs Chip Temperature

10

)

P-P

7

5

3

f0 = 10kHz

2

0.1Hz TO 10Hz PEAK-TO-PEAK NOISE (µV/

1

10

20

PEAK-TO-PEAK

NOISE

f0 = 1kHz

50 60 70

40

CHIP TEMPERATURE (°C)

LT1055/56 G08

100

RMS NOISE VOLTAGE DENSITY (nV/√Hz)

70

50

30

20

10

8030

10556fc

W

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TYPICAL PERFORMANCE CHARACTERISTICS

LT1055/LT1056

LT1056 Large-Signal Response

5V/DIV

AV = 1, CL = 100pF, 0.5µs/DIV

LT1055/56 G10

Undistorted Output Swing vs Frequency Output Impedence vs Frequency

30

24

18

LT1055 LT1056

12

6

PEAK-TO-PEAK OUTPUT SWING (V)

0

0.1

110

FREQUENCY (MHz)

VS = ±15V

= 25°C

T

A

LT1055/56 G13

Small-Signal Response

20mV/DIV

AV = 1, CL = 100pF, 0.2µs/DIV

Slew Rate, Gain Bandwidth vs Temperature

30

LT1056 GBW

20

10

SLEW RATE (V/µS)

0

LT1056 SLEW

VS = ±15V

= 1MHz FOR GBW

f

0

–25

TEMPERATURE (˚C)

LT1055 GBW

LT1055 SLEW

25 75

LT1055/56 G11

10

GAIN BANDWIDTH PRODUCT (MHz)

8

6

4

2

125

LT1055/56 G14

LT1055 Large-Signal Response

5V/DIV

AV = 1, CL = 100pF, 0.5µs/DIV

100

VS = ±15V

= 25°C

T

A

10

1

OUTPUT IMPEDANCE (Ω)

0.1 1

AV = 100

LT1055

LT1056

AV = 10

LT1055 LT1056

LT1055

10 100 1000 FREQUENCY (kHz)

LT1055/56 G12

LT1056

AV = 1

LT1055/56 G15

Gain vs Frequency

140

VS = ±15V

= 25°C

T

A

120

100

80

60

GAIN (dB)

40

20

0

–20

10

1

100

10k

LT1056

100k

LT1055

1k

FREQUENCY (Hz)

1M

LT1055/56 G16

10M

100M

Gain, Phase Shift vs Frequency

20

10

GAIN (dB)

0

–10

1

VS = ±15V

= 25°C

T

A

LT1055

2

FREQUENCY (MHz)

PHASE

LT1055

GAIN

4

LT1056

6

LT1055/56 G17

100

120

140

160

10

8

1000

PHASE SHIFT (DEGREES)

300

100

VOLTAGE GAIN (V/mV)

30

10

–75

R

RL = 1k

–25

25

TEMPERATURE (°C)

= 2k

L

VS = ±15V

= ±10V

V

O

75

LT1055/56 G18

125

10556fc

7

Voltage Gain vs Temperature

LT1055/LT1056

TIME FROM OUTPUT SHORT TO GROUND

(MINUTES)

0

–50

SHORT-CIRCUIT CURRENT (mA)

–40

–20

–10

0

50

20

1

2

LT1055/56 G27

–30

30

40

10

3

TA = –55°C

T

A

= 25°C

TA = 125°C

T

A

= 25°C

T

A

= –55°C

SINKING

VS = ±15V

W

U

TYPICAL PERFORMANCE CHARACTERISTICS

LT1055 Settling Time

10

10mV

5

0

5mV 2mV

–5

10mV

OUTPUT VOLTAGE SWING FROM 0V (V)

–10

0

2mV

0.5mV

1mV5mV

0.5mV

1mV

12

SETTLING TIME (µS)

Common Mode and Power Supply Rejections vs Temperature

120

VS = ±10V TO ±17V FOR PSRR

= ±15V, VCM = ±10.5V FOR CMRR

V

S

VS = ±15V

= 25°C

T

A

LT1055/56 G19

3

LT1056 Settling Time

10

10mV

5

0

5mV

–5

10mV

OUTPUT VOLTAGE SWING FROM 0V (V)

–10

0

2mV

1mV5mV

2mV

1mV

12

SETTLING TIME (µS)

Common Mode Rejection Ratio vs Frequency

120

100

0.5mV

VS = ±15V

= 25°C

T

A

0.5mV

LT1055/56 G20

VS = ±15V

= 25°C

T

A

Common Mode Range vs Temperature

15

14

13

12

11

±10

≈ ≈

–11

–12

BATTERY VOLTAGE (V)

–13

–14

VS = ±15V

3

–15

–50

0

TEMPERATURE (°C)

50

100

LT1055/56 G21

Power Supply Rejection Ratio vs Frequency

140

TA = 25°C

120

110

100

CMRR, PSRR (dB)

90

–25

8

6

25°C

4

SUPPLY CURRENT (mA)

8

2

0

25°C

PSRR

CMRR

25 75

TEMPERATURE (˚C)

TA = –55°C

LT1056

TA = 125°C

TA = –55°C

LT1055

TA = 125°C

±5

±10

SUPPLY VOLTAGE (V)

LT1055/56 G22

±15

LT1055/56 G25

125

±20

80

60

CMRR (dB)

40

20

0

10

100

1k 10k 100k

FREQUENCY (Hz)

Output Swing vs Load ResistanceSupply Current vs Supply Voltage

15

TA = –55°C

12

9

6

3

TA = –125°C

0

–3

–6

–9

OUTPUT VOLTAGE SWING (V)

TA = –55°C

–12

–15

0.1 0.3

TA = –25°C

LOAD RESISTANCE (kΩ)

1M 10M

LT1055/56 G23

VS = ±15V

TA = –125°C

13 10

LT1055/56 G26

100

80

NEGATIVE

60

40

20

POWER SUPPLY REJECTION RATIO (dB)

0

10

SUPPLY

100 1k

FREQUENCY (Hz)

POSITIVE SUPPLY

100k 10M

10k 1M

Short-Circuit Current vs Time

LT1055/56 G24

10556fc

LT1055/LT1056

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WUU

APPLICATIONS INFORMATION

The LT1055/LT1056 may be inserted directly into LF155A/ LT355A, LF156A/LT356A, OP-15 and OP-16 sockets. Offset nulling will be compatible with these devices with the wiper of the potentiometer tied to the positive supply.

Offset Nulling

1

R

P

–

LT1055 LT1056

+

5

7

4

–

V

2

3

No appreciable change in offset voltage drift with temperature will occur when the device is nulled with a potentiometer, R

, ranging from 10k to 200k.

P

The LT1055/LT1056 can also be used in LF351, LF411, AD547, AD611, OPA-111, and TL081 sockets, provided that the nulling cicuitry is removed. Because of the LT1055/ LT1056’s low offset voltage, nulling will not be necessary in most applications.

Achieving Picoampere/Microvolt Performance

In order to realize the picoampere-microvolt level accuracy of the LT1055/LT1056 proper care must be exercised. For example, leakage currents in circuitry external to the op amp can significantly degrade performance. High quality insulation should be used (e.g. Teflon™, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will probably be required. Surface coating may be necessary to provide a moisture barrier in high humidity environments.

Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs: in inverting configurations the guard ring should be tied to ground, in noninverting connnections to the inverting input at pin 2. Guarding both sides of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width.

Teflon is a trademark of Dupont.

6

LT1055/56 AI1

V

+

OUT

OUTPUT

OFFSET

TRIM

N/C

+

V

8

7

6

5

4

–

V

GUARD

OFFSET

TRIM

1

2

3

INPUTS

LT1055/56 AI2

The LT1055/LT1056 has the lowest offset voltage of any JFET input op amp available today. However, the offset voltage and its drift with time and temperature are still not as good as on the best bipolar amplifiers because the transconductance of FETs is considerably lower than that of bipolar transistors. Conversely, this lower transconductance is the main cause of the significantly faster speed performance of FET input op amps.

Offset voltage also changes somewhat with temperature cycling. The AM grades show a typical 20µV hysteresis (30µV on the M grades) when cycled over the –55°C to 125°C temperature range. Temperature cycling from 0°C to 70°C has a negligible (less than 10µV) hysteresis effect.

The offset voltage and drift performance are also affected by packaging. In the plastic N8 package the molding compound is in direct contact with the chip, exerting pressure on the surface. While NPN input transistors are largely unaffected by this pressure, JFET device matching and drift are degraded. Consequently, for best DC performance, as shown in the typical performance distribution plots, the TO-5 H package is recommended.

Noise Performance

The current noise of the LT1055/LT1056 is practically immeasurable at 1.8fA/√Hz. At 25°C it is negligible up to 1G of source resistance, R R

). Even at 125°C it is negligible to 100M of RS.

S

(compound to the noise of

S

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9

LT1055/LT1056

U

WUU

APPLICATIONS INFORMATION

The voltage noise spectrum is characterized by a low 1/f corner in the 20Hz to 30Hz range, significantly lower than on other competitive JFET input op amps. Of particular interest is the fact that with any JFET IC amplifier, the frequency location of the 1/f corner is proportional to the square root of the internal gate leakage currents and, therefore, noise doubles every 20°C. Furthermore, as illustrated in the noise versus chip temperature curves, the 0.1Hz to 10Hz peak-to-peak noise is a strong function of temperature, while wideband noise (f0 = 1kHz) is practically unaffected by temperature.

Consequently, for optimum low frequency noise, chip temperature should be minimized. For example, operating an LT1056 at ± 5V supplies or with a 20°C/W case-to- ambient heat sink reduces 0.1Hz to 10Hz noise from typically 2.5µV the noise of an LT1055 will be 1.8µV of its lower power dissipation and chip temperature.

(±15V, free-air) to 1.5µV

P-P

. Similiarly,

P-P

typically because

P-P

capacitance is isolated from the “false summing” node, and (2) it does not require a “flat top” input pulse since the input pulse is merely used to steer current through the diode bridges. For more details, please see Application Note 10.

As with most high speed amplifiers, care should be taken with supply decoupling, lead dress and component placement.

When the feedback around the op amp is resistive (R pole will be created with R capacitance (R (C

≈ 4pF). In low closed-loop gain configurations and

IN

with R

and RF in the kilohm range, this pole can create

S

, CS), and the amplifier input capacitance

S

, the source resistance and

F

), a

excess phase shift and even oscillation. A small capacitor

) in parallel with RF eliminates this problem. With R

(C

F

S

(CS + CIN) = RFCF, the effect of the feedback pole is completely removed.

C

F

High Speed Operation

Settling time is measured in the test circuit shown. This test configuration has two features which eliminate problems common to settling time measurments: (1) probe

Settling Time Test Circuit

10pF (TYPICAL)

–

LT1055 LT1056

+

PULSE GEN

INPUT

(5V MIN STEP)

15V

15k

+

0.01 DISC

–15V

0.01 DISC

10µF

+

SOLID TANTALUM

0.01 DISC

2k

50Ω

2W

2k

10µF SOLID TANTALUM

10µF SOLID

+

TANTALUM

15V

15k

0.01 DISC

+

10µF

+

SOLID TANTALUM

15k

10k

AMPLIFIER

UNDER

TEST

AUT OUTPUT

10k

= 1N4148

R

S

HP5082-8210

HEWLETT PACKARD

R

F

–

C

S

IN

OUTPUT

+

LT1055/56 AI03

15V

4.7k

–15V

2N3866

3Ω

OUTPUT TO SCOPE

3Ω

2N5160

LT1055/56 AI04

10556fc

15V

–15V

1/2 U440

50Ω

1/2 U440

100Ω DC ZERO

2N160

–15V

15V

2N3866

10

LT1055/LT1056

U

WUU

APPLICATIONS INFORMATION

Phase Reversal Protection

Most industry standard JFET input op amps (e.g., LF155/ LF156, LF351, LF411, OP15/16) exhibit phase reversal at the output when the negitive common mode limit at the input is exceeded (i.e., from –12V to –15V with ±15V supplies). This can cause lock-up in servo systems. As shown below, the LT1055/LT1056 does not have this problem due to unique phase reversal protection circuitry (Q1 on simplified schematic).

10V/DIV

Input

0.5ms/DIV 0.5ms/DIV

LT1055/56 AI06 LT1055/56 AI07 LT1055/56 AI08

(LF155/LF56, LF441, OP-15/OP-16)

10V/DIV

Output

Voltage Follower with Input Exceeding the Negative

Common Mode Range

15V

7

2

INPUT

±15V

SINE WAVE

–

3

+

LT1055/56

–15V

6

OUTPUT

4

2k

LT1055/56 AI05

Output

LT1055/LT1056

10V/DIV

0.5ms/DIV

U

TYPICAL APPLICATIONS

Exponential Voltage-to-Frequency Converter for Music Synthesizers

INPUT

0V TO 10V

EXPONENT

TRIM

2500Ω*

ZERO TRIM

562Ω*

15V

SCALE FACTOR 1V IN OCTAVE OUT *1% METAL FILM RESISTOR PIN NUMBERED TRANSISTORS = CA3096 ARRAY

11.3k*

3.57k*

4.7k

10k*

1k*

500k

†

500pF

POLYSTYRENE

5

6

4

1.1k

1

3

15V

2

3

10k*

2

3

TEMPERATURE CONTROL LOOP

–

+

–

LM301A

+

–15V

LT1055

–15V

15V

1

42

0.01µF

7

6

7

6

8

3k

1N148

2N3906

LM329

2N3904

500Ω*

13

15

14

2.2k

SAWTOOTH OUTPUT

1k*

4.7k

15V

9

8

7

LT1055/56 TA03

33Ω

†

For ten additional applications utilizing the LT1055 and LT1056, please see the LTC1043 data sheet and Application Note 3.

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11

LT1055/LT1056

TYPICAL APPLICATIO S

U

12-Bit Charge Balance A/D Converter

74C00

249k*

0V TO 10V INPUT

COUPLE

THERMALLY

2

–

3

+

1N4148

0.01

LT1055

28k

15V

–15V

33k

6

33k

7

4

15V

7

4

–15V

6

1N4148

LM329

LT1001

14k

1N4148

–

+

0.003µF

CLK OUTPUT (B)

f f

OUT CLK

10k

(A)

(B)

CLK

Q

74C74

D

10k

2

3

P

CL

15V

10k

CIRCUIT OUTPUT

RATIO

LT1055/56 TA04

Q

2N3904

15V

OUTPUT

(A)

Fast “No Trims” 12-Bit Multiplying CMOS DAC Amplifier

R

REFERENCE

IN

TYPICAL 12-BIT

CMOS DAC

I

OUT1

FEEDBACK

–

LT1055

I

OUT2

+

LT1055/56 TA05

12

OUTPUT

15V

INPUT

4.7k

LT1009

2.5V

Fast, 16-Bit Current Comparator

HP5082-2810

50k*

100k*

2

3

–

+

LT1056

–15V

15V

7

4

2

6

+

3

–

DELAY = 250ns * = 1% FILM RESISTOR

15V

8

LT1011

4

–15V

7

1

3k

OUTPUT

LT1055/56 TA06

10556fc

U

TYPICAL APPLICATIO S

LT1055/LT1056

Temperature-to-Frequency Converter

0V TO 10V

INPUT

560Ω

15V

LM329

*1% FILM RESISTOR =1N4148 FREQUENCY LINEARITY = 0.1%

FREQUENCY STABILITY = 150ppm/°C SETTLING TIME = 1.7µs DISTORTION = 0.25% AT 100kHz,

0.07% AT 10zHz

100kHz

DISTORTION

TRIM

10k*

2

3

9.09k*

–

+

15V

LT1056

–15V

10k

2k

7

2N4391

6

4

2N4391

510Ω

50k

10Hz

DISTORTION

TRIM

2N4391

1k*

2N2222

0.01µF

POLYSTYRENE

15V

7

–

LT1055

+

4

–15V

137Ω*

*1% FILM RESISTOR

6

500Ω

0°C ADJ

820Ω*

6.2k*

2V

6.2k*

100°C

ADJ

1k*

2N2907

2k

2

3

LM134

100kHz Voltage Controlled Oscillator

15V

POLYSTYRENE

22M

–15V

5k*

2.5k*

20pF

500pF

15V

2

–

LT1056

3

+

–15V

7

4

15pF

6

HP5082-

2810

22k

510pF

1k

FINE

DISTORTION

TRIMS

10k*

15V

10k

2.7k 2N2222

10k

LT1055/56 TA07

2

–

LT1056

3

+

4.5k22.1k

68k

10k

68k

–15V

2

3

+

–

8

LT1011

4

–15V

15V

7

4

–15V

7

1

TTL OUTPUT 0kHz TO 1kHz = 0°C TO 100°C

4.7k

6

5k

FREQUENCY

TRIM

15V

1k

X1 X2 U1 U2 COM

VR Y1 Y2

1k

0.01µF

AD639

+V CC

GT UP –V

W Z1 Z2

10k

+15V SINE OUT 2V

RMS

0kHs TO 100kHs

–15

–15V

4.7k

LM329

15V

4.7k

LT1055/56 TA08

10556fc

13

LT1055/LT1056

TYPICAL APPLICATIO S

U

12-Bit Voltage Output D/A Converter

12-BIT CURRENT OUTPUT D/A

CONVERTER (e.g., 6012,565

OR DAC-80)

0 TO 2

OR 4mA

C

= 15pF TO 33pF

F

SETTLING TIME TO 2mV (0.8 LSB) = 1.5µs TO 2µs

C

F

15V

2

3

–

LT1056

+

–15V

7

4

0V TO 10V

6

OUTPUT

LT1055/56 TA09

SI PLIFIED

NULL

1

2

–INPUT

3

+INPUT

WW

SCHE ATIC

NULL

5

7k 7k

J5

J6

J1 J2

J8

Q1

14k14k

*CURRENTS AS SHOWN FOR LT1055. (X) = CURRENTS FOR LT1056.

8k

200Ω

9pF

Q2

Q7

Q13

Q3

120µA*

(160)

Q4

Q11

300Ω

Q12

Q8

120µA* (160)

7.5pF

+

7

V

J7

Q9

Q15

20Ω

6 OUTPUT

J3

Q5

J4

3k

LT1055/56 SCHM

Q16

50Ω

–

4

V

Q14

800µA* (1000)

Q10

400µA* (1100)

14

10556fc

PACKAGE DESCRIPTIO

SEATING

PLANE

0.010 – 0.045* (0.254 – 1.143)

45°TYP

0.028 – 0.034

(0.711 – 0.864)

U

H Package

8-Lead TO-5 Metal Can (.200 Inch PCD)

(Reference LTC DWG # 05-08-1320)

0.335 – 0.370

(8.509 – 9.398)

DIA

0.305 – 0.335

0.040

(1.016)

MAX

(7.747 – 8.509)

0.016 – 0.021** (0.406 – 0.533)

0.050

(1.270)

MAX

0.027 – 0.045

(0.686 – 1.143)

PIN 1

GAUGE PLANE

0.200

(5.080)

TYP

0.165 – 0.185

(4.191 – 4.699)

0.500 – 0.750

(12.700 – 19.050)

REFERENCE PLANE

LT1055/LT1056

0.110 – 0.160

(2.794 – 4.064)

INSULATING

STANDOFF

*

LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE AND 0.045" BELOW THE REFERENCE PLANE

**

FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS

OBSOLETE PACKAGE

N8 Package

8-Lead PDIP (Narrow .300 Inch)

(Reference LTC DWG # 05-08-1510)

87 6

.255 ± .015*

(6.477 ± 0.381)

1234

.300 – .325

(7.620 – 8.255)

.065

(1.651)

.008 – .015

(0.203 – 0.381)

+.035

.325

–.015 +0.889

8.255

()

–0.381

NOTE:

1. DIMENSIONS ARE

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)

INCHES

MILLIMETERS

TYP

.045 – .065

(1.143 – 1.651)

.100

(2.54)

BSC

.400*

(10.160)

MAX

5

.130 ± .005

(3.302 ± 0.127)

.120

(3.048)

MIN

.018 ± .003

(0.457 ± 0.076)

0.016 – 0.024

(0.406 – 0.610)

H8(TO-5) 0.200 PCD 1197

.020

(0.508)

MIN

N8 1002

10556fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

15

LT1055/LT1056

TYPICAL APPLICATIO

U

±120V Output Precision Op Amp

125V

±25mA OUTPUT HEAT SINK OUTPUT TRANSISTORS

10k

INPUT

PACKAGE DESCRIPTIO

10k

100k

1µF

10k

33pF

1N965

50k

7

6

4

50k1M1M

1N965

10k

100pF

2

–

LT1055

3

+

510Ω

1µF

–125V

330Ω

2N5415

2N2222

1N4148

2N2907

2N3440

330Ω

1k

U

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

.189 – .197

.050 BSC

.045 ±.005

(4.801 – 5.004)

8

NOTE 3

7

6

2N3440

27Ω

OUTPUT

27Ω

2N5415

LT1055/56 TA10

5

.245 MIN

.030 ±.005

TYP

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

(0.254 – 0.508)

.008 – .010

(0.203 – 0.254)

.016 – .050

NOTE:

1. DIMENSIONS IN

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

(0.406 – 1.270)

(MILLIMETERS)

× 45°

INCHES

.160

±.005

0°– 8° TYP

.228 – .244

(5.791 – 6.197)

.053 – .069

(1.346 – 1.752)

.014 – .019

(0.355 – 0.483)

TYP

.150 – .157

(3.810 – 3.988)

NOTE 3

1

3

2

4

.050

(1.270)

BSC

.004 – .010

(0.101 – 0.254)

SO8 0303

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1122 Fast Settling JFET Op Amp 340ns Settling Time, GBW = 14MHz, SR = 60V/µs

LT1792 Low Noise JFET Op Amp en = 6nV/√Hz Max at f = 1kHz

LT 0406 REV C • PRINTED IN USA

16

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507

●

www.linear.com

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Datasheet LT1055, LT1056 Datasheet (LINEAR TECHNOLOGY)

Specifications and Main Features

Frequently Asked Questions

User Manual