Datasheet LT1011AMH, LT1011AIS8, LT1011ACN8, LT1011ACJ8, LT1011ACH Datasheet (Linear Technology)

FEATURES

LT1011/LT1011A

Voltage Comparator

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DESCRIPTIO

■

Pin Compatible with LM111 Series Devices

■

Guaranteed

■

Guaranteed

■

Guaranteed

■

Guaranteed

■

Guaranteed

■

50mA Output Current Source or Sink

■

±30V Differential Input Voltage

■

Fully Specified for Single 5V Operation

Max 0.5mV Input Offset Voltage
Max 25nA Input Bias Current
Max 3nA Input Offset Current
Max 250ns Response Time
Min 200,000 Voltage Gain

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APPLICATIO S

■

SAR A/D Converters

■

Voltage-to-Frequency Converters

■

Precision RC Oscillator

■

Peak Detector

■

Motor Speed Control

■

Pulse Generator

■

Relay/Lamp Driver

, LTC and LT are registered trademarks of Linear Technology Corporation.

The LT®1011 is a general purpose comparator with sig­nificantly better input characteristics than the LM111.
Although pin compatible with the LM111, it offers four
times lower bias current, six times lower offset voltage and
five times higher voltage gain. Offset voltage drift, a
previously unspecified parameter, is guaranteed at
15µV/°C. Additionally, the supply current is lower by a
factor of two with no loss in speed. The LT1011 is several
times faster than the LM111 when subjected to large
overdrive conditions. It is also fully specified for DC
parameters and response time when operating on a single
5V supply. These parametric improvements allow the
LT1011 to be used in high accuracy (≥12-bit) systems
without trimming. In a 12-bit A/D application, for instance,
using a 2mA DAC, the offset error introduced by the
LT1011 is less than 0.5LSB. The LT1011 retains all the
versatile features of the LM111, including single 3V to
±18V supply operation, and a floating transistor output
with 50mA source/sink capability. It can drive loads refer­enced to ground, negative supply or positive supply, and
is specified up to 50V between V– and the collector output.
A differential input voltage up to the full supply voltage is
allowed, even with ±18V supplies, enabling the inputs to
be clamped to the supplies with simple diode clamps.

TYPICAL APPLICATIO

10µs 12-Bit A/D Converter

R1

15V

PARALLEL

OUTPUTS

5V

1k

FULL-SCALE

TRIM

R2*

6.49k

20 14 15 16 17

13

10 9 8 7 6 5 4 32

12

11

456789161718192021

24

E

12

LM329
7V

R3

0.001µF

6.98k

6012

12-BIT

D/A CONVERTER

AM2504

SAR REGISTER

SCP

START CLOCK f = 1.4MHz

3.9k

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1

D

CC

S

15V

–15V

19

18

PARALLEL
OUTPUTS

SERIAL OUTPUT

*R2 AND R4
SHOULD TC TRACK

INPUT

0V TO 10V 5V

R4*

2.49k
2

+

R6

7475

LATCH

3

LT1011A

–

1011 TA01

820Ω

Response Time vs Overdrive

500
450
400

R5

1k

7

350
300

250
200

RISING

150
100

OUTPUT

50

0

0.1

RESPONSE TIME (ns)

FALLING
OUTPUT

1 10 100

OVERDRIVE (mV)

1011 TA02

1

LT1011/LT1011A

WW

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ABSOLUTE MAXIMUM RATINGS

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(Note 1)

Supply Voltage (Pin 8 to Pin 4) .............................. 36V

Output to Negative Supply (Pin 7 to Pin 4)

LT1011AC, LT1011C .......................................... 40V

LT1011AI, LT1011I ............................................ 40V

LT1011AM, LT1011M (OBSOLETE) .............. 50V

Ground to Negative Supply (Pin 1 to Pin 4) ............ 30V

Differential Input Voltage ...................................... ±36V

Voltage at STROBE Pin (Pin 6 to Pin 8) .................... 5V

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PACKAGE/ORDER INFORMATION

TOP VIEW

+

V

8

1

GND

2

INPUT

INPUT

3

H PACKAGE

8-LEAD TO-5 METAL CAN

T

= 150°C, θJA = 150°C/W, θJC = 45°C/W

JMAX

7

+

–

5

4

–

V

OUTPUT

BALANCE/

6

STROBE

BALANCE

ORDER PART

NUMBER

LT1011ACH
LT1011CH
LT1011AMH
LT1011MH

INPUT
INPUT

Input Voltage (Note 2) ....................... Equal to Supplies

Output Short-Circuit Duration.............................. 10 sec

Operating Temperature Range (Note 3)

LT1011AC, LT1011C ............................... 0°C to 70°C

LT1011AI, LT1011I ........................... –40°C to 85°C

LT1011AM, LT1011M (OBSOLETE) –55°C to 125°C

Storage Temperature Range .................– 65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

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TOP VIEW

GND

1
2

+
–

3

–

V

4

N8 PACKAGE
8-LEAD PDIP

T

= 150°C, θJA = 130°C/ W(N8)

JMAX

= 150°C, θJA = 150°C/ W(S8)

T

JMAX

V+

8

OUTPUT

7

BALANCE/

6

STROBE
BALANCE

5

S8 PACKAGE

8-LEAD PLASTIC SO

ORDER PART NUMBER

LT1011ACN8
LT1011CN8
LT1011CS8
LT1011AIS8
LT1011IS8

S8 PART MARKING

1011
1011AI
1011I

T

JMAX

OBSOLETE PACKAGES

Consider the N8 or S8 Packages for Alternate Source

Consult LTC Marketing for parts specified with wider operating temperature ranges.

J8 PACKAGE 8-LEAD CERDIP

= 150°C, θJA = 100°C/ W(J8)

ORDER PART NUMBER

LT1011ACJ8
LT1011CJ8

LT1011AMJ8
LT1011MJ8

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VS = ±15V, VCM = 0V, RS = 0Ω, V1 = –15V, output at pin 7 unless otherwise noted.

LT1011AC/AI/AM LT1011C/I/M

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

V

OS

I

OS

I

B

Indicates parameters which are guaranteed for all supply voltages, including a single 5V supply. See Note 5.

*

Input Offset Voltage (Note 4) 0.3 0.5 0.6 1.5 mV

● 1.0 3.0 mV

*Input Offset Voltage RS ≤ 50k (Note 5) 0.75 2.0 mV

● 1.50 3.0 mV

*Input Offset Current (Note 5) 0.2 3 0.2 4 nA

● 56nA

Input Bias Current (Note 4) 15 25 20 50 nA
*Input Bias Current (Note 5) 20 35 25 65 nA

● 50 80 nA

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LT1011/LT1011A

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating temperature range, otherwide specifications are at TA = 25°C.
VS = ±15V, VCM = 0V, RS = 0Ω, V1 = –15V, output at pin 7 unless otherwise noted.

LT1011AC/AI/AM LT1011C/I/M

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

∆V

OS

∆T (Note 6)
A

VOL

CMRR Common Mode 94 115 90 115 dB

t

D

V

OL

Input Offset Voltage Drift T

*Large-Signal Voltage Gain RL = 1k to 15V, 200 500 200 500 V/mV

Rejection Ratio
*Input Voltage Range VS = ±15V ● –14.5 13 –14.5 13 V

(Note 9) V
*Response Time (Note 7) 150 250 150 250 ns
*Output Saturation Voltage, VIN = 5mV, I

V

= 0 VIN = 5mV, I

1

*Output Leakage Current VIN = 5mV, V1 = –15V, 0.2 10 0.2 10 nA

*Positive Supply Current 3.2 4.0 3.2 4.0 mA
*Negative Supply Current 1.7 2.5 1.7 2.5 mA
*Strobe Current Minimum to Ensure Output 500 500 µA

(Note 8) Transistor is Off
Input Capacitance 6 6 pF

≤ T ≤ T

MIN

–10V ≤ V
RL = 500Ω to 5V, 50 300 50 300 V/mV

0.5V ≤ V

= Single 5V ● 0.5 3 0.5 3 V

S

= 5mV, I

V

IN

V

OUT

MAX

≤ 14.5V

OUT

≤ 4.5V

OUT

= 8mA, TJ ≤ 100°C 0.25 0.40 0.25 0.40 V

SINK

= 8mA ● 0.25 0.45 0.25 0.45 V

SINK

= 50mA ● 0.70 1.50 0.70 1.50 V

SINK

= 35V (25V for LT1011C/I) ● 500 500 nA

● 415 425µV/°C

Indicates parameters which are guaranteed for all supply voltages, including a single 5V supply. See Note 5.

*

Note 1: Absolute Maximum Ratings are those values beyond which the
life of a device may be impaired.

Note 2: Inputs may be clamped to supplies with diodes so that
maximum input voltage actually exceeds supply voltage by one diode
drop. See Input Protection in the Applications Information section.

Note 3: T
Note 4: Output is sinking 1.5mA with V
Note 5: These specifications apply for all supply voltages from a single

5V to ±15V, the entire input voltage range, and for both high and low
output states. The high state is I
the low state is I
defines a worst-case error band that includes effects due to common
mode signals, voltage gain and output load.

JMAX

= 150°C.

≤ 8mA, V

SINK

= 0V.

OUT

≥ 100µA, V

SINK

≤ 0.8V. Therefore, this specification

OUT

≥ (V+ – 1V) and

OUT

Note 6: Drift is calculated by dividing the offset voltage difference
measured at min and max temperatures by the temperature difference.

Note 7: Response time is measured with a 100mV step and 5mV
overdrive. The output load is a 500Ω resistor tied to 5V. Time
measurement is taken when the output crosses 1.4V.

Note 8: Do not short the STROBE pin to ground. It should be current
driven at 3mA to 5mA for the shortest strobe time. Currents as low as
500µA will strobe the LT1011A if speed is not important. External
leakage on the STROBE pin in excess of 0.2µA when the strobe is “off”
can cause offset voltage shifts.

Note 9: See graph “Input Offset Voltage vs Common Mode Voltage.”

3

LT1011/LT1011A

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Input Bias Current Input Offset Current Worst-Case Offset Error

45

IB FLOWS OUT

40

OF INPUTS

35

30

25

20

CURRENT (nA)

15

10

5

0

–50

–25

0

50 75 100 125

25

TEMPERATURE (°C)

150

1011 G01

0.9

0.8

0.7

0.6

0.5

0.4

CURRENT (nA)

0.3

0.2

0.1

0

–50

–25

0

50 75 100 125

25

TEMPERATURE (°C)

150

1011 G01

Input Characteristics* Common Mode Limits Transfer Function (Gain)

+

5

*EITHER INPUT.

0

REMAINING INPUT GROUNDED.
CURRENT FLOWS OUT OF INPUT.

–5

= ±15V

V

S

–10

–15

–20

–25

INPUT CURRENT (nA)

–30

–35

–40

–20

–15

–10

–5

INPUT VOLTAGE (V)

0 5 10 15

20

1011 G04

V

–0.5

–1.0

–1.5

–2.0

0.4

0.3

0.2

COMMON MODE VOLTAGE (V)

0.1

–

V

–50

–25

POSITIVE LIMIT

REFERRED TO SUPPLIES

NEGATIVE LIMIT

0

25

TEMPERATURE (°C)

50 75 100 125

150

1011 G05

100

LM311

(FOR COMPARISON)

10

LT1011M

LT1011C

LT1011AM

1

LT1011AC

EQUIVALENT OFFSET VOLTAGE (mV)

0.1
1k

50

TA = 25°C

40

30

20

OUTPUT VOLTAGE (V)

10

0
– 0.5

10k 100k 1M

SOURCE RESISTANCE (Ω)

–0.3

DIFFERENTIAL INPUT VOLTAGE (mV)

–0.1

COLLECTOR
OUTPUT

= 1k

R

L

EMITTER
OUTPUT
R

= 600Ω

L

0.1

0.3

1011 G03

0.5

1011 G06

Response Time—Collector Output Response Time—Collector Output

100mV

6

VS = ±15V

5
4

3
2

1
0

0

OVERDRIVE

20mV
5mV
2mV

INPUT = 100mV STEP

50 100

0

150

V

IN

200

TIME (ns)

15V 5V

500Ω

–

+

–15V

250 300 400

350

450

1011 G07

100mV

6
5

4
3

2
1

0

0

VS = ±15V

OVERDRIVE

INPUT = 100mV STEP

50 100

0

20mV

5mV
2mV

150

200

TIME (ns)

V

–

IN

+

250 300 400

4

15V 5V

500Ω

–15V

350

1011 G08

450

Collector Output Saturation
Voltage

1.0
PIN 1 GROUNDED

0.9

0.8

0.7

0.6

0.5

0.4

0.3

SATURATION VOLTAGE (V)

0.2

0.1

0

50

TA = 25°C

10 15

20

SINK CURRENT (mA)

25

TA = 125°C

TA = –55°C

30 35 45

40

50

1011 G09

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TYPICAL PERFOR A CE CHARACTERISTICS

LT1011/LT1011A

Response Time Using GND Pin
as Output

15

20mV 5mV 2mV

10

5
0

–5

–10

OUTPUT VOLTAGE (V)

–15

0

–50

–100

INPUT VOLTAGE (mV)

0

1

V

IN

TIME (µs)

+

V

V

OUT

2k

–

V

= ±15V

V

S

= 25°C

T

A

4

3

2

1011 G10

Response Time Using GND Pin
as Output

15

V

10

5
0

–5
–10
–15

20mV

0

–50

–100

INPUT VOLTAGE (mV) OUTPUT VOLTAGE (V)

0

IN

5mV

1

TIME (µs)

2

Supply Current vs Supply Voltage Supply Current vs Temperature

5

4

3

2

CURRENT (mA)

1

0

0

POSITIVE SUPPLY

COLLECTOR OUTPUT “LO”

POSITIVE AND NEGATIVE SUPPLY

COLLECTOR OUTPUT “HI”

10 15 20

5

SUPPLY VOLTAGE (V)

25 30

1011 G13

6

5

4

3

CURRENT (mA)

2

1

POSITIVE AND NEGATIVE SUPPLY

COLLECTOR OUTPUT “HI”

0

–50

–25 0

TEMPERATURE (˚C)

POSITIVE SUPPLY

COLLECTOR OUTPUT “LO”

50 100 125

25 75

2mV

Output Limiting Characteristics*

+

V

V

OUT

2k

–

V

140

120

100

80

60

TA = 25°C

POWER

DISSIPATION

SHORT-CIRCUIT

CURRENT

40

= ±15V

V

S

T

A

3

= 25°C

SHORT-CIRCUIT CURRENT (mA)

20

0

4

0

*MEASURED 3 MINUTES

AFTER SHORT

5

10 15

OUTPUT VOLTAGE (V)

1011 G11

1011 G12

0.7

0.6

POWER DISSIPATION (W)

0.5

0.4

0.3

0.2

0.1

0

Output Leakage Current

–7

10

VS = ±15V

–8

10

V

= 35V

OUT

= –15V

V

GND

TEMPERATURE (

°C)

1011 G15

1011 G14

–9

10

–10

LEAKAGE CURRENT (A)

10

–11

10

25 65 85 105

45 125

Output Saturation—
Ground Output

5

REFERRED TO V

4

3

TJ = –55°C

2

TO GROUND PIN VOLTAGE (V)

1

+

V

0

0

+

TJ = 25°C

TJ = 125°C

10

20

OUTPUT CURRENT (mA)

Output Saturation Voltage Response Time vs Input Step Size

+

2

+

8

LT1011

3

4

–

V

V

7

1

R

L

V

OUT

0.6

0.5

0.4

0.3

0.2

= 125°C

T

J

= 25°C

T

J

TJ = –55°C

I

SINK

= 8mA

SATURATION VOLTAGE (V)

0.1

0

30

40

50

0

24

13

6

5

8

7

INPUT OVERDRIVE (mV)

1011 G16

1011 G17

1000

VS = ±15V

= 500Ω TO 5V

R

L

OVERDRIVE = 5mV

800

–

3

INPUT

600

2

+

400

PROPAGATION DELAY (ns)

200

0

2

3

19

0

INPUT STEP (V)

1

4

5V

500Ω

7

RISING INPUT

FALLING INPUT

6

5

7

8

10

1011 G18

5

LT1011/LT1011A

UW

TYPICAL PERFOR A CE CHARACTERISTICS

Input Offset Voltage
vs Common Mode Voltage

2.5
TJ = 25°C

2.0

1.5

1.0

0.5

0

–0.5

–1.0
–1.5

INPUT OFFSET VOLTAGE (mV)

–2.0
–2.5

V– (OR GND WITH
SINGLE SUPPLY)

–

0.1 0.2 0.3 0.4 0.5 0.6 0.7

V

LIMIT = V

COMMON MODE VOLTAGE (V)

UPPER

COMMON MODE

+

– (1.5V)

1011 G19

+

V

Offset Pin Characteristics

0.8

0.6

(mV/µA)

OS

0.4

0.2

0

CHANGE IN V

–150mV

–100mV

–50mV

0

–50 –25

CHANGE IN VOS FOR CURRENT

INTO PINS 5 OR 6

VOLTAGE ON PINS 5 AND 6

WITH RESPECT TO V

25

0

50

TEMPERATURE (°C)

+

75 100 125

150

1011 G20

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APPLICATIONS INFORMATION

Preventing Oscillation Problems

Oscillation problems in comparators are nearly always
caused by stray capacitance between the output and
inputs or between the output and other sensitive pins on
the comparator. This is especially true with high gain
bandwidth comparators like the LT1011, which are
designed for fast switching with millivolt input signals.
The gain bandwidth product of the LT1011 is over 10GHz.
Oscillation problems tend to occur at frequencies around
5MHz, where the LT1011 has a gain of ≈2000. This
implies that attenuation of output signals must be at
least 2000:1 at 5MHz as measured at the inputs. If the
source impedance is 1kΩ, the effective stray capaci­tance between output and input must have a reactance
of more than (2000)(1kΩ) = 2MΩ, or less than 0.02pF.
The actual interlead capacitance between input and out­put pins on the LT1011 is less than 0.002pF when cut to
printed circuit mount length. Additional stray capaci­tance due to printed circuit traces must be minimized by
routing the output trace directly away from input lines
and, if possible, running ground traces next to input
traces to provide shielding. Additional steps to ensure
oscillation-free operation are:

1. Bypass the STROBE/BALANCE pins with a 0.01µF

capacitor connected from Pin 5 to Pin 6. This elimi­nates stray capacitive feedback from the output to the

BALANCE pins, which are nearly as sensitive as the
inputs.

2. Bypass the negative supply (Pin 4) with a 0.1µF
ceramic capacitor close to the comparator. 0.1µF can
also be used for the positive supply (Pin 8) if the pull­up load is tied to a separate supply. When the pull-up
load is tied directly to Pin 8, use a 2µF solid tantalum
bypass capacitor.

3. Bypass any slow moving or DC input with a capacitor
(≥0.01µF) close to the comparator to reduce high
frequency source impedance.

4. Keep resistive source impedance as low as possible. If
a resistor is added in series with one input to balance
source impedances for DC accuracy, bypass it with a
capacitor. The low input bias current of the LT1011
usually eliminates any need for source resistance bal­ancing. A 5kΩ imbalance, for instance, will create only

0.25mV DC offset.

5. Use hysteresis. This consists of shifting the input
offset voltage of the comparator when the output
changes state. Hysteresis forces the comparator to
move quickly through its linear region, eliminating
oscillations by “overdriving” the comparator under all
input conditions. Hysteresis may be either AC or DC.
AC techniques do not shift the apparent offset voltage

6

LT1011/LT1011A

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APPLICATIONS INFORMATION

of the comparator, but require a
slew rate to be effective. DC hysteresis works for all
input slew rates, but creates a shift in offset voltage
dependent on the previous condition of the input sig­nal. The circuit shown in Figure 1 is an excellent
compromise between AC and DC hysteresis.

15V

+

2µF

TANT

–15V

–

3

+

2

LT1011INPUTS

8

4

C1

0.003µF

6

0.1µF

Figure 1. Comparator with Hysteresis

This circuit is especially useful for general purpose
comparator applications because it does not force any
signals directly back onto the input signal source.
Instead, it takes advantage of the unique properties of
the BALANCE pins to provide extremely fast, clean
output switching even with low frequency input sig­nals in the millivolt range. The 0.003µF capacitor from
Pin 6 to Pin 8 generates AC hysteresis because the
voltage on the BALANCE pins shifts slightly, depend­ing on the state of the output. Both pins move about
4mV. If one pin (6) is bypassed, AC hysteresis is
created. It is only a few millivolts referred to the in­puts, but is sufficient to switch the output at nearly the
maximum speed of which the comparator is capable.
To prevent problems from low values of input slew
rate, a slight amount of DC hysteresis is also used. The
sensitivity of the BALANCE pins to current is about

0.5mV input referred offset for each microampere of
BALANCE pin current. The 15M resistor tied from
OUTPUT to Pin 5 generates 0.5mV DC hysteresis. The
combination of AC and DC hysteresis creates clean
oscillation-free switching with very small input errors.
Figure 2 plots input referred error versus switching
frequency for the circuit as shown.

Note that at low frequencies, the error is simply the DC
hysteresis, while at high frequencies, an additional

5

7

1

minimum

R

L

R2

15M

input signal

OUTPUT

1011 F01

8

C8 TO C6 = 0.003µF

7
6
5
4

3
2
1
0

INPUT OFFSET VOLTAGE (mV)

–1
–2

1

OUTPUT “LO” TO “HI”

OUTPUT “HI” TO “LO”

(50kHz) (5kHz)

10 100 1000

TIME/FREQUENCY (µs)

1011 F02

Figure 2. Input Offset Voltage vs Time to Last Transition

error is created by the AC hysteresis. The high
frequency error can be reduced by reducing CH, but
lower values may not provide clean switching with
very low slew rate input signals.

Input Protection

The inputs to the LT1011 are particularly suited to general
purpose comparator applications because large differen­tial and/or common mode voltages can be tolerated with­out damage to the comparator. Either or both inputs can
be raised 40V above the negative supply,

the positive supply voltage

. Internal forward biased diodes

independent of

will conduct when the inputs are taken below the negative
supply. In this condition, input current must be limited to
1mA. If very large (fault) input voltages must be accom­modated, series resistors and clamp diodes should be
used (see Figure 3).

+

V

R3*

D2

D1

R1**

INPUTS

D1 TO D4: 1N4148

*

MAY BE ELIMINATED FOR I

**

SELECT ACCORDING TO ALLOWABLE
FAULT CURRENT AND POWER DISSIPATION

R2**

D3

Figure 3. Limiting Fault Input Currents

D4

FAULT

300Ω

R4*

300Ω

≤ 1mA

3

2

–

+

LT1011

V

8

4

–

1011 F03

7

LT1011/LT1011A

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APPLICATIONS INFORMATION

The input resistors should limit fault current to a reason­able value (0.1mA to 20mA). Power dissipation in the
resistors must be considered for continuous faults, espe­cially when the LT1011 supplies are off. One final caution:
lightly loaded supplies may be forced to higher voltages by
large fault currents flowing through D1-D4.

R3 and R4 limit input current to the LT1011 to less than
1mA when the input signals are held below V–. They may
be eliminated if R1 and R2 are large enough to limit fault
current to less than 1mA.

Input Slew Rate Limitations

The response time of a comparator is typically measured
with a 100mV step and a 5mV to 10mV overdrive. Unfor­tunately, this does not simulate many real world situations
where the step size is typically much larger and overdrive
can be significantly less. In the case of the LT1011, step
size is important because the slew rate of internal nodes
will limit response time for input step sizes larger than 1V.
At 5V step size, for instance, response time increases from
150ns to 360ns. See the curve “Response Time vs Input
Step Size for more detail.

If response time is critical and large input signals are
expected, clamp diodes across the inputs are recom­mended. The slew rate limitation can also affect perfor­mance when differential input voltage is low, but both
inputs must slew quickly. Maximum suggested common
mode slew rate is 10V/µs.

Strobing

The LT1011 can be strobed by pulling current out of the
STROBE pin. The output transistor is forced to an “off”
state, giving a “hi” output at the collector (Pin 7). Currents
as low as 250µA will cause strobing, but at low strobe
currents, strobe delay will be 200ns to 300ns. If strobe
current is increased to 3mA, strobe delay drops to about
60ns. The voltage at the STROBE pin is about 150mV below
V+ at zero strobe current and about 2V below V+ for 3mA
strobe current.

current driven

Note that there is no bypass capacitor between Pins 5 and

6. This maximizes strobe speed, but leaves the compara­tor more sensitive to oscillation problems for slow, low

Do not ground the STROBE pin. It must be

. Figure 4 shows a typical strobe circuit.

15V 5V

8

–

LT1011

+

6

4

–15

3k

Figure 4. Typical Strobe Circuit

7

1

TTL OR
CMOS DRIVE
(5V SUPPLY)

R

L

OUTPUT

1011 F04

level inputs. A 1pF capacitor between the output and Pin 5
will greatly reduce oscillation problems without reducing
strobe speed.

DC hysteresis can also be added by placing a resistor from
output to Pin 5. See step 5 under “Preventing Oscillation
Problems.”

The pin (6) used for strobing is also one of the offset adjust
pins. Current flow into or out of Pin 6 must be kept very low
(< 0.2µA) when not strobing to prevent input offset voltage
shifts.

Output Transistor

The LT1011 output transistor is truly floating in the sense
that no current flows into or out of either the collector or
emitter when the transistor is in the “off” state. The
equivalent circuit is shown in Figure 5.

+

V

I

1

0.5mA

D2

D1

Q1

R1
170Ω

–

V

R2
470Ω

Figure 5. Output Transistor Circuitry

COLLECTOR
(OUTPUT)

OUTPUT

Q2

TRANSISTOR

EMITTER
(GND PIN)

1011 F05

8

LT1011/LT1011A

U

WUU

APPLICATIONS INFORMATION

In the “off” state, I1 is switched off and both Q1 and Q2 turn
off. The collector of Q2 can be now held at any voltage
above V– without conducting current, including voltages
above the positive supply level. Maximum voltage above
V– is 50V for the LT1011M and 40V for the LT1011C/I. The
emitter can be held at any voltage between V+ and V– as
long as it is negative with respect to the collector.

In the “on” state, I1 is connected, turning on Q1 and Q2.
Diodes D1 and D2 prevent deep saturation of Q2 to
improve speed and also limit the drive current of Q1. The
R1/R2 divider sets the saturation voltage of Q2 and pro­vides turn-off drive. Either the collector or emitter pin can
be held at a voltage between V+ and V–. This allows the
remaining pin to drive the load. In typical applications, the
emitter is connected to V– or ground and the collector
drives a load tied to V+ or a separate positive supply.

When the emitter is used as the output, the collector is
typically tied to V+ and the load is connected to ground or
V–. Note that the emitter output is phase reversed with
respect to the collector output so that the “+” and “–” input

designations must be reversed. When the collector is tied
to V+, the voltage at the emitter in the “on” state is about
2V below V+ (see curves).

Input Signal Range

The common mode input voltage range of the LT1011 is
about 300mV above the negative supply and 1.5V below
the positive supply, independent of the actual supply
voltages (see curve in the Typical Performance Character­istics). This is the voltage range over which the output will
respond correctly when the common mode voltage is
applied to one input and a higher or lower signal is applied
to the remaining input.

If one input is inside the common
mode range and one is outside, the output will be correct.
If the inputs are outside the common mode range in
opposite directions, the output will still be correct. If both
inputs are outside the common mode range in the same
direction, the output will not respond to the differential
input; it will remain unconditionally high (collector output)
except at –40°C where it is undefined

.

U

TYPICAL APPLICATIONS

Offset Balancing Driving Load Referenced

R2
3k

R1

20k

5

2

3

+

LT1011

–

6

+

V

8

7

1011 TA03

to Positive Supply

+

V

3

2

++

V

CAN BE GREATER OR LESS THAN V

–

LT1011

+

8

4

V

GROUND

OR

7

1

V

++

V

1011 TA05

R

LOAD

Driving Load Referenced

to Negative Supply

+

V

2

3

+

*INPUT POLARITY IS REVERSED
WHEN USING PIN 1 AS OUTPUT

8

–

LT1011INPUTS*

+

4

V

7

1

R

LOAD

V

1011 TA06

9

LT1011/LT1011A

U

TYPICAL APPLICATIONS

Strobing

2

+

LT1011

3

–

NOTE: DO NOT GROUND STROBE PIN

7

6

TTL
STROBE

1k

1011 TA04

Driving Ground Referred Load

*

INPUT POLARITY IS REVERSED
WHEN USING PIN 1 AS OUTPUT

++

**

V

MAY BE ANY VOLTAGE ABOVE V–.

PIN 1 SWINGS TO WITHIN ≈2V OF V

Using Clamp Diodes to Improve Frequency Response*

CURRENT MODE

INPUT

(DAC, ETC)

D1

VOLTAGE

INPUT

*SEE CURVE, “RESPONSE TIME vs INPUT STEP SIZE”

2

+

D2

LT1011

3

–

R1

GROUND OR
LOW IMPEDANCE
REFERENCE

Window Detector

7

7

1011 TA08

+

V

R

L

OUTPUT HIGH
INSIDE “WINDOW”
AND LOW ABOVE
HIGH LIMIT OR
BELOW LOW LIMIT

1

7

L1

1011 TA07

++**

V

HIGH

LIMIT

V

LOW

++

LIMIT

2

+

LT1011

3

–

1

IN

2

+

LT1011

3

–

1

+

V

2

3

8

–

LT1011INPUTS*

+

4

–

V

Crystal Oscillator

5V

50k

1k

7

4

OUT

10k

7

OUTPUT

1011 TA09

10k

2

100pF85kHz

3

+

LT1011

–

8

1

60Hz

INPUT

2V

25V

Noise Immune 60Hz Line Sync**

R2

RMS

TO

RMS

R1*
330k

0.22µF

5V

75k

5V

3

–

C1

R6
27k

LT1011

2

+

4

R5

***INCREASE R1 FOR LARGER INPUT VOLTAGES

10k

LT1011 SELF OSCILLATES AT ≈60Hz CAUSING
IT TO “LOCK” ONTO INCOMING LINE SIGNAL

10k

1011 TA10

High Efficiency** Motor Speed Controller

INPUT

15V

Q1
2N6667

MOTOR-TACH

GLOBE 397A120-2

MOTOR

TACH

R5

100k

C2*

0.1µF

R4
1k

**

C3

0.1µF

*

R3/C2 DETERMINES OSCILLATION
FREQUENCY OF CONTROLLER
Q1 OPERATES IN SWITCH MODE

R6
2k

R7
1k

1011 TA12

5V

50µF

+

C1

R1
1k

R2
470Ω

7

1

1N4002

15V

8

LT1011

– 5V TO

–15V

+

–

4

R3*

10k

2

3

0V TO 10V

R3
1k

8

7

1

R4
27k

1011 TA11

OUTPUT
60Hz

10

U

TYPICAL APPLICATIONS

LT1011/LT1011A

Combining Offset Adjust and Strobe

+

V

10k

20k

5

–

LT1011

+

6

TTL OR CMOS
5V

1k

1011 TA13

Direct Strobe Drive When CMOS* Logic

Uses Same V+ Supply as LT1011

+

V

8

–

LT1011

+

6

1011 TA14

*NOT APPLICABLE FOR TTL LOGIC

Combining Offset Adjustment and Hystersis

+

5k

2R

**

H

20k

6

–

LT1011

R

5

7

V

*

H

HYSTERESIS IS ≈0.45mV/µA OF

*

CURRENT CHANGE IN R
THIS RESISTOR CAUSES HYSTERESIS

**

R

L

TO BE CENTERED AROUND V

1011 TA15

+

1

Low Drift R/C Oscillator

**

C1

0.015µF

15V

2

+

LT1011

3

–

1

15V

8

1k

7

4

H

OS

†

74HC04

×6

BUFFERED
OUTPUT

INPUT

Positive Peak Detector

15V

2k

3

2

*

**

8

1M**

7

1

10k

+

C1*
2µF

INPUT

100pF

1M**

LT1011

4

–15V

MYLAR
SELECT FOR REQUIRED RESET TIME CONSTANT

10k*

10k*

15V

*

1% METAL FILM

**

TRW TYPE MTR-5/120ppm/°C, 25k ≤ R

2

+

LT1008

3

–

8

1011 TA17

6

OUTPUT

C1: 0.015µF = POLYSTYRENE, –120ppm/°C,
±30ppm WESCO TYPE 32-P
NOTE: COMPARATOR CONTRIBUTES ≤10ppm/°C DRIFT
FOR FREQUENCIES BELOW 10kHz

†

LOW DRIFT AND ACCURATE FREQUENCY ARE
OBTAINED BECAUSE THIS CONFIGURATION
REJECTS EFFECTS DUE TO INPUT OFFSET
VOLTAGE AND BIAS CURRENT OF THE
COMPARATOR

≤ 200k

S

10k*

1011 TA16

Negative Peak Detector

15V

2

10k

–

6

LT1008

3

+

8

1011 TA18

OUTPUT

3

2k

2

–

LT1011

+

8

7

1

+

4

C1*
2µF

100pF

–15V

MYLAR

*

SELECT FOR REQUIRED RESET TIME CONSTANT

**

11

LT1011/LT1011A

U

TYPICAL APPLICATIONS

15V

ZERO

R1

TRIM

1k
R2

18k

1

3

LF398

5V

R3

3.9k

R4

5.6k

8

–15V

2

5

6

7

4

D1

C1*

0.1µF

C4

0.01µF

D2

C2**
15pF

4-Digit (10,000 Count) A/D Converter

INPUT

0V TO 10V

R5

4.7k

R7
22Ω

2

3

C3

0.1µF

15V

+

LT1011

–

–15V

8

4

6

1

15V

C5

0.01µF
7

R11

6.8K

5V

R6

4.7K

CLOCK

1MHz

OUTPUT = 1 COUNT
PER mV, f = 1MHz

TTL OR CMOS

(OPERATING

ON 5V)

START

T
T

15V

≥ [C

H

≥ 10 • C

L

+

R8
3k

≥12ms

(pF)][1µs/pF]

MAX

MAX

D1

†

10µF

D3

D4

LM329

• (1µs/pF)

100k

R1
5k

86.6k

C**

R10

R9

3.65k

1k

FULL-SCALE

TRIM

2N3904

R12

6.8k

C6

50pF

Capacitance to Pulse Width Converter

GAIN ADJ

R2

R3

5V

8

2

+

LT1011

3

–

4

6

1

0.01µF

7

R5

4.7k

*

**

OUTPUT
1µs/pF

ALL DIODES: 1N4148
POLYSTYRENE
NPO

1011 TA19

*PW = (R2 + R3)(C)

LT1011 IS ≈6pF. THIS IS AN OFFSET TERM.

**TYPICAL 2 SECTIONS OF 365pF VARIABLE

CAPACITOR WHEN USED AS SHAFT ANGLE
INDICATION

†

THESE COMPONENTS MAY BE ELIMINATED IF

NEGATIVE SUPPLY IS AVAILABLE (–1V TO –15V)

R1 + R4

, INPUT CAPACITANCE OF

()

R1

12

†

D3

†

D2

10µF

+

1011 TA20

†

U

TYPICAL APPLICATIONS

V

IN

4.7k
–15V 15V

0.1µF

100k

10k

2

–

3

+

+

–

–15V 15V

LT1011

LT1011

LT1011/LT1011A

Fast Settling* Filter

100pF

1M

15V

1M

4.7k

OFM-1A**

4

8

7

1

5

6

15V

6

4

15V

5

1

7

5k
THRESHOLD

5k

8

1.5k

1011 TA21

2

3

1µF

LT1008C

4

7

6

8

1

100pF–15V

OUTPUT

AC INPUT

0.033µF

100Ω

ZERO

CROSS

TRIM

100kHz Precision Rectifier

5V 5V

2

5k

3

+

–

–5V

8

LT1011

1

4

5V

1k

7

74C04

–5V

820Ω

5V

820Ω

74C04

–5V

5V

–5V

12k

12k

HP5082-2800
×4

RECTIFIED
OUTPUT

1k

1011 TA23

13

LT1011/LT1011A

WW

SCHE ATIC DIAGRA

OFFSET

5

OFFSET/STROBE

6

+

V

8

INPUT

(+)

2

INPUT

(–)

3

Q31

Q29

R27
3k

Q27

R8

Q6

R5
160Ω

Q30

D4

D6

Q25

R25

1.6k

D5

Q26

D7

R4

300Ω

Q28

R26

1.6k

R1

1.3k

Q5

Q1

D1 D2

Q2

R2

1.3k
R3

300Ω

R6

3.2kR73.2k

Q3

Q23

R19
500Ω

800Ω

Q10

R23

4k

Q7

Q8

Q9 Q19

Q4

R16

R20

940Ω

R21
960Ω

800Ω

R15
700Ω

R14

4.8k

Q21

R18
275Ω

Q22

D3

R17

200Ω

Q24

Q18

Q17

R9
800Ω

Q11

R22

200Ω

Q20

Q16

Q14

R24
400Ω

Q13

R10
4k

Q12

R11
170Ω

R12
470Ω

GND

OUTPUT

Q15

R13
4Ω

1

7

PACKAGE DESCRIPTION

0.335 – 0.370

(8.509 – 9.398)

DIA

0.305 – 0.335

0.040

(1.016)

MAX

SEATING

PLANE

0.010 – 0.045*
(0.254 – 1.143)

*

LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE
AND 0.045" BELOW THE REFERENCE PLANE

**

FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS

(7.747 – 8.509)

0.016 – 0.021**
(0.406 – 0.533)

4

V

U

Dimensions in inches (millimeters) unless otherwise noted.

H Package

8-Lead TO-5 Metal Can (.230 Inch PCD)

(Reference LTC DWG # 05-08-1321)

OBSOLETE PACKAGE

45°TYP

0.050

(1.270)

MAX

GAUGE
PLANE

0.016 – 0.024

(0.406 – 0.610)

0.165 – 0.185

(4.191 – 4.699)

0.500 – 0.750

(12.700 – 19.050)

REFERENCE
PLANE

0.028 – 0.034

(0.711 – 0.864)

0.110 – 0.160

(2.794 – 4.064)

INSULATING

STANDOFF

1011 SD

–

0.027 – 0.045

(0.686 – 1.143)

PIN 1

0.230

(5.842)

TYP

H8 (TO-5) 0.230 PCD 1197

14

PACKAGE DESCRIPTION

CORNER LEADS OPTION

0.045 – 0.068

(1.143 – 1.727)

FULL LEAD

OPTION

0.300 BSC

(0.762 BSC)

LT1011/LT1011A

U

Dimensions in inches (millimeters) unless otherwise noted.

J8 Package

8-Lead CERDIP (Narrow .300 Inch, Hermetic)

(Reference LTC DWG # 05-08-1110)

(4 PLCS)

0.023 – 0.045

(0.584 – 1.143)

HALF LEAD

OPTION

0.005

(0.127)

MIN

0.025

(0.635)

RAD TYP

0.405

(10.287)

MAX

87

12

65

3

4

0.220 – 0.310

(5.588 – 7.874)

0.015 – 0.060

(0.381 – 1.524)

0.200

(5.080)

MAX

0.008 – 0.018

(0.203 – 0.457)

NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS

0° – 15°

OBSOLETE PACKAGE

N8 Package

8-Lead PDIP (Narrow .300 Inch)

(Reference LTC DWG # 05-08-1510)

0.300 – 0.325

(7.620 – 8.255)

0.065

(1.651)

0.009 – 0.015

(0.229 – 0.381)

+0.035

0.325

–0.015
+0.889

8.255

()

–0.381

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)

TYP

0.045 – 0.065

(1.143 – 1.651)

0.100
(2.54)

BSC

0.045 – 0.065

(1.143 – 1.651)

0.014 – 0.026

(0.360 – 0.660)

0.018 ± 0.003

(0.457 ± 0.076)

0.130 ± 0.005

(3.302 ± 0.127)

0.125

(3.175)

MIN

(0.508)

0.020

MIN

0.255 ± 0.015*
(6.477 ± 0.381)

0.100

(2.54)

BSC

876

1234

0.125

3.175
MIN

J8 1298

0.400*

(10.160)

MAX

5

N8 1098

8-Lead Plastic Small Outline (Narrow .150 Inch)

0.010 – 0.020

(0.254 – 0.508)

0.008 – 0.010

(0.203 – 0.254)

*

DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**

DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

× 45°

0.016 – 0.050

(0.406 – 1.270)

0°– 8° TYP

0.053 – 0.069

(1.346 – 1.752)

0.014 – 0.019

(0.355 – 0.483)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen­tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

S8 Package

(Reference LTC DWG # 05-08-1610)

0.004 – 0.010

(0.101 – 0.254)

0.050

(1.270)

TYP

BSC

0.228 – 0.244

(5.791 – 6.197)

0.189 – 0.197*
(4.801 – 5.004)

8

1

7

2

6

3

5

0.150 – 0.157**
(3.810 – 3.988)

4

SO8 1298

15

LT1011/LT1011A

TYPICAL APPLICATION

15V

R2

5k

INPUT

0V TO 10V

FULL-SCALE

TRIM

R16

50k

10Hz TRIM

ALL DIODES 1N4148
TRANSISTORS 2N3904

*

USED ONLY TO GUARANTEE
START-UP

†

MAY BE INCREASED FOR BETTER
10Hz TRIM RESOLUTION

15V

–15V

R3

8.06k

R17

22M

†

U

10Hz to 100kHz Voltage to Frequency Converter

R4
1M

R1

4.7k

C2

0.68µF

R15
22k

0.002µF

POLYSTYRENE

3

–

LT1011

2

+

6

0.002µF

10pF

R14
1k

Q1*

15V

C1

15V

R5

R6

2k

2k

8

7

1

4

–15V

15V

+

2µF

–15V

R13
620k

1.5µs

R11

20k

R12

100k

4.4V

–15V

–15V

15V

Q2

R8

4.7k

R9
5k

R7

4.7k

LT1009

2.5V

15V

LINEARITY ≈0.01%

TTL OUTPUT
10HZ TO 100kHz

R10

2.7k

1011 TA22

1.5µs

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1016 UltraFastTM Precision Comparator Industry Standard 10ns Comparator
LT1116 12ns Single Supply Ground-Sensing Comparator Single Supply Version of the LT1016
LT1394 UltraFast Single Supply Comparator 7ns, 6mA Single Supply Comparator
LT1671 60ns, Low Power Comparator 450µA Single Supply Comparator
UltraFast is a trademark of Linear Technology Corporation.

1011fb LT/CP 0901 1.5K REV B • PRINTED IN USA

16

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

 LINEAR TECHNOLOGY CORPORATION 1991