
Linear Integrated Systems
FEATURES
HIGH TRANSCONDUCTANCE
THROUGH 100MHz gfs>4000µmho
LOW INPUT CAPACITANCE C
SECOND SOURCE ALTERNATIVE TO INTERSIL, NATIONAL, SILICONIX
DIRECT PLUG IN REPLACEMENT
ABSOLUTE MAXIMUM RATINGS NOTE 1
@ 25°C (unless otherwise noted)
Maximum Temperatures
Storage Temperature -65° to +150°C
Operating Junction Temperature +150°C
Maximum Voltage and Current for Each Transistor NOTE 1
-V
-V
-I
GSS
DSO
G(f)
Gate Voltage to Drain or Source 35V
Drain to Source Voltage 30V
Gate Forward Current 50mA
Maximum Power Dissipation
Device Dissipation @ Free Air - Total 500mW @ +125°C
=5pf max.
ISS
LS5911 LS5912 LS5912C
WIDEBAND HIGH GAIN
MONOLITHIC DUAL
D1
G1 S1
S2 G2
24 X 27 MILS
N-CHANNEL JFET
G1 S2
35
2 6
D1 D2
1 7
S1 G2
D2
BOTTOM VIEW
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL CHARACTERISTICS LS5911 LS5912 LS5912C UNITS CONDITIONS
∆|V
GS1-VGS2|
/∆T Drift vs. Temperature 20 40 40 MAX. µV/°CVDG= 10V ID= 5mA
TA= -55°C to +125°C
|V
GS1-VGS2
| Offset Voltage 10 15 40 MAX. mV VDG= 10V ID= 5mA
SYMBOL CHARACTERISTICS MIN. MAX. UNITS CONDITIONS
BV
g
g
|g
GSS
fs
fs
| Transconductance Ratio 0.95 1 % f=1kHz NOTE 2
fs1/gfs2
Gate-Source Breakdown Voltage 25 -- V IG= -1µAVDS= 0
TRANSCONDUCTANCE
Common-Source Forward 4000 10,000 µmho VDG= 10V ID= 5mA f= 1kHz
Common-Source Forward 4000 10,000 µmho f= 100MHz
DRAIN CURRENT
I
DSS
|I
DSS1/IDSS2
Saturation Drain Current 7 40 mA VDS= 10V VGS= 0 V
| Saturation Drain Current Ratio 0.95 1 % NOTE 2
GATE VOLTAGE
V
(off) or VPPinchoff Voltage 1 5 V VDS= 10V ID= 1nA
GS
V
GS
Gate-Source Voltage 0.3 4 V VDG= 10V ID= 5mA
GATE CURRENT
-I
-I
|I
-I
-I
G
G
| Differential Gate Current -- 20 nA
G1-IG2
GSS
GSS
Operating -- 50 pA VDG= 10V ID= 5mA
High Temperature -- 50 nA VDG= 10V ID= 5mA TA= +125°C
At Full Conduction -- 50 pA VDG= 15V VDS= 0
High Temperature -- 200 nA TA= +125°C
Linear Integrated Systems
4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261

SYMBOL CHARACTERISTICS MIN. TYP. MAX. UNITS CONDITIONS
S1 1
2
3
45
6
7
8
D1
SS
G1
S2
G2
SS
D2
P-DIP
A
OUTPUT CONDUCTANCE
Common-Source Output Conductance -- -- 100 µmho VDG= 10V ID= 5mA f= 1kHz
G
OS
G
OS
Common-Source Output Conductance -- -- 150 µmho f= 100MHz
NOISE
NF Figure -- -- 1 dB V
e
n
Voltage -- -- 20 nV/√Hz VDG= 10V ID= 5mA f= 10KHz
= 10V ID= 5mA RG= 100kΩ
DG
f= 10kHz
CAPACITANCE
C
C
ISS
RSS
Input -- -- 5 pF VDG= 10V ID= 5mA f= 1MHz
Reverse Transfer -- -- 1.2 pF
0.195
0.175
6 LEADS
0.019
0.016
45°
0.046
0.036
TO-71
Six Lead
DIA.
0.030
MAX.
DIA.
0.100
TO-78
0.230
DIA.
0.209
0.150
0.115
0.500 MIN.
0.050
3
2
4
5
1
8
6
7
0.048
0.028
S1
D1
SS
G1
0.016
0.019
DIM. A
0.016
0.021
DIM. B
0.029
0.045
45°
1
2
3
45
A
G2
8
SS
7
6
D2
S2
0.305
0.335
0.200
3
2
1
8
7
0.028
0.034
SOIC
0.335
0.370
4
5
6
MAX.
0.040
MIN. 0.500
SEATING
PLANE
0.100
0.100
0.188
0.197
0.165
0.185
0.150
0.158
(4.78)
(5.00)
0.320
0.290
0.405
(10.29)
MAX
(3.81)
(4.01)
S1 1
2
D1
G1
3
B
45
N/C
(5.79)
0.228
(6.20)
0.244
(8.13)
(7.37)
S1 1
D1
G1
N/C
8
N/C
G2
7
D2
6
S2
N/C
8
2
B
3
45
G2
7
6
D2
S2
NOTES:
1. These ratings are limiting values above which the serviceability of any semiconductor may be impaired.
2. Assumes smaller value in numerator.
Linear Integrated Systems
4042 Clipper Court, Fremont, CA 94538 • TEL: (510) 490-9160 • FAX: (510) 353-0261