LP2987/LP2988
Micropower, 200 mA Ultra Low-Dropout Voltage
Regulator with Programmable Power-On Reset Delay;
Low Noise Version Available (LP2988)
LP2987/LP2988 Micropower, 200 mA Ultra Low-Dropout Voltage Regulator with Programmable
Power-On Reset Delay
General Description
The LP2987/8 are fixed-output 200 mA precision LDO voltage regulators with power-ON reset delay which can be
implemented using a single external capacitor.
The LP2988 is specifically designed for noise-critical applications. Asingleexternal capacitor connected to the Bypass
pin reduces regulator output noise.
Using an optimized VIP
cess, these regulators deliver superior performance:
Dropout Voltage: 180 mV
load (typical).
Ground Pin Current: 1mA
10 mA load (typical).
Sleep Mode: The LP2987/8 draws less than 2 µA quiescent
current when shutdown pin is held low.
Error Flag/Reset: The error flag goes low when the output
drops approximately 5% below nominal. This pin also provides a power-ON reset signal if a capacitor is connected to
the DELAY pin.
Precision Output: Standard product versions of the LP2987
and LP2988 are available with output voltages of 5.0V, 3.8V,
3.3V, 3.2V, 3.0V, or 2.8V, with guaranteed accuracy of 0.5%
(“A” grade) and 1% (standard grade) at room temperature.
™
(Vertically Integrated PNP) pro-
@
200 mAload, and1 mV@1mA
@
200 mA load, and 200 µA
Block Diagrams
Features
n Ultra low dropout voltage
n Power-ON reset delay requires only one component
n Bypass pin for reduced output noise (LP2988)
n Guaranteed continuous output current 200 mA
n Guaranteed peak output current
n SO-8 and mini SO-8 surface mount packages
<
n
2 µA quiescent current when shutdown
n Low ground pin current at all loads
n 0.5% output voltage accuracy (“A” grade)
n Wide supply voltage range (16V max)
@
n Overtemperature/overcurrent protection
n −40˚C to +125˚C junction temperature range
>
250 mA
Applications
n Cellular Phone
n Palmtop/Laptop Computer
n Camcorder, Personal Stereo, Camera
10001701
10001702
VIP™is a trademark of National Semiconductor Corporation.
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature Range−65˚C to +150˚C
Operating Junction
Temperature Range−40˚C to +125˚C
Lead Temperature
(Soldering, 5 seconds)260˚C
Input Supply Voltage
(Operating)2.1V to +16V
Shutdown Pin−0.3V to +16V
Sense Pin−0.3V to +6V
Output Voltage
(Survival) (Note 4)−0.3V to +16V
I
(Survival)Short Circuit Protected
OUT
Input-Output Voltage
(Survival) (Note 5)−0.3V to +16V
ESD Rating (Note 2)2 kV
Power Dissipation (Note 3)Internally Limited
Input Supply Voltage
(Survival)−0.3V to +16V
Electrical Characteristics
Limits in standard typeface are for TJ= 25˚C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: V
SymbolParameterConditionsTypical
∆V
O
Output Voltage
Tolerance
Output Voltage Line
Regulation
V
IN–VO
Dropout Voltage
(Note 7)
I
GND
I
(PK)Peak Output CurrentV
O
I
(MAX)Short Circuit CurrentRL= 0 (Steady State)
O
e
n
Ground Pin CurrentIL= 100 µA
LP2987 Output Noise
Voltage (RMS)
LP2988 Output Noise
Voltage (RMS)
Ripple Rejectionf = 1 kHz, C
(NOM) + 1V, IL= 1 mA, C
IN=VO
0.1 mA<I
VO(NOM) + 1V ≤ VIN≤
16V
IL= 100 µA
I
=75mA
L
I
= 200 mA
L
I
=75mA
L
I
= 200 mA
L
V
S/D
OUT
(Note 10)
BW = 300 Hz to
50 kHz, V
C
OUT
BW = 300 Hz to 50 kHz,
V
OUT
C
OUT
C
BYPASS
C
BYP
= 4.7 µF, CIN= 2.2 µF, V
OUT
LM2987/8AI-X.X
(Note 6)
S/D
= 2V.
LM2987/8I-X.X
(Note 6)
MinMaxMinMax
−0.50.5−1.01.0
<
200 mA−0.80.8−1.61.6
L
−1.81.8−2.82.8
0.0140.014
0.007
1
90
180
100
500
1
<
0.3V0.051.51.5µA
0.0320.032
2.02.0
3.53.5
120120
170170
230230
350350
120120
150150
800800
14001400
2.12.1
3.73.7
≥ VO(NOM) − 5%400250250
400
OUT
= 3.3V
100
=10µF
= 3.3V
=10µF
20
= .01 µF
=10µF
OUT
= 0 (LP2988)
65dB
%V
µV(RMS)
Units
NOM
%/V
mV
µA
mA
mA
www.national.com9
Page 10
Electrical Characteristics (Continued)
Limits in standard typeface are for TJ= 25˚C, and limits in boldface type apply over the full operating temperature range. Unless otherwise specified: V
SymbolParameterConditionsTypical
LP2987/LP2988
Output Voltage
Temperature Coefficient
(NOM) + 1V, IL= 1 mA, C
IN=VO
(Note 9)
= 4.7 µF, CIN= 2.2 µF, V
OUT
LM2987/8AI-X.X
20ppm/˚C
= 2V.
S/D
LM2987/8I-X.X
(Note 6)
(Note 6)
MinMaxMinMax
Units
I
DELAY
Delay Pin Current
Source
2.2
1.62.81.62.8
1.43.01.43.0
SHUTDOWN INPUT
V
S/D
I
S/D
S/D Input Voltage
(Note 8)
S/D Input CurrentV
VH= O/P ON1.41.61.6
= O/P OFF0.550.180.18
V
L
=00−1−1
S/D
=5V51515
V
S/D
ERROR COMPARATOR
I
OH
V
OL
V
THR
(MAX)
V
THR
(MIN)
Output “HIGH” LeakageVOH= 16V
Output “LOW” VoltageVIN=VO(NOM) − 0.5V,
(COMP) = 300 µA
I
O
Upper Threshold Voltage
Lower Threshold Voltage
0.01
150
−4.6
−6.6
11
22
220220
350350
−5.5−3.5−5.5−3.5
−7.7−2.5−7.7−2.5
−8.9−4.9−8.9−4.9
−13.0−3.3−13.0−3.3
%V
HYSTHysteresis2.0
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the
device outside of its rated operating conditions.
Note 2: The ESD rating of the Bypass pin is 500V (LP2988 only.)
Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, T
and the ambient temperature, T
. The maximum allowable power dissipation at any ambient temperature is calculated using:
A
(MAX), the junction-to-ambient thermal resistance, θ
J
µA
V
µA
µA
mV
OUT
J−A
,
The value of θ
dependent on PCB trace area, trace material, and the number of layers and thermal vias. For improved thermal resistance and power dissipation for the LLP
package, refer toApplicationNoteAN-1187.Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulatorwillgo into
thermal shutdown.
Note 4: If used in a dual-supply system where the regulator load is returned to a negative supply, the LM2987/8 output must be diode-clamped to ground.
Note 5: The output PNP structure contains a diode between the V
on this diode and may induce a latch-up mode which can damage the part (see Application Hints).
Note 6: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 7: Dropout voltage is defined as the input to output differential at which the output voltage drops 100 mV below the value measured with a 1V differential.
Note 8: To prevent mis-operation, the Shutdown input must be driven by a signal that swings above V
Application Hints).
Note 9: Temperature coefficient is defined as the maximum (worst-case) change divided by the total temperature range.
Note 10: See Typical Performance Characteristics curves.
www.national.com10
for the SO-8 (M) package is 160˚C/W, and the mini SO-8 (MM) package is 200˚C/W. The value θ
J−A
IN
and V
terminals that is normally reverse-biased. Forcing the output above the input will turn
OUT
and below VLwith a slew rate not less than 40 mV/µs (see
H
for the LLP (LD) package is specifically
J−A
Page 11
LP2987/LP2988
Typical Performance Characteristics Unless otherwise specified: T
C
= 2.2 µF, S/D is tied to VIN,VIN=VO(NOM) + 1V, IL= 1 mA.
IN
V
vs TemperatureDropout Voltage vs Temperature
OUT
10001717
Dropout Voltage vs Load CurrentDropout Characteristics
= 25˚C, C
A
OUT
= 4.7 µF,
10001718
Ground Pin Current vs
Temperature and Load
10001719
10001721
10001720
Ground Pin Current vs
Load Current
10001722
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Page 12
Typical Performance Characteristics Unless otherwise specified: T
C
= 2.2 µF, S/D is tied to VIN,VIN=VO(NOM) + 1V, IL= 1 mA. (Continued)
IN
= 25˚C, C
A
OUT
= 4.7 µF,
LP2987/LP2988
Input Current vs V
IN
10001723
Input Current vs V
IN
Load Transient ResponseLoad Transient Response
10001724
1000172510001726
Line Transient ResponseLine Transient Response
1000172710001728
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Page 13
LP2987/LP2988
Typical Performance Characteristics Unless otherwise specified: T
C
= 2.2 µF, S/D is tied to VIN,VIN=VO(NOM) + 1V, IL= 1 mA. (Continued)
IN
Turn-On WaveformTurn-On Waveform
10001729
Short Circuit CurrentShort Circuit Current
= 25˚C, C
A
OUT
= 4.7 µF,
10001730
Short Circuit Current
vs Output Voltage
1000173110001732
Instantaneous Short Circuit Current
vs Temperature
10001733
10001734
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Page 14
Typical Performance Characteristics Unless otherwise specified: T
C
= 2.2 µF, S/D is tied to VIN,VIN=VO(NOM) + 1V, IL= 1 mA. (Continued)
IN
LP2987/LP2988
DC Load Regulation
= 25˚C, C
A
OUT
Shutdown Pin Current vs
Shutdown Pin Voltage
= 4.7 µF,
Shutdown Voltage
vs Temperature
Delay Pin Current vs V
IN
10001735
10001737
10001736
Input to Output Leakage
vs Temperature
10001738
Delay Pin Current vs
Delay Pin Voltage
10001745
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10001748
Page 15
LP2987/LP2988
Typical Performance Characteristics Unless otherwise specified: T
C
= 2.2 µF, S/D is tied to VIN,VIN=VO(NOM) + 1V, IL= 1 mA. (Continued)
IN
Delay Sink Current
vs TemperatureDelay Sink Current vs Temperature
1000174710001746
Output Impedance vs FrequencyOutput Impedance vs Frequency
Typical Performance Characteristics Unless otherwise specified: T
C
= 2.2 µF, S/D is tied to VIN,VIN=VO(NOM) + 1V, IL= 1 mA. (Continued)
IN
= 25˚C, C
A
OUT
= 4.7 µF,
LP2987/LP2988
Output Noise Density (LP2987)Output Noise Voltage (LP2988)
10001739
Output Noise Density (LP2988)Output Noise Density (LP2988)
10001744
1000175210001753
Turn-On Time (LP2988)Turn-On Time (LP2988)
10001754
10001755
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Page 17
LP2987/LP2988
Typical Performance Characteristics Unless otherwise specified: T
C
= 2.2 µF, S/D is tied to VIN,VIN=VO(NOM) + 1V, IL= 1 mA. (Continued)
IN
Turn-On Time (LP2988)
10001756
Basic Application Circuits
= 25˚C, C
A
OUT
= 4.7 µF,
10001705
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Page 18
Basic Application Circuits (Continued)
LP2987/LP2988
*Capacitance value shown is minimum required to assure stability, but may be increased without limit. Larger output capacitor provides improved dynamic
response.
**Shutdown must be actively terminated (see Application Hints). Tie to INPUT (pin 4) if not used.
10001706
Application Hints
LLP Package Devices
The LP2987/LP2988 is offered in the 8 lead LLP surface
mount package to allow for increased power dissipation
compared to the SO-8 and Mini SO-8. For details on thermal
performance as well as mounting and soldering specifications, refer to Application Note AN-1187.
EXTERNAL CAPACITORS
As with any low-dropout regulator, external capacitors are
required to assure stability. These capacitors must be correctly selected for proper performance.
INPUT CAPACITOR: An input capacitor (≥ 2.2 µF) is re-
quired between the LP2987/8 input and ground (amount of
capacitance may be increased without limit).
This capacitor must be located a distance of not more than
0.5” from the input pin and returned to a clean analog
ground. Any good quality ceramic or tantalum may be used
for this capacitor.
OUTPUT CAPACITOR:The output capacitor must meet the
requirement for minimum amount of capacitance and also
have an appropriate E.S.R. (equivalent series resistance)
value.
Curves are provided which show the allowable ESR range
as a function of load current for 3V and 5V outputs.
ESR Curves For 5V Output
10001707
ESR Curves For 3V Output
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10001708
Page 19
Application Hints (Continued)
IMPORTANT: The output capacitor must maintain its ESR in
the stable region
the application
The minimum required amount of output capacitance is
4.7 µF. Output capacitor size can be increased without limit.
It is important to remember that capacitor tolerance and
variation with temperature must be taken into consideration
when selecting an output capacitor so that the minimum
required amount of output capacitance is provided over the
full operating temperature range. A good Tantalum capacitor
will show very little variation with temperature, but a ceramic
may not be as good (see next section).
The output capacitor should be located not more than 0.5”
from the output pin and returned to a clean analog ground.
CAPACITOR CHARACTERISTICS
TANTALUM: Asolid tantalum capacitor is the best choice for
the output capacitor on the LM2987/8. Available from many
sources, their typical ESR is very close to the ideal value
required on the output of many LDO regulators.
Tantalums also have good temperature stability: a 4.7 µF
was tested and showed only a 10% decline in capacitance
as the temperature was decreased from +125˚C to −40˚C.
The ESR increased only about 2:1 over the same range of
temperature.
However,it should be noted that the increasing ESR at lower
temperatures present in all tantalums can cause oscillations
when marginal quality capacitors are used (where the ESR
of the capacitor is near the upper limit of the stability range at
room temperature).
CERAMIC: The ESR of ceramic capacitor can be low
enough to cause an LDO regulator to oscillate: a 2.2 µF
ceramic was measured and found to have an ESR of 15 mΩ.
If a ceramic capacitor is to be used on the LP2987/8 output,
a1Ωresistor should be placed in series with the capacitor to
provide a minimum ESR for the regulator.
A disadvantage of ceramic capacitors is that their capacitance varies a lot with temperature: Large ceramic capacitors are typically manufactured with the Z5U temperature
characteristic, which results in the capacitance dropping by
50% as the temperature goes from 25˚C to 80˚C.
This means you have to buy a capacitor with twice the
minimum C
ALUMINUM: The large physical size of aluminum electrolytics makes them unsuitable for most applications. Their ESR
characteristics are also not well suited to the requirements of
LDO regulators. The ESR of a typical aluminum electrolytic
is higher than a tantalum, and it also varies greatly with
temperature.
A typical aluminum electrolytic can exhibit an ESR increase
of 50X when going from 20˚C to −40˚C. Also, some aluminum electrolytics can not be used below −25˚C because the
electrolyte will freeze.
over the full operating temperature range of
to assure stability.
to assure stable operation up to 80˚C.
OUT
POWER-ON RESET DELAY
A power-on reset function can be easily implemented using
the LP2987/8 by adding a single external capacitor to the
Delay pin. The Error output provides the power-on reset
signal when input power is applied to the regulator.
The reset signal stays low for a pre-set time period after
power is applied to the regulator, and then goes high (see
Timing Diagram below).
Timing Diagram for Power-Up
10001709
The external capacitor c
sets the delay time (T
DLY
DELAY
The value of capacitor required for a given time delay may
be calculated using the formula:
C
DLY=TDELAY
/(5.59 X 105)
To simplify design, a plot is provided below which shows
values of C
versus delay time.
DLY
Plot of C
DLY
vs T
10001711
DELAY
LP2987/LP2988
).
www.national.com19
Page 20
Application Hints (Continued)
DETAILS OF ERR/RESET CIRCUIT OPERATION: (Refer
to LP2987/8 Equivalent Circuit).
LP2987/LP2988
LP2987/8 Equivalent Circuit
The output of comparator U2 is the ERR/RESET flag. Since
it is an open-collector output, it requires the use of a pull-up
resistor (R
input of U2, which means that its output is controlled by the
voltage applied to the non-inverting input.
The output of U1 (also an open-collector) will force the
non-inverting input of U2 to go low whenever the LP2987/8
regulated output drops about 5% below nominal.
U1’s inverting input is also held at 1.23V. The other input
samples the regulated output through a resistive divider (R
and RB). When the regulated output is at nominal voltage,
the voltage at the divider tap point will be 1.23V. If this
voltage drops about 60 mV below 1.23V, the output of U1 will
go low forcing the output of U2 low (which is the ERROR
state).
Power-ON reset delay occurs when a capacitor (shown as
C
DLY
tor is initially fully discharged (which means the voltage at
the Delay pin is 0V). The output of U1 keeps C
discharged (by sinking the 2.2 µA from the current source)
until the regulator output voltage comes up to within about
5% of nominal. At this point, U1’s output stops sinking current and the 2.2 µA starts charging up C
When the voltage across C
U2 will go high (note that D1 limits the maximum voltage to
about 2V).
SELECTING C
this capacitor is 1 µF. The capacitor must not have excessively high leakage current, since it is being charged from a
2.2 µA current source.
). The 1.23V reference is tied to the inverting
P
) is connected to the Delay pin. At turn-ON, this capaci-
.
DLY
reaches 1.23V, the output of
DLY
: The maximum recommended value for
DLY
DLY
10001710
fully
Aluminum electrolytics can not be used, but good-quality
tantalum, ceremic, mica, or film types will work.
SHUTDOWN INPUT OPERATION
The LP2987/8 is shut off by driving the Shutdown input low,
and turned on by pulling it high. If this feature is not to be
used, the Shutdown input should be tied to V
to keep the
IN
regulator output on at all times.
To assure proper operation, the signal source used to drive
the Shutdown input must be able to swing above and below
the specified turn-on/turn-off voltage thresholds listed as V
H
and VL, respectively (see Electrical Characteristics).
It is also important that the turn-on (and turn-off) voltage
signals applied to the Shutdown input have a slew rate which
is not less than 40 mV/µs.
CAUTION:
the regulator output state can not be guaranteed
if a slow-moving AC (or DC) signal is applied that is in the
range between V
and VL.
H
REVERSE INPUT-OUTPUT VOLTAGE
The PNP power transistor used as the pass element in the
LP2987/8 has an inherent diode connected between the
regulator output and input.
During normal operation (where the input voltage is higher
than the output) this diode is reverse-biased.
However, if the output is pulled above the input, this diode
will turn ON and current will flow into the regulator output.
In such cases, a parasitic SCR can latch which will allow a
high current to flow into V
(and out the ground pin), which
IN
can damage the part.
In any application where the output may be pulled above the
input, an external Schottky diode must be connected from
V
to V
IN
(cathode on VIN, anode on V
OUT
), to limit the
OUT
reverse voltage across the LP2987/8 to 0.3V (see Absolute
Maximum Ratings).
BYPASS CAPACITOR (LP2988)
The capacitor connected to the Bypass pin must have very
low leakage. The current flowing out of the Bypass pin
comes from the Bandgap reference, which is used to set the
A
output voltage. Since the Bandgap circuit has only a few
microamps flowing in it, loading effects due to leakage current will cause a change in the regulated output voltage.
Curves are provided which show the effect of loading the
Bypass pin on the regulated output voltage.
Care must be taken to ensure that the capacitor selected for
bypass will not have significant leakage current over the
operating temperature range of the application.
A high quality ceramic capacitor which uses either NPO or
COG type dielectiric material will typically have very low
leakage. Small surface-mount polypropolene or polycarbonate film capacitors also have extremely low leakage, but are
slightly larger in size than ceramics.
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
National Semiconductor
Corporation
Americas
Email: support@nsc.com
LP2987/LP2988 Micropower, 200 mA Ultra Low-Dropout Voltage Regulator with Programmable
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
National Semiconductor
Asia Pacific Customer
Response Group
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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