General Description
The LND TRM34 is a low power
Frequency Shift Keying (FSK)
transmitter designed to operate
at transmit frequencies between
300 and 500MHz. It is comprised
of a frequency synthesizer and
modulator, which accepts a
simple CMOS digital data input
and generates an FSK
modulated output. Output power
can be adjusted to a maximum
of 2dBm. The LND TRM34 has
been optimized for use in battery-
powered applications with low
current consumption in both
transmit and standby modes.
DATA SHEET
Applications
• Wireless office and home
security systems
• Automotive remote locking/starting
• Consumer remote control units
• Radio data transmission
• Low power telemetry
Features
• Low current consumption in
transmit mode
• Low standby current
(typically a few nA)
• Conforms to requirements of
ETSI-300-220, PT1340 and
FCC Part 15
• Easy to use with low external
component count and cost
• No discrete external inductors
required
• Adjustable output power level
VCC VEE1 VEE2 VSUB
PS
OUT2
OUT1
DATA
LF
RO2
RO1
BYPS
SBY
divide-
by-
64
buffer
crystal
oscillator
charge
pump
phase
detector
VCO
P.A.
VEE
Figure 1: Block Diagram
LND TRM34
LOW POWER 300 TO 500 MHz FSK TRANSMITTER
How Does it Work
Simply connect the supply (as
low as 2.6V), an external
oscillator to RO1 and RO2, and
all ground connections. The chip
converts logic level inputs to
balanced, complimentary,
frequency modulated outputs,
Out1 and Out 2. Output power
can be adjusted using resistor
values in Table 5, and can be
easily switched with logic input
to Standby Mode (extremely low
power) when not transmitting.
Component selections, network,
and antenna options are included
in this document.
General Description
The LND TRM34 is a low power
Frequency Shift Keying (FSK)
transmitter designed to operate
at transmit frequencies between
300 and 500MHz. It is comprised
of a frequency synthesizer and
modulator, which accepts a
simple CMOS digital data input
and generates an FSK
modulated output. Output power
can be adjusted to a maximum
of 2dBm. The LND TRM34 has
been optimized for use in batterypowered applications with low
current consumption in both
transmit and standby modes.
DATA SHEET
Applications
• Wireless office and home
security systems
• Automotive remote locking/starting
• Consumer remote control units
• Radio data transmission
• Low power telemetry
Features
• Low current consumption in
transmit mode
• Low standby current
(typically a few nA)
• Conforms to requirements of
ETSI-300-220, PT1340 and
FCC Part 15
• Easy to use with low external
component count and cost
• No discrete external inductors
required
• Adjustable output power level
VCC VEE1 VEE2 VSUB
PS
OUT2
OUT1
DATA
LF
RO2
RO1
BYPS
SBY
divide-
by-
64
buffer
crystal
oscillator
charge
pump
phase
detector
VCO
P.A.
VEE
Figure 1: Block Diagram
LND TRM34
LOW POWER 300 TO 500 MHz FSK TRANSMITTER
How Does it Work
Simply connect the supply (as
low as 2.6V), an external
oscillator to RO1 and RO2, and
all ground connections. The chip
converts logic level inputs to
balanced, complimentary,
frequency modulated outputs,
Out1 and Out 2. Output power
can be adjusted using resistor
values in Table 5, and can be
easily switched with logic input
to Standby Mode (extremely low
power) when not transmitting.
Component selections, network,
and antenna options are included
in this document.
LND TRM34
LOW POWER 300 TO 500 MHz FSK TRANSMITTER
Table 3: DC Characteristics at 3.0V VCC and 23ºC ambient temperature
all parameters 100% production tested under these conditions unless otherwise stated
Parameter Conditions Symbol Min Typ Max Unit
Standby Current SBY = low Iccstb 0.1 1 µA
Supply Current including open-collector output
currents
Icclow 25 mA
DATA logic high levelguaranteed by design Vhigh 0.7*VCC VCC+0.3
DATA logic low level
g
uaranteed by design Vlow -0.3V 0.3*VCC
DATA input current
g
uaranteed by design
-0.3 < Vin < VCC+0.3
Idata -10 +10 µA
Bias voltage on pin PSguaranteed by design
I(PS) = 100 µA
V(PS) 0.4 V
Theory of
operation
The LND TRM34 comprises three main elements:
1 Input buffer and modulator
2 Frequency synthesizer for generation of the RF
output carrier from a low frequency external
crystal
3 Power amplifier for driving an external antenna
The IC accepts a digital CMOS input, and
modulates a fixed amplitude RF carrier in
frequency according to the digital input level.
The RF carrier is generated by the on-chip
phase locked loop (PLL) frequency synthesizer.
This contains a fixed divider which ensures that
the RF output frequency is 64 times the crystal
reference frequency. The power amplifier
provides a variable output level of up to 2 dBm
of output power depending upon the value of an
external resistor RI.
The PA has balanced outputs OUT1 andOUT2
which are in open collector configuration.
A balanced output is used since it provides
a high degree of suppression of even-order
harmonics of the fundamental. Odd order
harmonic suppression is achieved using onchip cancellation techniques.
Electrical
characteristics
Table 2: Operating conditions
@ 434 MHz; @ 318 MHz
Parameter Symbol Min Max Unit
Supply voltage VCC 2.6 4.8 V
Ambient temperature Ta -40 65 °C
Note:
All specification parameters
g
uaranteed only with the following components
(please refer to fi
g
ure 2 for application circuit):
RF transformer
Crystal
Mini-Circuits TC4-14
Euroquartz B537 6.78-MHz crystal (Cicad = 10 pF)
R1 = 3.9 k R2 = 3.3 k C7 = 1 nF C8 = 47 pF C1 = C2 = 22 pF
Table 1: Absolute maximum ratings
Parameter Conditions Symbol Min Max Unit
Supply voltage VCC -0.3 +7.0 V
Input voltage - Logic Inputs DATA & SBY pins -0.3 V VCC + 0.3V
Input Current - Logic Inputs DATA & SBY pins -1.0 +1.0 mA
Storage temperature -40 150 °C
Junction temperature -40 150 °C
LND TRM34
LOW POWER 300 TO 500 MHz FSK TRANSMITTER
Electrical
characteristics
(continued)
∆
∆
∆
∆
∆
Table 4: AC Characteristics at 3.0V VCC and 23ºC ambient temperature,
fc = 433.92 MHz, unless otherwise stated
all parameters 100 % production tested under these conditions unless otherwise stated
Parameter Conditions Symbo Min Typ Max Unit
Maximum Carrier
Frequency
fcmax 440 MHz
Minimum Carrier Frequency fcmin 290 MHz
Maximum Data Rate received BER<1% with
receiver pre-detection
bandwidth matched to data
rate
Rmfsk 200 kbits/s
Frequency Deviation
(TH7106 in SOP)
static peak-to peak value:
crystal and system dependent
f 20 kHz
Frequency Deviation
(TH7106 in SSOP)
static peak-to peak value:
crystal and system dependent
f 22 kHz
Reference Frequency
g
uaranteed by design,
external crystal
fref 4.5 7.0 MHz
Output Power with R1=3.9 kOhms Po 0.5 dBm
2nd Harmonic P2 -34 -29 dBc
3rd Harmonic P3 -35 -28 dBc
Reference Spurious at fc + (fref to 3fref) Pref -45 -40 dBc
Phase Noise
g
uaranteed by design,
at 10 kHz offset
PN -75 dBc/Hz
VCOgain
g
uaranteed by design KVCO 125 MHz/V
Phase detectorgain
g
uaranteed by design KPD 16 µA/rad
Figure 2: Application Diagram
Matching
network and
antenna options
OP1
VCC 1+1:1
50 Ohms
VEE1
PS
SBY
DATA
VEE2
VCC1
RO1
RO2
VSUB
VCC
VCC
BYPS
VEE
OP21
2
3
4
5
6
7
89
10
11
12
13
14
15
16
R1
SBY
DATA
C1
C2
C5
C6
C7
R2
C8
X1
VCC
LND TRM34
LOW POWER 300 TO 500 MHz FSK TRANSMITTER
Table 7: Recommended External Components
Component Function Value Tolerance Units
C1 Crystal Oscillator 22 pF ± 5% pF
C2 Crystal Oscillator 22 pF ± 5% pF
C5 Supply Decoupling 100 ± 20% nF
C6 Regulator Decoupling 100 ± 20% nF
C7 PLL Loop Filter 1 ± 5% nF
C8 PLL Loop Filter 47 ± 5% pF
R1 O/P power set 3.9 ± 5% kOhms
R2 PLL Loop Filter 3.3 ± 5% kOhms
X1 Crystal 6.78 < 20ppm MHz
Table 6 - Crystal specifications
Supplier/part number Euroquartz: B537
Tel.:
0044146076477
Frequency 6.78 MHz
Package HC49/U
Operating mode AT
Calibration tolerance +/-10 ppm
Temperature stability +/-10 ppm
Operating temp range -10 to + 60°C
Circuit loading 10 pF
Maximum ESR, R1 50 Ohms
Static capacitance (typical), Co 5 pF
Motional capacitance (typical), C1 20 fF
Pullability 40 ppm/pF
External
components
Table 5: Output Power Settings
R
(kOhms)
Output power
(dBm)
Current cons.
(mA)
2.8 2 25
3.8 0 22
5.2 -2 20
6.7 -4 19
8.5 -6 18
9.7 -8 17
10.3 -10 16
10.7 -12 16
Matching
network and
antenna options
(continued)
Figure 2 shows a typical application diagram.
In order to minimise second harmonic distortion,
a differential output configuration is recommended. The LND TRM34 needs the following:
1) a dc bias reference to VCC (preferrably through
direct connection of a loop antenna connected
to VCC at its centre, or use of printed bias
inductors with a connection to VCC). Linear’s
TRM3x series of evaluation boards provide
large and small loop antenna solutions for customers to copy. These boards require a minimum
number of external components, and importantly
no discrete inductors are required.For driving an
external single-ended antenna, a high efficiency
printed balun is also available.
For optimum operation, the following points are
highlighted:
1) The IC can provide 7.5mA of current into the load
2) for maximum output power, it is recommended
that the antenna load be transformed to an
impedance of 200Ohms (RPS is set at
3.9kOhms)
Frequency
deviation
The amount of frequency deviation depends
upon the type of external crystal used. An onchip capacitor of 3pF is switched in parallel
with the crystal to shift its frequency of operation.
For instance, on the TRM3x series of evaluation boards, the peak-to-peak frequency
deviation possible with the supplied crystal is
over 15kHz in SOP packaged parts and 25 kHz
for SSOP packaged parts. The crystal parameters are specified as shown aside:
For smaller frequency deviations, then a less
pullable crystal can be specified (eg 20 pF or
30 pF load crystals are less pullable). If peak-topeak frequency deviations of much greater than
15kHz are required, then please consult Linear
Dimensions for information on how to achieve this.
4) The bias current for the power amplifier directly
controls the output current and hence the O/P
power. This bias current is set by an external
resistor connected between PS and ground.
Output power versus RI values is shown in
Table 5, for a differential load impedance of 200Ω.
3) the PLL synthesizer is designed to operate with
an external second order loop as shown in
figure 2, with component values as shown in
Table 7. These values determine the loop
bandwidth and dynamics and operation of the
loop is not guaranteed for any other values
LND TRM34
LOW POWER 300 TO 500 MHz FSK TRANSMITTER
Table 8: I/O interfacing
No. Signal Description
1 OP1 PA Output
2 VEE1 Ground (0V)
3 PS Power Set
4 SBY Standby (complete power down)
5 DATA Data
6 VEE2 Ground (0V)
8 RO1 Reference Oscillator (emitter)
9 RO2 Reference Oscillator (base)
10 VSUB Substrate Connection (0V)
11 VCC Supply (Battery)
12 BYPS Power supply decoupling to ground
13 LF Low Pass Filter
15 VEE Ground (0V)
16 OP2 PA Output (complement)
I/O interfacing
from
modulator
400 mV
+
-
+VCC OP1 OP2
∅ = 7.5 mA
+VCC
LF1
+ VCC
DATA
SBY
+ VCC
25kΩ
RO2
RO1
P.A.
VBIAS
RI
Input and output
interface
diagrams
Figure 3: Input and output interface diagrams
LND TRM34
LOW POWER 300 TO 500 MHz FSK TRANSMITTER
Package
Information
Pinout
Information
OP1
VEE1
PS
SBY
DATA
VEE2
VCC1
RO1
RO2
VSUB
VCC
BYPS
LF
VEE
OP2
SOP 16 / SSOP 16
1
2
3
4
5
6
7
89
10
11
12
13
14
15
16
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