Datasheet LMV981MFX, LMV981MDA, LMV981BLX, LMV981BL, LMV981MWC Datasheet (NSC)

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LMV981 Single / LMV982 Dual
1.8V, RRIO Operational Amplifiers with Shutdown
General Description
LMV981/LMV982 are low voltage, low power operational amplifiers. LMV981/LMV982 are guaranteed to operate from +1.8V to +5.0V supply voltages and have rail-to-rail input and output. LMV981/LMV982 input common mode voltage extends 200mV beyond the supplies which enables user enhanced functionality beyond the supply voltage range. The output can swing rail-to-rail unloaded and within 105mV from the rail with 600load at 1.8V supply. LMV981/ LMV982 are optimized to work at 1.8V which make them ideal for portable two-cell battery powered systems and single cell Li-Ion systems.
LMV981/LMV982 offer a shutdown pin that can be used to disable the device and reduce the supply current. The device is in shutdown when the SHDN-pin = low.
LMV981/LMV982 exhibit excellent speed-power ratio, achieving 1.4MHz gain bandwidth product at 1.8V supply voltage with very low supply current. LMV981/LMV982 are capable of driving a 600load and up to 1000pF capacitive load with minimal ringing. LMV981/LMV982 have a high DC gain of 101dB, making them suitable for low frequency ap­plications.
LMV981 is offered in space saving 6-Bump micro SMD, SC70-6 and SOT23-6 packages. The 6-Bump micro SMD package has only a 1.006mm x 1.514mm x 0.945mm foot­print. LMV982 is offered in space saving MSOP-10 package. These small packages are ideal solutions for area con­strained PC boards and portable electronics such as cellular phones and PDAs.
Features
(Typical 1.8V Supply Values; Unless Otherwise Noted)
n Guaranteed 1.8V, 2.7V and 5V specifications n Output swing
— w/600load 80mV from rail — w/2kload 30mV from rail
n V
CM
200mV beyond rails
n Supply current (per channel) 100µA n Gain bandwidth product 1.4MHz n Maximum V
OS
4.0mV
n Gain w/600load 101dB n Ultra tiny package micro SMD 1.0mm x 1.5mm n Turn-on time from shutdown 19µs n Temperature range −40˚C to 125˚C
Applications
n Industrial and automotive n Consumer communication n Consumer computing n PDAs n Portable audio n Portable/battery-powered electronic equipment n Supply current monitoring n Battery monitoring
Typical Application
200214H0
December 2002
LMV981 Single / LMV982 Dual 1.8V, RRIO Operational Amplifiers with Shutdown
© 2002 National Semiconductor Corporation DS200214 www.national.com
Page 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
ESD Tolerance (Note 2)
Machine Model 200V
Human Body Model 2000V
Differential Input Voltage
±
Supply Voltage
Supply Voltage (V
+–V−
) 5.5V
Output Short Circuit to V
+
(Note 3)
Output Short Circuit to V
(Note 3)
Storage Temperature Range −65˚C to 150˚C
Junction Temperature (Note 4) 150˚C
Mounting Temp.
Infrared or Convection (20 sec) 235˚C
Operating Ratings (Note 1)
Supply Voltage Range 1.8V to 5.0V
Temperature Range −40˚C to 125˚C
Thermal Resistance (θ
JA
)
6-Bump micro SMD 286˚C/W
SC70-6 414˚C/W
SOT23-6 265˚C/W
MSOP-10 235˚C/W
1.8V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25˚C. V+= 1.8V, V−= 0V, VCM=V+/2, VO=V+/2, R
L
>
1MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol Parameter Condition Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
V
OS
Input Offset Voltage LMV981 (Single) 1 4
6
mV
LMV982 (Dual) 1 5.5
7.5
TCV
OS
Input Offset Voltage Average Drift
5.5 µV/˚C
I
B
Input Bias Current 15 35
50
nA
I
OS
Input Offset Current 13 25
40
nA
I
S
Supply Current (per channel) 103 185
205
µA
In Shutdown LMV981 (Single) 0.156 1
2
LMV982 (Dual) 0.178 3.5
5
CMRR Common Mode Rejection
Ratio
LMV981, 0 V
CM
0.6V
1.4V V
CM
1.8V
(Note 8)
60
55
78
dBLMV982, 0 V
CM
0.6V
1.4V V
CM
1.8V (Note 8)
55
50
76
−0.2V V
CM
0V
1.8V V
CM
2.0V
50 72
PSRR Power Supply Rejection
Ratio
1.8V V
+
5V 75
70
100 dB
CMVR Input Common-Mode Voltage
Range
For CMRR Range 50dB
T
A
= 25˚C V−−0.2 −0.2 to 2.1 V++0.2
V
T
A
= −40˚C to
85˚C
V
V
+
TA= 125˚C V−+0.2 V+−0.2
LMV981/LMV982
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1.8V DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ= 25˚C. V+= 1.8V, V−= 0V, VCM=V+/2, VO=V+/2, R
L
>
1MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol Parameter Condition Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
A
V
Large Signal Voltage Gain LMV981 (Single)
RL= 600to 0.9V, V
O
= 0.2V to 1.6V, VCM= 0.5V
77
73
101
dB
R
L
=2kΩ to 0.9V,
V
O
= 0.2V to 1.6V, VCM= 0.5V
80
75
105
Large Signal Voltage Gain LMV982 (Dual)
R
L
= 600to 0.9V,
V
O
= 0.2V to 1.6V, VCM= 0.5V
75
72
90
dB
R
L
=2kΩ to 0.9V,
V
O
= 0.2V to 1.6V, VCM= 0.5V
78
75
100
V
O
Output Swing RL= 600to 0.9V
V
IN
=±100mV
1.65
1.63
1.72
V
0.077 0.105
0.120
R
L
=2kΩ to 0.9V
V
IN
=±100mV
1.75
1.74
1.77
0.024 0.035
0.04
I
O
Output Short Circuit Current Sourcing, VO=0V
V
IN
= 100mV
4
3.3
8
mA
Sinking, V
O
= 1.8V
V
IN
= −100mV
7
5
9
Ton Turn-on Time from Shutdown 19 µs
V
SHDN
Turn-on Voltage to enable part
1.0 V
Turn-off Voltage 0.55
1.8V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25˚C. V+= 1.8V, V−= 0V, VCM=V+/2, VO=V+/2, R
L
>
1MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
SR Slew Rate (Note 7) 0.35 V/µs
GBW Gain-Bandwidth Product 1.4 MHz
Φ
m
Phase Margin 67 deg
G
m
Gain Margin 7dB
e
n
Input-Referred Voltage Noise f = 1kHz, VCM= 0.5V 60
i
n
Input-Referred Current Noise f = 1kHz 0.06
THD Total Harmonic Distortion f = 1kHz, AV=+1
R
L
= 600,VIN=1V
PP
0.023 %
Amp-to-Amp Isolation (Note 9) 123 dB
LMV981/LMV982
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2.7V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25˚C. V+= 2.7V, V−= 0V, VCM=V+/2, VO=V+/2, R
L
>
1MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol Parameter Condition Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
V
OS
Input Offset Voltage LMV981 (Single) 1 4
6
mV
LMV982 (Dual) 1 6
7.5
mV
TCV
OS
Input Offset Voltage Average Drift
5.5 µV/˚C
I
B
Input Bias Current 15 35
50
nA
I
OS
Input Offset Current 8 25
40
nA
I
S
Supply Current (per channel) 105 190
210
µA
In Shutdown LMV981 (Single) 0.061 1
2
LMV982 (Dual) 0.101 3.5
5
CMRR Common Mode Rejection
Ratio
LMV981, 0 V
CM
1.5V
2.3V V
CM
2.7V (Note 8)
60
55
81
dB
LMV982, 0 V
CM
1.5V
2.3V V
CM
2.7V (Note 8)
55
50
80
−0.2V V
CM
0V
2.7V V
CM
2.9V
50 74
PSRR Power Supply Rejection
Ratio
1.8V V
+
5V
V
CM
= 0.5V
75
70
100 dB
CMVR Input Common-Mode Voltage
Range
For CMRR Range 50dB
T
A
= 25˚C V−−0.2 −0.2 to 3.0 V++0.2
V
T
A
= −40˚C to
85˚C
V
V
+
TA= 125˚C V−+0.2 V+−0.2
A
V
Large Signal Voltage Gain LMV981(Single)
RL= 600to 1.35V, V
O
= 0.2V to 2.5V
87
86
104
dB
R
L
=2kΩ to 1.35V,
V
O
= 0.2V to 2.5V
92
91
110
Large Signal Voltage Gain LMV982 (Dual)
R
L
= 600to 1.35V,
V
O
= 0.2V to 2.5V
78
75
90
R
L
=2kΩ to 1.35V,
V
O
= 0.2V to 2.5V
81
78
100
V
O
Output Swing RL= 600to 1.35V
V
IN
=±100mV
2.55
2.53
2.62
V
0.083 0.110
0.130
R
L
=2kΩ to 1.35V
V
IN
=±100mV
2.65
2.64
2.675
0.025 0.04
0.045
I
O
Output Short Circuit Current Sourcing, VO=0V
V
IN
= 100mV
20
15
30
mA
Sinking, V
O
=0V
V
IN
= −100mV
18
12
25
Ton Turn-on Time from Shutdown 12.5 µs
LMV981/LMV982
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2.7V DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ= 25˚C. V+= 2.7V, V−= 0V, VCM=V+/2, VO=V+/2, R
L
>
1MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol Parameter Condition Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
V
SHDN
Turn-on Voltage to enable part
1.9 V
Turn-off Voltage 0.8
2.7V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25˚C. V+= 2.7V, V−= 0V, VCM= 1.0V, VO= 1.35V, R
L
>
1MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
SR Slew Rate (Note 7) 0.4 V/µs
GBW Gain-Bandwidth Product 1.4 MHz
Φ
m
Phase Margin 70 deg
G
m
Gain Margin 7.5 dB
e
n
Input-Referred Voltage Noise f = 1kHz, VCM= 0.5V 57
i
n
Input-Referred Current Noise f = 1kHz 0.082
THD Total Harmonic Distortion f = 1kHz, AV=+1
R
L
= 600k,VIN=1V
PP
0.022 %
Amp-to-Amp Isolation (Note 9) 123 dB
5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25˚C. V+= 5V, V−= 0V, VCM=V+/2, VO=V+/2, R
L
>
1MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol Parameter Condition Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
V
OS
Input Offset Voltage LMV981 (Single) 1 4
6
mV
LMV982 (Dual) 1 5.5
7.5
TCV
OS
Input Offset Voltage Average Drift
5.5 µV/˚C
I
B
Input Bias Current 14 35
50
nA
I
OS
Input Offset Current 9 25
40
nA
I
S
Supply Current (per Channel) 116 210
230
µA
In Shutdown LMV981 (Single) 0.201 1
2
µA
LMV982 (Dual) 0.302 3.5
5
CMRR Common Mode Rejection
Ratio
0 V
CM
3.8V
4.6V V
CM
5.0V (Note 8)
60
55
86
dB
−0.2V V
CM
0V
5.0V V
CM
5.2V
50 78
PSRR Power Supply Rejection
Ratio
1.8V V
+
5V
V
CM
= 0.5V
75
70
100 dB
LMV981/LMV982
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5V DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for TJ= 25˚C. V+= 5V, V−= 0V, VCM=V+/2, VO=V+/2, R
L
>
1MΩ and SHDN tied to V+. Boldface limits apply at the temperature extremes. See (Note 10).
Symbol Parameter Condition Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
CMVR Input Common-Mode Voltage
Range
For CMRR Range 50dB
T
A
= 25˚C V−−0.2 −0.2 to 5.3 V++0.2
V
T
A
= −40˚C to
85˚C
V
V
+
TA= 125˚C V−+0.3 V+−0.3
A
V
Large Signal Voltage Gain (LMV981 Single)
RL= 600to 2.5V, V
O
= 0.2V to 4.8V
88
87
102
dB
R
L
=2kΩ to 2.5V,
V
O
= 0.2V to 4.8V
94
93
113
Large Signal Voltage Gain LMV982 (Dual)
R
L
= 600to 2.5V,
V
O
= 0.2V to 4.8V
81
78
90
dB
R
L
=2kΩ to 2.5V,
V
O
= 0.2V to 4.8V
85
82
100
V
O
Output Swing RL= 600to 2.5V
V
IN
=±100mV (Note 8)
4.855
4.835
4.890
V
0.120 0.160
0.180
R
L
=2kΩ to 2.5V
V
IN
=±100mV
4.945
4.935
4.967
0.037 0.065
0.075
I
O
Output Short Circuit Current LMV981, Sourcing, VO=0V
V
IN
= 100mV
80
68
100
mA
Sinking, V
O
=5V
V
IN
= −100mV
58
45
65
Ton Turn-on Time from Shutdown 8.4 µs
V
SHDN
Turn-on Voltage to enable part
4.2 V
Turn-off Voltage 0.8
5V AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ= 25˚C. V+= 5V, V−= 0V, VCM=V+/2, VO= 2.5V, R
L
>
1MΩ and SHDN tied to V+.Boldface limits apply at the temperature extremes. See (Note 10).
Symbol Parameter Conditions Min
(Note 6)
Typ
(Note 5)
Max
(Note 6)
Units
SR Slew Rate (Note 7) 0.42 V/µs
GBW Gain-Bandwidth Product 1.5 MHz
Φ
m
Phase Margin 71 deg
G
m
Gain Margin 8dB
e
n
Input-Referred Voltage Noise f = 1kHz, VCM=1V 50
i
n
Input-Referred Current Noise f = 1kHz 0.07
THD Total Harmonic Distortion f = 1kHz, AV=+1
R
L
= 600,VO=1V
PP
0.022 %
Amp-to-Amp Isolation (Note 9) 123 dB
LMV981/LMV982
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Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5kin series with 100pF. Machine model, 200in series with 100pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 150˚C. Output currents in excess of 45mA over long term may adversely affect reliability.
Note 4: The maximum power dissipation is a function of T
J(MAX)
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is
P
D
=(T
J(MAX)–TA
)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V
+
= 5V. Connected as voltage follower with 5V step input. Number specified is the slower of the positive and negative slew rates.
Note 8: For guaranteed temperature ranges, see Input Common-Mode Voltage Range specifications.
Note 9: Input referred, V
+
= 5V and RL= 100kconnected to 2.5V. Each amp excited in turn with 1kHz to produce VO=3VPP.
Note 10: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that T
J=TA
. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where T
J
>
TA. See Applications section for information on temperature derating of this device. Absolute Maximum Ratings indicated junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically.
Connection Diagrams
6-Bump micro SMD 6-Pin SC70-6/SOT23-6 10-Pin MSOP
200214G6
Top View
200214G7
Top View
20021435
Top View
Ordering Information
Package Part Number Packaging Marking Transport Media NSC
Drawing
6-Bump micro SMD LMV981BL A 250 Units Tape and Reel BLA006AAB
LMV981BLX 3k Units Tape and Reel
6-Pin SC70 LMV981MG A77 1k Units Tape and Reel
MAA06A
LMV981MGX 3k Units Tape and Reel
6-Pin SOT23 LMV981MF A78A 1k Units Tape and Reel
MF06A
LMV981MFX 3.5k Units Tape and Reel
10-Pin MSOP LMV982MM A87A 1k Unit Tape and Reel
MUB10A
LMV982MMX 3.5k Unit Tape and Reel
LMV981/LMV982
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Page 8
Typical Performance Characteristics Unless otherwise specified, V
S
= +5V, single supply,
T
A
= 25˚C.
Supply Current vs. Supply Voltage (LMV981) Sourcing Current vs. Output Voltage
20021422
20021425
Sinking Current vs. Output Voltage Output Voltage Swing vs. Supply Voltage
20021428 20021449
Output Voltage Swing vs. Supply Voltage Gain and Phase vs. Frequency
20021450 200214G8
LMV981/LMV982
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Typical Performance Characteristics Unless otherwise specified, V
S
= +5V, single supply,
T
A
= 25˚C. (Continued)
Gain and Phase vs. Frequency Gain and Phase vs. Frequency
200214G9 200214G10
Gain and Phase vs. Frequency CMRR vs. Frequency
200214G11
20021439
PSRR vs. Frequency Input Voltage Noise vs. Frequency
20021456
20021458
LMV981/LMV982
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Typical Performance Characteristics Unless otherwise specified, V
S
= +5V, single supply,
T
A
= 25˚C. (Continued)
Input Current Noise vs. Frequency THD vs. Frequency
20021466
20021467
THD vs. Frequency Slew Rate vs. Supply Voltage
20021468
20021469
Small Signal Non-Inverting Response Small Signal Non-Inverting Response
20021470 20021471
LMV981/LMV982
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Typical Performance Characteristics Unless otherwise specified, V
S
= +5V, single supply,
T
A
= 25˚C. (Continued)
Small Signal Non-Inverting Response Large Signal Non-Inverting Response
20021472
20021473
Large Signal Non-Inverting Response Large Signal Non-Inverting Response
20021474 20021475
Short Circuit Current vs. Temperature (Sinking) Short Circuit Current vs. Temperature (Sourcing)
20021476
20021477
LMV981/LMV982
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Typical Performance Characteristics Unless otherwise specified, V
S
= +5V, single supply,
T
A
= 25˚C. (Continued)
Offset Voltage vs. Common Mode Range Offset Voltage vs. Common Mode Range
20021436 20021437
Offset Voltage vs. Common Mode Range
20021438
LMV981/LMV982
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Page 13
Application Note
1.0 INPUT AND OUTPUT STAGE
The rail-to-rail input stage of this family provides more flex­ibility for the designer. The LMV981/LMV982 use a compli­mentary PNP and NPN input stage in which the PNP stage senses common mode voltage near V
and the NPN stage
senses common mode voltage near V
+
. The transition from
the PNP stage to NPN stage occurs 1V below V
+
. Since both input stages have their own offset voltage, the offset of the amplifier becomes a function of the input common mode voltage and has a crossover point at 1V below V
+
.
This V
OS
crossover point can create problems for both DC and AC coupled signals if proper care is not taken. Large input signals that include the V
OS
crossover point will cause distortion in the output signal. One way to avoid such distor­tion is to keep the signal away from the crossover. For example, in a unity gain buffer configuration and with V
S
= 5V, a 5V peak-to-peak signal will contain input-crossover distortion while a 3V peak-to-peak signal centered at 1.5V will not contain input-crossover distortion as it avoids the crossover point. Another way to avoid large signal distortion is to use a gain of −1 circuit which avoids any voltage excursions at the input terminals of the amplifier. In that circuit, the common mode DC voltage can be set at a level away from the V
OS
cross-over point. For small signals, this
transition in V
OS
shows up as a VCMdependent spurious signal in series with the input signal and can effectively degrade small signal parameters such as gain and common mode rejection ratio. To resolve this problem, the small signal should be placed such that it avoids the V
OS
cross­over point. In addition to the rail-to-rail performance, the output stage can provide enough output current to drive 600loads. Because of the high current capability, care should be taken not to exceed the 150˚C maximum junction temperature specification.
2.0 SHUTDOWN MODE
The LMV981/LMV982 have a shutdown pin. To conserve battery life in portable applications, the LMV981/LMV982 can be disabled when the shutdown pin voltage is pulled low.
The shutdown pin can’t be left unconnected. In case shut­down operation is not needed, the shutdown pin should be connected to V
+
when the LMV981/LMV982 are used. Leav­ing the shutdown pin floating will result in an undefined operation mode, either shutdown or active, or even oscillat­ing between the two modes.
3.0 INPUT BIAS CURRENT CONSIDERATION
The LMV981/LMV982 family has a complementary bipolar input stage. The typical input bias current (I
B
) is 15nA. The input bias current can develop a significant offset voltage. This offset is primarily due to I
B
flowing through the negative
feedback resistor, R
F
. For example, if IBis 50nA and RFis
100k, then an offset voltage of 5mV will develop (V
OS=IB
xRF). Using a compensation resistor (RC), as shown in Figure 1, cancels this effect. But the input offset current (I
OS
)
will still contribute to an offset voltage in the same manner.
Typical Applications
4.0 HIGH SIDE CURRENT SENSING
The high side current sensing circuit (Figure 2) is commonly used in a battery charger to monitor charging current to prevent over charging. A sense resistor R
SENSE
is connected to the battery directly. This system requires an op amp with rail-to-rail input. The LMV981/LMV982 are ideal for this ap­plication because the common mode input range goes up to the rail.
20021459
FIGURE 1. Canceling the Offset Voltage due to Input
Bias Current
200214H0
FIGURE 2. High Side Current Sensing
LMV981/LMV982
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Page 14
Typical Applications (Continued)
5.0 HALF-WAVE RECTIFIER WITH RAIL-TO-GROUND OUTPUT SWING
Since the LMV981/LMV982 input common mode range in­cludes both positive and negative supply rails and the output can also swing to either supply, achieving half-wave rectifier functions in either direction is an easy task. All that is needed are two external resistors; there is no need for diodes or matched resistors. The half wave rectifier can have either positive or negative going outputs, depending on the way the circuit is arranged.
In Figure 3 the circuit is referenced to ground, while in Figure 4 the circuit is biased to the positive supply. These configu­rations implement the half wave rectifier since the LMV981/ LMV982 can not respond to one-half of the incoming wave­form. It can not respond to one-half of the incoming because the amplifier can not swing the output beyond either rail therefore the output disengages during this half cycle. Dur­ing the other half cycle, however, the amplifier achieves a half wave that can have a peak equal to the total supply voltage. R
I
should be large enough not to load the
LMV981/LMV982.
6.0 INSTRUMENTATION AMPLIFIER WITH RAIL-TO-RAIL INPUT AND OUTPUT
Some manufactures make a non-“rail-to-rail”-op amp rail-to­rail by using a resistive divider on the inputs. The resistors divide the input voltage to get a rail-to-rail input range. The problem with this method is that it also divides the signal, so in order to get the obtained gain, the amplifier must have a higher closed loop gain. This raises the noise and drift by the internal gain factor and lowers the input impedance. Any mismatch in these precision resistors reduces the CMRR as well. The LMV981/LMV982 is rail-to-rail and therefore doesn’t have these disadvantages.
Using three of the LMV981/LMV982 amplifiers, an instru­mentation amplifier with rail-to-rail inputs and outputs can be made as shown in Figure 5.
In this example, amplifiers on the left side act as buffers to the differential stage. These buffers assure that the input impedance is very high and require no precision matched resistors in the input stage. They also assure that the differ­ence amp is driven from a voltage source. This is necessary to maintain the CMRR set by the matching R
1-R2
with R3-R4.
The gain is set by the ratio of R
2/R1
and R3should equal R
1
and R4equal R2. With both rail-to-rail input and output ranges, the input and output are only limited by the supply
voltages. Remember that even with rail-to-rail outputs, the output can not swing past the supplies so the combined common mode voltages plus the signal should not be greater that the supplies or limiting will occur. For additional applications, see National Semiconductor application notes AN–29, AN–31, AN– 71, and AN–127.
200214C3
200214C2
200214C4
FIGURE 3. Half-Wave Rectifier with Rail-To-Ground Output Swing Referenced to Ground
200214C0
200214B9
200214C1
FIGURE 4. Half-Wave Rectifier with Negative-Going Output Referenced to V
CC
200214G4
FIGURE 5. Rail-to-rail instrumentation amplifier
LMV981/LMV982
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Page 15
Simplified Schematic
200214A9
LMV981/LMV982
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Page 16
Physical Dimensions inches (millimeters)
unless otherwise noted
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. Sn/37Pb EUTECTIC BUMP
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN A1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER CLOCKWISE.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT.
6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC.
6-Bump micro SMD
NS Package Number BLA006AAB
X1 = 1.006
±
0.030mm X2 = 1.514±0.030mm X3 = 0.945±0.100mm
LMV981/LMV982
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Page 17
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
6-Pin SC70
NS Package Number MAA06A
6-Pin SOT23
NS Package Number MF06A
LMV981/LMV982
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Page 18
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
10-Pin MSOP
NS Package Number MUB10A
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LMV981 Single / LMV982 Dual 1.8V, RRIO Operational Amplifiers with Shutdown
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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