APPLICATION NOTE
1.0 External Capacitors/Stability
1.1 Input Bypass Capacitor
An input capacitor is recommended. A 10µF tantalum on the
input is a suitable input bypassing for almost all applications.
1.2 Adjust Terminal Bypass Capacitor
The adjust terminal can be bypassed to ground with a bypass capacitor (C
ADJ
) to improve ripple rejection. This bypass capacitor prevents ripple from being amplified as the
output voltage is increased. At any ripple frequency, the
impedance of the C
ADJ
should be less than R1 toprevent the
ripple from being amplified:
1/(2π*f
RIPPLE*CADJ
)<R1
The R1 is the resistor between the output and the adjust pin.
Its value is normally in the range of 100-200Ω. For example,
with R1 = 124Ω and f
RIPPLE
= 120Hz, the C
ADJ
should be
>
11µF.
1.3 Output Capacitor
The output capacitor is critical in maintaining regulator stability, and must meet the required conditions for both minimum amount of capacitance and ESR (Equivalent Series
Resistance). The minimum output capacitance required by
the LMS8117A is 10µF, if a tantalum capacitor is used. Any
increase of the output capacitance will merely improve the
loop stability and transient response. The ESR of the output
capacitor should be greater than 0.5Ω and less than 5Ω.In
the case of the adjustable regulator, when the C
ADJ
is used,
a larger output capacitance (22µf tantalum) is required.
2.0 Output Voltage
The LMS8117A adjustable version develops a 1.25V reference voltage, V
REF
, between the output and the adjust ter-
minal. As shown in
Figure 1
, this voltage is applied across
resistor R1 to generate a constant current I1. The current
I
ADJ
from the adjust terminal could introduce error to the
output. Butsince it is very small (60µA) compared with the I1
and very constant with line and load changes, the error can
be ignored. The constant current I1 then flows through the
output set resistor R2 and sets the output voltage to the
desired level.
For fixed voltage devices, R1 and R2 are integrated inside
the devices.
3.0 Load Regulation
The LMS8117A regulates the voltage that appears between
its output and ground pins, or between its output and adjust
pins. In some cases, line resistances can introduce errors to
the voltage across the load. To obtain the best load regulation, a few precautions are needed.
Figure 2
, shows a typical application using a fixed output
regulator. The Rt1 and Rt2 are the line resistances. It is
obvious that the V
LOAD
is less than the V
OUT
by the sum of
the voltage drops along the line resistances. In this case, the
load regulation seen at the R
LOAD
would be degraded from
the data sheet specification. To improve this, the load should
be tied directly to the output terminal on the positive side and
directly tied to the ground terminal on the negative side.
When the adjustable regulator is used (
Figure 3
), the best
performance is obtained with the positive side of the resistor
R1 tied directly to the output terminal of the regulator rather
than near the load.This eliminatesline drops from appearing
effectively in series with the reference and degrading regulation. For example, a 5V regulator with 0.05Ω resistance
between the regulator and load will have a load regulation
due to line resistance of 0.05Ω xI
L
. If R1 (=125Ω) is con-
nected near the load, the effective line resistance will be
0.05Ω (1+R2/R1) or in this case, it is 4 times worse. In
addition, the ground side of the resistor R2 can be returned
near the ground of the load to provide remote ground sensing and improve load regulation.
DS101196-17
FIGURE 1. Basic Adjustable Regulator
DS101196-18
FIGURE 2. Typical Application using Fixed Output
Regulator
LMS8117A
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