Datasheet LMH6718 Datasheet (National Semiconductor)

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LMH6718 Dual, High Output, Programmable Gain Buffer

General Description

The LMH6718 is a dual, low cost high speed (130MHz) buffer which features user programmable gains of +2, +1, and -1V/V. The LMH6718 also has a new output stage that delivers high output drive current (200mA), but consumes minimal quiescent supply current (2.6mA/Amp) from a supply. Its current feedback architecture, fabricated in an advanced complementary bipolar process, maintains consistent performance over a wide range of signal levels, and has a linear phase response up to one half of the -3dB frequency.

The LMH6718 offers 0.1dB gain flatness to 30MHz and differential gain and phase errors of .04% and .03˚. These features are ideal for professional and consumer video applications.

The LMH6718 offers superior dynamic performance with a 130MHz small-signal bandwidth, 600V/µs slew rate and

4.2ns rise/fall times (2V cent current, high output current drive, and high speed performance makes the LMH6718 well suited for many battery powered personal communication/computing systems. The ability to drive low impedance, high capacitive loads, makes the LMH6718 ideal for single ended cable applications. It also drives low impedance loads with minimum distortion. The LMH6718 will drive a 100Ω load with only −84/−84dBc second/third harmonic distortion (A 1MHz). It is also optimized for driving high currents into single-ended transformers and coils. When driving the input of high resolution A/D converters, the LMH6718 provides

). The combination of low quies-

STEP

= +2, V

OUT

=2VPP,f=

excellent -88/-98dBc second/third harmonic distortion (A +2, V

The LMH6718 is fabricated using National’s VIP10 plimentary bipolar process.

Features

n 200mA output current n .04%, .03˚ differential gain, phase n 5.2mA supply current for 2 amplifiers n 130MHz bandwidth (A n −88/−98dBc HD2/HD3 (1MHz) n 16ns settling to 0.05% n 600V/µs slew rate n Nominal supply range n Improved replacement for CLC5632

=2VPP, f = 1MHz, RL=1kΩ) and fast settling time.

OUT

Applications

n Video line driver n Coaxial cable driver n Twisted pair driver n Transformer/coil driver n High capacitive load driver n Portable/battery powered applications n A/D driver n I/Q Channel Amplifier

= +2)

2.5V to±6V

January 2003

™

com-

LMH6718 Dual, High Output, Programmable Gain Buffer

Connection Diagram

8-Pin SOIC

20040116

Top View

Maximum Output Voltage vs. Load Resistance

20040164

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Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/

LMH6718

Storage Temperature Range −65˚C to +150˚C

Lead Temperature (Soldering 10 sec) +300˚C

Distributors for availability and specifications.

Operating Ratings

ESD Tolerance (Note 5)

Human Body Model 2kV

Machine Model 200V

Supply Voltage 13.5

Output Current (Note 3)

Common-Mode Input Voltage V

+-V−

Maximum Junction Temperature +150˚C

Thermal Resistance

Package (θ

)(θJA)

SOIC 50˚C/W 145˚C/W

Nominal Operating Voltage

Operating Temperature Range −40˚C to +85˚C

+5V Electrical Characteristics (Note 2)

AV= +2, RL= 100Ω,VS= +5V (Note 4), Unless Specified. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min Typ Max Units

Frequency Domain Response

SSBW -3dB Bandwidth V

SSBW −0.1dB Bandwidth V

GFP Gain Peaking

GFR Gain Rolloff

LPD Linear Phase Deviation

Time Domain Response

Tr Rise and Fall Time 2V Step 4.8 ns

Ts Settling Time to 0.05% 1V Step 20 ns

OS Overshoot 2V Step 5 %

SR Slew Rate 2V Step 250 400 V/µs

Distortion And Noise Response

HD2 2nd Harmonic Distortion 2V

HD3 3rd Harmonic Distortion 2V

XTLKA Crosstalk (Input Referred) 10MHz, 1V

Static, DC Performance

Input Offset Voltage

Average Drift 10 µV/˚C

Input Bias Current (Non-Inverting)

Average Drift 20 nA/˚C

GACC Gain Accuracy

Internal Resistors (R

) 750 950 1150 Ω

F,RG

PSRR Power supply Rejection Ratio DC 50 60 dB

CMRR Common Mode Rejection Ratio DC 50

Supply Current per channel RL=

Miscellaneous Performance

Input Resistance (Non-Inverting) 0.38 MΩ

=0.5V

< < <

=2.0V

=0.5V

200MHz, VO=0.5V

30MHz, VO=0.5V

30MHz, VO= 0.5V

, 1MHz −85

, 1MHz; RL=1kΩ −88

, 5MHz −73

,1MHz −89

, 1MHz, RL=1kΩ −91

, 5MHz −71

70 110

∞

2.0

1.9

23 MHz

0dB

0.2 dB

0.12 deg

−85 dB

0.3

1.5

2.0

2.4 3.0

3.1

2.5V to±6V

MHz

dBc2V

µA

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+5V Electrical Characteristics (Note 2) (Continued)

AV= +2, RL= 100Ω,VS= +5V (Note 4), Unless Specified. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min Typ Max Units

CMH

CML

ROH

ROL

ROH

ROL

AV= +2, RL= 100Ω,VCC=±5V; Unless Specified. Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min Typ Max Units

Frequency Domain Response

SSBW -3dB Bandwidth V

SSBW −0.1dB Bandwidth V

GFP Gain Peaking

GFR Gain Rolloff

LPD Linear Phase Deviation

DG Differential Gain NTSC, R

DP Differential Phase NTSC, R

Time Domain Response

Tr Rise and Fall Time 2V Step 4.2 ns

Ts Settling Time to 0.05% 2V Step 17 ns

OS Overshoot 2V Step 14 %

SR Slew Rate 2V Step 400 600 V/µs

Distortion And Noise Response

HD2 2nd Harmonic Distortion 2V

HD3 3rd Harmonic Distortion 2V

XTLKA Crosstalk (Input Referred) 10MHz, 1V

Static, DC Performance

Input Capacitance

2.2 pF

(Non-Inverting)

Input Voltage Range, High 4.2 V

Input Voltage Range, Low 0.8 V

Output Voltage Range, High RL= 100Ω 3.6

4.0

3.5

Output Voltage Range, Low RL= 100Ω 1.4

1.0

1.3

Output Voltage Range, High RL=

Output Voltage Range, Low RL=

∞

4.1 V

0.9 V

Output Current (Note 3) 170 mA

Output Resistance, Closed Loop DC .28 Ω

5V Electrical Characteristics (Note 2)

=1.0V

200MHz, VO= 1.0V

300MHz, VO= 1.0V

30MHz, VO= 1.0V

=4.0V

= 1.0V

= 150Ω .04 %

= 150Ω .03 deg

,1MHz −84

, 1MHz; RL=1kΩ −88

, 5MHz −73

,1MHz −84

, 1MHz; RL=1kΩ −98

, 5MHz −76

Equivalent Input Noise

Voltage (eni)

Non-Inverting Current (ibn)

1MHz 8 nV/

1MHz 9 pA/

Input Offset Voltage .2

Average Drift 5 µV/˚C

Input Bias Current (Non-Inverting)

Average Drift 12 nA/˚C

100 130

30 MHz

0dB

0.1 dB

0.1 deg

−85 dB

1.3

MHz

dBc2V

9.5

µA

LMH6718

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5V Electrical Characteristics (Note 2) (Continued)

AV= +2, RL= 100Ω,VCC=±5V; Unless Specified. Boldface limits apply at the temperature extremes.

LMH6718

Symbol Parameter Conditions Min Typ Max Units

GACC Gain Accuracy

Internal Resistor (R

0.3

) 750 950 1150 Ω

F,RG

1.5

2.0

PSRR Power Supply Rejection Ratio DC 50 62 dB

CMRR Common Mode Rejection Ratio DC 52

Supply Current per channel RL=

∞

2.2

2.1

2.6 3.3

3.4

Miscellaneous Performance

Input Resistance (Non-Inverting) 0.50 MΩ

Input Capacitance

1.9 pF

(Non-Inverting)

CMVR Common-Mode Voltage Range

Output Voltage Range RL= 100Ω 3.6

4.2 V

3.8

3.5

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.

Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that T See Applications Section for information on temperature de-rating of this device." Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted.

Note 3: The maximum current is determined by device power dissipation limitations. See the Power Dissipation section of the Application Division for more details.

Note 4: V

Note 5: Human body model, 1.5kΩ in series with 100pF. Machine model, 0Ω In series with 200pF.

Output Voltage Range RL=

Output Current (Note 3) 200 mA

Output Resistance, Closed Loop DC .28 Ω

. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where T

J=TA

S=VCC−VEE

∞

4.0 V

TA.

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing

8-pin SOIC LMH6718MA LMH6718MA Rails M08A

LMH6718IMAX 2.5k Units Tape and Reel

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LMH6718

Typical Performance Characteristics (A

Frequency Response vs. Gain Frequency Response

20040106

Frequency Response R

= +2, RL= 100Ω, Unless Specified).

Frequency Response vs. R

20040123

20040125

Gain Flatness & Linear Phase Gain Flatness & Linear Phase

20040107

20040124

20040122

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Typical Performance Characteristics (A

= +2, RL= 100Ω, Unless Specified). (Continued)

LMH6718

Frequency Response vs. V

= 2) Frequency Response vs. VO(AV=2)

O(AV

20040102

Frequency Response vs. VO(AV= 1) Frequency Response vs. VO(AV=1)

20040101

20040129

20040126

Frequency Response vs. VO(AV= -1) Frequency Response vs. VO(AV= -1)

20040128

20040127

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LMH6718

Typical Performance Characteristics (A

= +2, RL= 100Ω, Unless Specified). (Continued)

PSRR & CMRR PSRR & CMRR

20040131 20040130

2nd & 3rd Harmonic Distortion vs. Frequency 2nd & 3rd Harmonic Distortion vs. Frequency

20040113

20040109

2nd & 3rd Harmonic Distortion RL=25Ω 2nd & 3rd Harmonic Distortion RL=25Ω

20040114

20040115

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Typical Performance Characteristics (A

= +2, RL= 100Ω, Unless Specified). (Continued)

LMH6718

2nd & 3rd Harmonic Distortion R

= 100Ω 2nd & 3rd Harmonic Distortion RL= 100Ω

20040110

20040111

2nd & 3rd Harmonic Distortion RL=1kΩ 2nd & 3rd Harmonic Distortion RL=1kΩ

20040112

Pulse Response Pulse Response

20040119

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20040108

20040118

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LMH6718

Typical Performance Characteristics (A

Closed Loop Output Resistance Closed Loop Output Resistance

20040121 20040120

IBN&VIOvs. Temperature IBN&VIOvs. Temperature

= +2, RL= 100Ω, Unless Specified). (Continued)

20040134 20040133

Settling Time vs. Accuracy Channel Matching

20040161

20040103

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Typical Performance Characteristics (A

= +2, RL= 100Ω, Unless Specified). (Continued)

LMH6718

Differential Gain & Phase Input Referred Crosstalk

Application Section

LMH6718 OPERATION

The LMH6718 is a current feedback buffer fabricated in an advanced complementary bipolar process. The LMH6718 operates from a single 5V supply or dual Operating from a single 5V supply, the LMH6718 has the following features:

Gains of±1, −1, and 2V/V are achievable without exter-

•

nal resistors Provides 170mA of output current

•

Offers low −88/−91dBc 2nd & 3rd harmonic distortion

•

Provides BW>110MHz

•

The LMH6718 performance is further enhanced in

ply applications as indicated in the

teristics table and the

5V Typical Performance plots.

5V Electrical Charac-

LMH6718 DESIGN INFORMATION CLOSED LOOP GAIN SELECTION

The LMH6718 is a current feedback op amp with R 1kΩ on chip (in the package). Select from three closed loop gains without using any external gain or feedback resistors. Implement gains of +2, +1, and −1V/V by connecting pins 2 and 3 (or 5 and 6) as described in the chart below.

Gain A

Input Connections

Non-Inverting (pins 3,5)Inverting (pins 2, 6)

20040165

5V supplies.

5V sup-

F=RG

20040132

SINGLE SUPPLY OPERATION (V

= +5V, VEE= GND)

The specifications given in the +5V Electrical Characteristics table for single supply operation are measured with a

common mode voltage (V

) of 2.5V. VCMis the voltage

around which the inputs are applied and the output voltages are specified.

Operating from a single +5V supply, the Common Mode Voltage Range (CMVR) of the LMH6718 is typically +0.8V to +4.2V. The typical output range with R

= 100Ω is +1.0V to

+4.0V. For single supply DC coupled operation, keep input signal

levels above 0.8V DC, AC coupling and level shifting the signal are recommended. The non-inverting and inverting configurations for both input conditions are illustrated in the following 2 sections.

DC COUPLED SINGLE SUPPLY OPERATION

Figure 1, Figure 2, and Figure 3 on the following page, show the recommended configurations for input signals that remain above 0.8V DC.

−1V/V ground input signal

+1V/V input signal NC (open)

+2V/V input signal ground

The gain accuracy of the LMH6718 is excellent and stable over temperature change. The internal gain setting resistors, R

and RGare poly silicon resistors. Although their absolute

values change with processing and temperature, their ratio

) remains constant. If an external resistor is used in

F/RG

series with R

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, gain accuracy over temperature will suffer.

20040139

FIGURE 1. DC Coupled, AV= −1V/V Configuration

Page 11

Application Section (Continued)

FIGURE 2. DC Coupled, AV= +1V/V Configuration

20040140

The input is AC coupled to prevent the need for level shifting the input signal at the source. The resistive voltage divider biases the non-inverting input to V

÷ 2 = 2.5V (For VCC=

+5V)

20040143

FIGURE 5. AC Coupled, AV= +1V/V Configuration

LMH6718

20040141

FIGURE 3. DC Coupled, AV= +2V/V Configuration

AC COUPLED SINGLE SUPPLY OPERATION

Figure 4, Figure 5, and Figure 6 show possible non-inverting and inverting configurations for input signals that go below

0.8V DC.

20040142

FIGURE 4. AC Coupled, AV= −1V/V Configuration

20040144

FIGURE 6. AC Coupled, AV= +2V/V Configuration

DUAL SUPPLY OPERATION

The LMH6718 operates on dual supplies as well as single supplies. The non-inverting and inverting configurations are shown in Figure 7, Figure 8, and Figure 9.

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Application Section (Continued)

LMH6718

FIGURE 7. Dual Supply, AV= −1V/V Configuration

20040145

LOAD TERMINATION

The LMH6718 can source and sink nearly equal amounts of current.

DRIVING CABLES AND CAPACITIVE LOADS

When driving cables, double termination is used to prevent reflections. For capacitive load applications, a small series resistor at the output of the LMH6718 will improve stability and settling performance. The Suggested R

vs. CLplot,

shown below in Figure 10, gives the recommended series resistance value for optimum flatness at various capacitive loads.

20040146

FIGURE 8. Dual Supply, AV= +1V/V Configuration

20040166

FIGURE 10. Suggested RSvs. C

TRANSMISSION LINE MATCHING

One method for matching the characteristic impedance (Z of a transmission line or cable is to place the appropriate resistor at the input or output of the amplifier. Figure 11 shows typical inverting and non-inverting circuit configurations for matching transmission lines.

Non-Inverting gain applications:

Connect pin 2 as indicated in the table in the Closed

•

Loop Gain Selection section. Make R1,R2,R6, and R7equal to ZO.

•

Use R3to isolate the amplifier from reactive loading

•

caused by the transmission line, or by parasitics.

Inverting gain applications:

Connect R3directly to ground.

•

Make the resistors R4,R6, and R7equal to ZO.

•

Make R5\ Rg=ZO.

•

The input and output matching resistors attenuate the signal by a factor of 2, therefore additional gain is needed. Use C6 to match the output transmission line over a greater frequency range. C6 compensates for the increase of the amplifier’s output impedance with frequency.

)

20040147

FIGURE 9. Dual Supply, AV= +2V/V Configuration

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Application Section (Continued)

20040149

FIGURE 11. Transmission Line Matching

POWER DISSIPATION

Follow these steps to determine the power consumption of the LMH6718:

1. Calculate the quiescent (no-load) power: P (VCC−VEE)

2. Calculate the RMS power at the output stage: P

−V

)(I

LOAD

), where V

LOAD

and I

are the voltage and

LOAD

current across the external load.

3. Calculate the total RMS power: P

t=Pamp+PO

mum power that the SOIC, package can dissipate at a given temperature is illustrated in Figure 12. The power derating curve for any LMH6718 package can be derived by utilizing the following equation:

where

= Ambient temperature (˚C)

amb

= Thermal resistance, from junction to ambient, for a

given package (˚C/W)

amp

=(V

. The maxi-

as a guide for high frequency layout and as an aid for device testing and characterization.

General layout and supply bypassing play major roles in high frequency performance. Follow the steps below as a basis for high frequency layout:

Include 6.8µF tantalum and 0.1µF ceramic capacitors on

•

both supplies. Place the 6.8µF capacitors within 0.75 inches of the

•

power pins. Place the 0.1µF capacitors less than 0.1 inches from the

•

power pins. Remove the ground plane under and around the part,

•

especially near the input and output pins to reduce parasitic capacitance.

Minimize all trace lengths to reduce series inductances.

•

Use flush-mount printed circuit board pins for prototyping,

•

never use high profile DIP sockets.

EVALUATION BOARD INFORMATION

A datasheet is available for the CLC730036 evaluation board. The evaluation board data sheets provide:

Evaluation board schematics

•

Evaluation board layouts

•

General information about the boards

•

The evaluation boards are designed to accommodate dual supplies. The boards can be modified to provide single supply operation. For best performance; 1) do not connect the unused supply, 2) ground the unused supply pin.

SPECIAL EVALUATION BOARD CONSIDERATION FOR THE LMH6718

To optimize off-isolation of the LMH6718, cut the R

trace on

the CLC730036 evaluation boards. This cut minimizes capacitive feedthrough between the input and the output. Fig- ure 13 shows where to cut both evaluation boards for improved off-isolation.

LMH6718

20040163

FIGURE 12. Power Derating Curve

LAYOUT CONSIDERATIONS

A proper printed circuit layout is essential for achieving high frequency performance. National provides evaluation boards for the LMH6718 (CLC730036-SOIC) and suggests their use

20040152

FIGURE 13. Evaluation Board Changes

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Page 14

Application Circuits

SINGLE SUPPLY CABLE DRIVER

LMH6718

Figure 14 below shows the LMH6718 driving 10m of 75Ω coaxial cable. The LMH6718 is set for a gain of +2V/V to compensate for the divide-by-two voltage drop at V response after 10m of cable is illustrated in Figure 15

FIGURE 14. Single Supply Cable Driver

. The

20040153

20040155

FIGURE 16. Differential Line Driver with Load

Impedance Conversion

Set up the LMH6718 as a difference amplifier:

Set the Channel 1 amplifier to a gain of +1V/V

•

Set the Channel 2 amplifier to a gain of −1V/V

•

Make the best use of the LMH6718’s output drive capability as follows:

20040154

FIGURE 15. Response After 10m of Cable

DIFFERENTIAL LINE DRIVER WITH LOAD IMPEDANCE CONVERSION

The circuit shown in Figure 16, operates as a differential line driver. The transformer converts the load impedance to a value that best matches the LMH6718’s output capabilities. The single-ended input signal is converted to a differential signal by the LMH6718. The line’s characteristic impedance is matched at both the input and the output. The schematic shows Unshielded Twisted Pair for the transmission line; other types of lines can also be driven.

where Reqis the transformed value of the load impedance,

is the output Voltage Range, and I

max

is the maximum

max

Output Current. Match the line’s characteristic impedance:

Select the transformer so that it loads the line with a value very near Z

over frequency range. The output impedance

of the LMH6718 also affects the match. With an ideal transformer we obtain:

where ZO(6718)(jω) is the output impedance of the LMH6718 and |Z

(6718)(jω)|<<Rm.

The load voltage and current will fall in the ranges:

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The LMH6718’s high output drive current and low distortion make it a good choice for this application.

Page 15

Application Circuits (Continued)

DIFFERENTIAL INPUT/DIFFERENTIAL OUTPUT AMPLIFIER

below illustrates a differential input/differential output configuration. The bypass capacitors are the only external components required.

20040160

FIGURE 17. Differential Input/Differential Output Amplifier

LMH6718

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Physical Dimensions inches (millimeters)

unless otherwise noted

NS Package Number M08A

8-Pin SOIC

LMH6718 Dual, High Output, Programmable Gain Buffer

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Email: new.feedback@nsc.com Tel: 1-800-272-9959

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