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LMH6574
4:1 High Speed Video Multiplexer
LMH6574 4:1 High Speed Video Multiplexer
November 2004
General Description
The LMH™6574 is a high performance analog multiplexer
optimized for professional grade video and other high fidelity
high bandwidth analog applications. The output amplifier
selects any one of four buffered input signals based on the
state of the two address bits. The LMH6574 provides a 400
MHz bandwidth at 2 V
high definition television (HDTV) applications can benefit
from the LMH6574’s 0.1 dB bandwidth of 150 MHz and its
2200 V/µs slew rate.
The LMH6574 supports composite video applications with its
0.02% and 0.05˚ differential gain and phase errors for NTSC
and PAL video signals while driving a single, back terminated
75Ω load. An 80 mA linear output current is available for
driving multiple video load applications.
The LMH6574 gain is set by external feedback and gain set
resistors for maximum flexibility.
The LMH6574 is available in the 14 pin SOIC package.
output signal levels. Multimedia and
PP
Connection Diagram
14-Pin SOIC
Features
n 500 MHz, 500 mV −3 dB bandwidth, AV=2
n 400 MHz, 2V
n 8 ns channel switching time
n 70 dB channel to channel isolation
n 0.02%, 0.05˚ diff. gain, phase
n 0.1 dB gain flatness to 150 MHz
n 2200 V/µs slew rate
n Wide supply voltage range: 6V (
n −68 dB HD2
n −84 dB HD3
−3 dB bandwidth, AV=2
PP
@
5 MHz
@
5 MHz
@
10 MHz
±
3V) to 12V (±6V)
Applications
n Video router
n Multi input video monitor
n Instrumentation / Test equipment
n Receiver IF diversity switch
n Multi Channel A/D Driver
n Picture in Picture video switch
Truth Table
A1 A0 EN SD OUT
1100CH3
1000CH2
0100CH1
0000CH0
X X 1 0 Disable
X X X 1 Shutdown
Top View
20119705
Ordering Information
Package Part Number Package Marking Transport Media NSC Drawing
14-Pin SOIC
LMH™is a trademark of National Semiconductor Corporation.
© 2004 National Semiconductor Corporation DS201197 www.national.com
LMH6574MA
LMH6574MAX 2.5k Units Tape and Reel
LH6574MA
55 Units/Rail
M14A
Page 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
LMH6574
Distributors for availability and specifications.
Storage Temperature Range −65˚C to +150˚C
Soldering Information
Infrared or Convection (20 sec) 235 ˚C
Wave Soldering (10 sec) 260 ˚C
ESD Tolerance (Note 4)
Human Body Model 2000V
Operating Ratings (Note 1)
Machine Model 200V
+−V−
Supply Voltage (V
I
(Note 3) 130 mA
OUT
Signal & Logic Input Pin Voltage
Signal & Logic Input Pin Current
) 13.2V
±
(VS+0.6V)
±
20 mA
Maximum Junction Temperature +150˚C
±
5V Electrical Characteristics
Operating Temperature −40 ˚C to 85 ˚C
Supply Voltage Range 6V to 12V
Thermal Resistance
Package (θ
)(θJC)
JA
14-Pin SOIC 130˚C/W 40˚C/W
VS=±5V, RL= 100Ω,AV=2 V/V, TJ=25 ˚C, Unless otherwise specified. Bold numbers specify limits at temperature extremes.
Symbol Parameter Conditions (Note 2) Min Typ Max Units
Frequency Domain Performance
SSBW −3 dB Bandwidth V
LSBW –3 dB Bandwidth V
.1 dBBW 0. 1 dB Bandwidth V
DG Differential Gain R
DP Differential Phase R
= 0.5V
OUT
OUT
OUT
= 150Ω, f=4.43 MHz 0.02 %
L
= 150Ω, f=4.43MHz 0.05 deg
L
=2V
PP
= 0.25V
PP
PP
500 MHz
400 MHz
150 MHz
XTLK Channel to Channel Crosstalk All Hostile, 5MHz −85 dB
Time Domain Response
TRS Channel to Channel Switching Time Logic transition to 90% output 8 ns
Enable and Disable Times Logic transition to 90% or 10%
10 ns
output.
TRL Rise and Fall Time 4V Step 2.4 ns
TSS Settling Time to 0.05% 2V Step 17 ns
OS Overshoot 2V Step 5 %
SR Slew Rate 4V Step 2200 V/µs
Distortion
HD2 2
HD3 3
IMD 3
nd
Harmonic Distortion 2VPP, 5 MHz −68 dBc
rd
Harmonic Distortion 2VPP, 5 MHz −84 dBc
rd
Order Intermodulation Products 10MHz, Two tones 2Vpp at output −80 dBc
Equivalent Input Noise
VN Voltage
ICN Current
>
1MHz, Input Referred 5 nV
>
1MHz, Input Referred 5 pA/
Static, DC Performance
CHGM Channel to Channel Gain
Difference
VIO Input Offset Voltage (Note 5) V
DC, Difference in gain between
channels
=0V 1
IN
±
0.005
±
0.032
±
0.035
±
±
20
25
DVIO Offset Voltage Drift 30 µV/˚C
IBN Input Bias Current (Notes 7, 5) V
=0V −3
IN
±
5
±
5.6
DIBN Bias Current Drift 11 nA/˚C
Inverting Input Bias Current Pin 12, Feedback point,
PSRR Power Supply Rejection Ratio
(Note 5)
V
=0V
IN
DC, Input referred 47
45
−7
54 dB
±
10
±
13
%
mV
µA
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Page 3
±
5V Electrical Characteristics (Continued)
VS=±5V, RL= 100Ω,AV=2 V/V, TJ=25 ˚C, Unless otherwise specified. Bold numbers specify limits at temperature extremes.
Symbol Parameter Conditions (Note 2) Min Typ Max Units
ICC Supply Current (Note 5) No Load 13 16
18
Supply Current Disabled(Note 5) ENABLE
Supply Current Shutdown SHUTDOWN>2V 1.8 2.5
VIH Logic High Threshold(Note 5) Select & Enable Pins (SD & EN) 2.0 V
VIL Logic Low Threshold (Note 5) Select & Enable Pins (SD & EN)
IiL Logic Pin Input Current Low (Note7)Logic Input = 0V Select & Enable
Pins (SD & EN)
IiH Logic Pin Input Current High (Note7)Logic Input = 2.0V, Select & Enable
Pins (SD & EN)
Miscellaneous Performance
RIN+ Input Resistance 5kΩ
CIN Input Capacitance 0.8 pF
ROUT Output Resistance Output Active, (EN and SD
ROUT Output Resistance Output Disabled, (EN or SD
COUT Output Capacitance Output Disabled, (EN or SD
VO Output Voltage Range No Load
VOL R
CMIR Input Voltage Range
IO Linear Output Current (Notes 5, 7) V
ISC Short Circuit Current(Note 3) V
ground
>
2V 4.7 5.8
<
0.8 V) 0.04 Ω
>
2V) 3000 Ω
>
2V) 3.1 pF
= 100Ω
L
= 0V, +60
IN
=±2V, Output shorted to
IN
−2.9
-8.5
±
3.54
±
3.53
±
3.18
±
3.17
±
-70
+50
−60
2.5
5.9
2.6
0.8 V
−1 µA
47 68
72.5
±
3.7 V
±
3.5 V
±
2.6 V
±
80 mA
±
230 mA
mA
mA
mA
µA
LMH6574
±
3.3V Electrical Characteristics
VS=±3.3V, RL= 100Ω,AV=2 V/V; Unless otherwise specified.
Symbol Parameter Conditions (Note 2) Min Typ Max Units
Frequency Domain Performance
SSBW −3 dB Bandwidth V
LSBW −3 dB Bandwidth V
0.1 dBBW 0.1 dB Bandwidth V
GFP Peaking DC to 200MHz 0.4 dB
XTLK Channel to Channel Crosstalk All Hostile, f=5MHz −85 dBc
Time Domain Response
TRL Rise and Fall Time 2V Step 2 ns
TSS Settling Time to 0.05% 2V Step 20 ns
OS Overshoot 2V Step 5 %
SR Slew Rate 2V Step 1400 V/µs
Distortion
HD2 2
HD3 3
Static, DC Performance
VIO Input Offset Voltage V
nd
Harmonic Distortion 2 VPP, 10MHz −67 dBc
rd
Harmonic Distortion 2 VPP, 10MHz −87 dBc
= 0.5V
OUT
OUT
OUT
=0V -5 mV
IN
= 2.0V
= 0.5V
PP
PP
PP
475 MHz
375 MHz
100 MHz
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Page 4
±
3.3V Electrical Characteristics (Continued)
VS=±3.3V, RL= 100Ω,AV=2 V/V; Unless otherwise specified.
LMH6574
Symbol Parameter Conditions (Note 2) Min Typ Max Units
IBN Input Bias Current (Note 7) V
=0V -3 µA
IN
PSRR Power Supply Rejection Ratio DC, Input Referred 49 dB
ICC Supply Current No Load 12 mA
VIH Logic High Threshold Select & Enable Pins (SD & EN)
VIL Logic Low Threshold Select & Enable Pins (SD & EN)
1.3 V
0.4 V
Miscellaneous Performance
RIN+ Input Resistance 5kΩ
CIN Input Capacitance 0.8 pF
ROUT Output Resistance 0.06 Ω
VO Output Voltage Range No Load
VOL R
= 100Ω
L
CMIR Input Voltage Range
IO Linear Output Current V
ISC Short Circuit Current V
=0V
IN
=±1V, Output shorted to
IN
±
2V
±
1.8 V
±
1.2 V
±
60 mA
±
150 mA
ground
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.
Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of
the device such that T
See Applications Section for information on temperature de-rating of this device. Min/Max ratings are based on product testing, characterization and simulation.
Individual parameters are tested as noted.
Note 3: The maximum output current (I
150˚C). See the Power Dissipation section of the Application Section for more details. A short circuit condition should be limited to 5 seconds or less.
Note 4: Human Body model, 1.5kΩ in series with 100pF. Machine model, 0Ω In series with 200pF
Note 5: Parameters guaranteed by electrical testing at 25˚C.
Note 6: Parameters guaranteed by design.
Note 7: Positive Value is current into device.
. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self heating where T
J=TA
) is determined by the device power dissipation limitations (The junction temperature cannot be allowed to exceed
OUT
>
TA.
J
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Page 5
LMH6574
Typical Performance Characteristics V
specified.
Frequency Response vs. V
Frequency Response vs. Capacitive Load Suggested R
OUT
20119702 20119703
=±5V, RL= 100Ω,AV=2, RF=RG=575Ω; unless otherwise
s
Frequency Response vs. Gain
vs. Capacitive Load
OUT
20119714
Suggested Value of RFvs. Gain Pulse Response 4V
20119701
20119715
PP
20119725
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Page 6
Typical Performance Characteristics V
specified. (Continued)
LMH6574
Pulse Response 2V
PP
Closed Loop Output Impedance Closed Loop Output Impedance
=±5V, RL= 100Ω,AV=2, RF=RG=575Ω; unless otherwise
s
Pulse Response 2V
20119729 20119730
PP
20119708
PSRR vs. Frequency Channel Switching
20119704
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20119709
20119716
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LMH6574
Typical Performance Characteristics V
specified. (Continued)
SHUTDOWN Switching Shutdown Glitch
20119721
ENABLE Switching Disable Glitch
=±5V, RL= 100Ω,AV=2, RF=RG=575Ω; unless otherwise
s
20119727
20119726
HD2 vs. Frequency HD3 vs. Frequency
20119733 20119734
20119728
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Typical Performance Characteristics V
specified. (Continued)
LMH6574
HD2 vs. V
HD2 vs. V
S
20119707 20119706
OUT
=±5V, RL= 100Ω,AV=2, RF=RG=575Ω; unless otherwise
s
HD3 vs. V
HD3 vs. V
S
OUT
20119711 20119710
Minimum V
OUT
vs. I
(Note 7) Maximum V
OUT
20119712 20119713
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OUT
vs. I
OUT
(Note 7)
Page 9
LMH6574
Typical Performance Characteristics V
specified. (Continued)
Crosstalk vs. Frequency Off Isolation
20119735
=±5V, RL= 100Ω,AV=2, RF=RG=575Ω; unless otherwise
s
20119731
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Page 10
Application Notes
GENERAL INFORMATION
LMH6574
FIGURE 1. Typical Application
The LMH6574 is a high-speed 4:1 analog multiplexer, optimized for very high speed and low distortion. With selectable
gain and excellent AC performance, the LMH6574 is ideally
suited for switching high resolution, presentation grade video
signals. The LMH6574 has no internal ground reference.
Single or split supply configurations are both possible. The
LMH6574 features very high speed channel switching and
disable times. When disabled the LMH6574 output is high
impedance making MUX expansion possible by combining
multiple devices. See “Multiplexer Expansion” section below.
VIDEO PERFORMANCE
The LMH6574 has been designed to provide excellent performance with production quality video signals in a wide
variety of formats such as HDTV and High Resolution VGA.
Best performance will be obtained with back-terminated
loads. The back termination reduces reflections from the
transmission line and effectively masks transmission line
and other parasitic capacitances from the amplifier output
stage. Figure 1 shows a typical configuration for driving a
75Ω. Cable. The output buffer is configured for a gain of 2,
so using back terminated loads will give a net gain of 1.
20119722
FEEDBACK RESISTOR SELECTION
20119732
FIGURE 2. Suggested RFvs. Gain
The LMH6574 has a current feedback output buffer with gain
determined by external feedback (R
) and gain set (RG)
F
resistors. With current feedback amplifiers, the closed loop
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LMH6574
Application Notes (Continued)
frequency response is a function of R
the recommended value of R
the chart “Suggested R
F
vs Gain”. Generally, lowering R
F
from the recommended value will peak the frequency response and extend the bandwidth while increasing the value
will cause the frequency response to roll off faster.
of R
F
Reducing the value of R
too far below the recommended
F
value will cause overshoot, ringing and, eventually, oscillation.
Since all applications are slightly different it is worth some
experimentation to find the optimal R
more information see Application Note OA-13 which describes the relationship between R
quency response for current feedback operational amplifiers.
The impedance looking into pin 12 is approximately 20Ω.
This allows for good bandwidth at gains up to 10 V/V. When
used with gains over 10 V/V, the LMH6574 will exhibit a “gain
bandwidth product” similar to a typical voltage feedback
amplifier. For gains of over 10 V/V consider selecting a high
performance video amplifier like the LMH6720 to provide
additional gain.
SD vs. EN
The LMH6574 has both shutdown and disable capability.
The shutdown feature affects the entire chip, whereas the
disable function only affects the output buffer. When in shutdown mode, minimal power is consumed. The shutdown
function is very fast, but causes a very brief spike of about
400 mV to appear on the output. When in shutdown mode
the LMH6574 consumes only 1.8 mA of supply current. For
maximum input to output isolation use the shutdown function.
The EN pin only disables the output buffer which results in a
substantially reduced output glitch of only 50 mV. While
disabled the chip consumes 4.7 mA, considerably more than
when shutdown. This is because the input buffers are still
active. For minimal output glitch use the EN pin. Also, care
should be taken to ensure that, while in the disabled state,
the voltage differential between the active input buffer (the
one selected by pins A0 and A1) and the output pin stays
less than 2V. As the voltage differential increases, input to
output isolation decreases. Normally this is not an issue. See
the section on MULTIPLEXER EXPANSION for further details.
To reduce the output glitch when using the SD pin, switch the
EN pin at least 10 ns before switching the SD pin. This can
be accomplished by using an RC delay circuit between the
two pins if only one control signal is available.
EVALUATION BOARDS
National Semiconductor provides the following evaluation
boards as a guide for high frequency layout and as an aid in
device testing and characterization. Many of the data sheet
plots were measured with this board.
. For a gain of 2 V/V,
F
is 575Ω. For other gains see
for a given circuit. For
F
and closed-loop fre-
F
Device Package Evaluation Board
LMH6574 SOIC LMH730276
F
An evaluation board can be shipped when a sample request
is placed with National Semiconductor. Samples can be
ordered on the National web page. (www.national.com)
MULTIPLEXER EXPANSION
With the SHUTDOWN pin putting the output stage into a
high impedance state, several LMH6574’s can be tied together to form a larger input MUX. However, there is a
loading effect on the active output caused by the unselected
devices. The circuit in Figure 3 shows how to compensate
for this effect. For the 16:1 MUX function shown in Figure 3
below the gain error would be about −0.8 dB, or about 9%. In
the circuit in Figure 3, resistor ratios have been adjusted to
compensate for this gain error. By adjusting the gain of each
multiplexer circuit the error can be reduced to the tolerance
of the resistors used (1% in this example).
20119717
FIGURE 3. Multiplexer Gain Compensation
Disabling of the LMH6574 using the EN pin is not recommended for use when doing multiplexer expansion. While
disabled, If the voltage between the selected input and the
chip output exceeds approximately 2V the device will begin
to enter a soft breakdown state. This will show up as reduced
input to output isolation. The signal on the non-inverting
input of the output driver amplifier will leak through to the
inverting input, and then to the output through the feedback
resistor. The worst case is a gain of 1 configuration where
the non inverting input follows the active input buffer and
(through the feedback resistor) the inverting input follows the
voltage driving the output stage. The solution for this is to
use shutdown mode for multiplexer expansion.
BUILDING an 8:1 MULITPLEXER
Figure 4 shows an 8:1 MUX using two LMH6574’s.
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Application Notes (Continued)
LMH6574
FIGURE 4. 8:1 MUX USING TWO LMH6574’s
20119719
FIGURE 5. Delay Circuit Implementation
If it is important in the end application to make sure that no
two inputs are presented to the output at the same time, an
optional delay block can be added, to drive the SHUTDOWN
pin of each device, as shown. Figure 5 shows one possible
approach to this delay circuit. The delay circuit shown will
delay SHUTDOWN’s H to L transitions (R
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and C1decay)
1
20119718
but won’t delay its L to H transition. R
compared to R
in order to not reduce the SHUTDOWN
1
should be kept small
2
voltage and to produce little or no delay to SHUTDOWN.
Other Applications
The LMH6574 could support a multi antenna receiver with
up to four separate antennas. Monitoring the signal strength
of all 4 antennas and connecting the strongest signal to the
final IF stage would provide effective spacial diversity.
For direction finding, the LMH6574 could be used to provide
high speed sampling of four separate antennas to a single
DSP which would use the information to calculate the direction of the received signal.
DRIVING CAPACITIVE LOADS
Capacitive output loading applications will benefit from the
use of a series output resistor R
of a series output resistor, R
. Figure 6 shows the use
OUT
, to stabilize the amplifier
OUT
Page 13
Other Applications (Continued)
output under capacitive loading. Capacitive loads of
5 to 120 pF are the most critical, causing ringing, frequency
response peaking and possible oscillation. The chart “Suggested R
selecting a series output resistor for mitigating capacitive
loads. The values suggested in the charts are selected for
0.5 dB or less of peaking in the frequency response. This
gives a good compromise between settling time and bandwidth. For applications where maximum frequency response
is needed and some peaking is tolerable, the value of R
can be reduced slightly from the recommended values.
vs. Cap Load” gives a recommended value for
OUT
OUT
LMH6574
20119714
FIGURE 8. Frequency Response vs. Capacitive Load
FIGURE 6. Decoupling Capacitive Loads
FIGURE 7. Suggested R
vs. Capacitive Load
OUT
20119724
20119715
LAYOUT CONSIDERATIONS
Whenever questions about layout arise, use the evaluation
board as a guide. The LMH730276 is the evaluation board
supplied with samples of the LMH6574. To reduce parasitic
capacitances, ground and power planes should be removed
near the input and output pins. For long signal paths controlled impedance lines should be used, along with impedance matching elements at both ends. Bypass capacitors
should be placed as close to the device as possible. Bypass
capacitors from each rail to ground are applied in pairs. The
larger electrolytic bypass capacitors can be located farther
from the device, the smaller ceramic capacitors should be
placed as close to the device as possible. In Figure 1, the
capacitor between V
+
and V−is optional, but is recommended for best second harmonic distortion. Another way to
enhance performance is to use pairs of 0.01µF and 0.1µF
ceramic capacitors for each supply bypass.
POWER DISSIPATION
The LMH6574 is optimized for maximum speed and performance in the small form factor of the standard SOIC package. To ensure maximum output drive and highest performance, thermal shutdown is not provided. Therefore, it is of
utmost importance to make sure that the T
JMAX
is never
exceeded due to the overall power dissipation.
Follow these steps to determine the Maximum power dissi-
pation for the LMH6574:
1. Calculate the quiescent (no-load) power: P
), where VS=V+-V−.
(V
S
AMP=ICC
2. Calculate the RMS power dissipated in the output stage:
(rms) = rms ((VS-V
P
D
are the voltage across and the current through the
I
OUT
external load and V
S
3. Calculate the total RMS power: P
)*I
OUT
), where V
OUT
is the total supply voltage.
T=PAMP+PD
OUT
and
.
The maximum power that the LMH6574 package can dissipate at a given temperature can be derived with the following
equation:
= (150˚ – T
P
MAX
ture (˚C) and θ
)/ θJA, where T
AMB
= Thermal resistance, from junction to
JA
= Ambient tempera-
AMB
ambient, for a given package (˚C/W). For the SOIC package
is 130 ˚C/W.
θ
JA
*
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Page 14
Other Applications (Continued)
ESD PROTECTION
LMH6574
The LMH6574 is protected against electrostatic discharge
(ESD) on all pins. The LMH6574 will survive 2000V Human
Body model and 200V Machine model events. Under normal
operation the ESD diodes have no effect on circuit performance. There are occasions, however, when the ESD di-
odes will be evident. If the LMH6574 is driven by a large
signal while the device is powered down the ESD diodes will
conduct . The current that flows through the ESD diodes will
either exit the chip through the supply pins or will flow
through the device, hence it is possible to power up a chip
with a large signal applied to the input pins. Using the
shutdown mode is one way to conserve power and still
prevent unexpected operation.
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Page 15
Physical Dimensions inches (millimeters) unless otherwise noted
LMH6574 4:1 High Speed Video Multiplexer
14-Pin SOIC
NS Package Number M14A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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properly used in accordance with instructions for use
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or
system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to result
in a significant injury to the user.
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Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ‘‘Banned
Substances’’ as defined in CSP-9-111S2.
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