Page 1
LMC660
CMOS Quad Operational Amplifier
General Description
The LMC660 CMOS Quad operational amplifier is ideal for
operation froma single supply.It operatesfrom +5Vto +15V
and features rail-to-rail output swing in addition to an input
common-mode range that includes ground. Performance
limitations that have plagued CMOS amplifiers in the past
are not a problem with this design. Input V
broadband noise as well as voltage gain into realistic loads
(2 kΩ and 600Ω) are all equal to or better than widely accepted bipolar equivalents.
This chip is built with National’s advanced Double-Poly
Silicon-Gate CMOS process.
See the LMC662 datasheet for a dual CMOS operational
amplifier with these same features.
, drift, and
OS
Features
n Rail-to-rail output swing
n Specified for 2 kΩ and 600Ω loads
n High voltage gain: 126 dB
n Low input offset voltage: 3 mV
n Low offset voltage drift: 1.3 µV/˚C
n Ultra low input bias current: 2 fA
n Input common-mode range includes V
n Operating range from +5V to +15V supply
=
n I
SS
n Low distortion: 0.01%at 10 kHz
n Slew rate: 1.1 V/µs
n Available in extended temperature range (−40˚C to
+125˚C); ideal for automotive applications
n Available to Standard Military Drawing specification
Applications
n High-impedance buffer or preamplifier
n Precision current-to-voltage converter
n Long-term integrator
n Sample-and-Hold circuit
n Peak detector
n Medical instrumentation
n Industrial controls
n Automotive sensors
375 µA/amplifier; independent of V
LMC660 CMOS Quad Operational Amplifier
April 1998
−
+
Connection Diagram
14-Pin DIP/SO
DS008767-1
© 1999 National Semiconductor Corporation DS008767 www.national.com
Page 2
Ordering Information
Package Temperature Range NSC
Military Extended Industrial Commercial
−55˚C to +125˚C −40˚C +125˚C −40˚C to +85˚C 0˚C to +70˚C
14-Pin LMC660AMJ/883 J14A Rail
Ceramic DIP
14-Pin LMC660EM LMC660AIM LMC660CM M14A Rail
Small Outline Tape and Reel
14-Pin LMC660EN LMC660AIN LMC660CN N14A Rail
Molded DIP
14-Pin
Side Brazed LMC660AMD D14E Rail
Ceramic DIP
Drawing
Transport
Media
www.national.com 2
Page 3
Absolute Maximum Ratings (Note 3)
If Military/Aerospace specified devices are required,
please contact theNational Semiconductor Sales Office/
Distributors for availability and specifications.
Differential Input Voltage
Supply Voltage 16V
Output Short Circuit to V
Output Short Circuit to V
+
−
Lead Temperature
(Soldering, 10 sec.) 260˚C
Storage Temp. Range −65˚C to +150˚C
Voltage at Input/Output Pins (V
Current at Output Pin
Current at Input Pin
Current at Power Supply Pin 35 mA
Power Dissipation (Note 2)
±
Supply Voltage
(Note 12)
(Note 1)
+
) + 0.3V, (V−) − 0.3V
±
18 mA
±
5mA
Operating Ratings
Temperature Range
LMC660AMJ/883,
LMC660AMD −55˚C ≤ T
LMC660AI −40˚C ≤ T
LMC660C 0˚C ≤ T
LMC660E −40˚C ≤ T
Supply Voltage Range 4.75V to 15.5V
Power Dissipation (Note 10)
Thermal Resistance (θ
) (Note 11)
JA
14-Pin Ceramic DIP 90˚C/W
14-Pin Molded DIP 85˚C/W
14-Pin SO 115˚C/W
14-Pin Side Brazed
Ceramic DIP 90˚C/W
≤ +125˚C
J
≤ +85˚C
J
≤ +70˚C
J
≤ +125˚C
J
Junction Temperature 150˚C
ESD tolerance (Note 8) 1000V
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
=
0V, V
=
1.5V, V
CM
=
O
2.5V and R
>
1M unless otherwise specified.
L
Parameter Conditions Typ
(Note 4)
=
25˚C. Boldface limits apply at the temperature extremes. V
J
LMC660AMD LMC660AI LMC660C LMC660E Units
LMC660AMJ/883
+
=
5V, V
Limit Limit Limit Limit
(Notes 4, 9) (Note 4) (Note 4) (Note 4)
Input Offset Voltage 1 3 3 6 6 mV
3.5 3.3 6.3 6.5 max
Input Offset Voltage 1.3 µV/˚C
Average Drift
Input Bias Current 0.002 20 pA
100 4 2 60 max
Input Offset Current 0.001 20 pA
100 2 1 60 max
Input Resistance
Common Mode 0V ≤ V
+
Rejection Ratio V
=
Positive Power Supply 5V ≤ V
Rejection Ratio V
=
O
Negative Power Supply 0V ≤ V
≤ 12.0V 83 70 70 63 63 dB
CM
15V 68 68 62 60 min
+
≤ 15V 83 70 70 63 63 dB
2.5V 68 68 62 60 min
−
≤ −10V 94 84 84 74 74 dB
>
1 TeraΩ
Rejection Ratio 82 83 73 70 min
+
Input Common-Mode V
=
5V & 15V −0.4 −0.1 −0.1 −0.1 −0.1 V
Voltage Range For CMRR ≥ 50 dB 0 000max
+
V
Large Signal R
− 1.9 V+− 2.3 V+− 2.3 V+− 2.3 V+− 2.3 V
=
2kΩ(Note 5) 2000 400 440 300 200 V/mV
L
+
V
− 2.6 V+− 2.5 V+− 2.4 V+− 2.6 min
Voltage Gain Sourcing 300 400 200 100 min
Sinking 500 180 180 90 90 V/mV
70 120 80 40 min
=
R
600Ω (Note 5) 1000 200 220 150 100 V/mV
L
Sourcing 150 200 100 75 min
Sinking 250 100 100 50 50 V/mV
35 60 40 20 min
−
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Page 4
DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
=
0V, V
=
CM
1.5V, V
=
2.5V and R
O
>
1M unless otherwise specified.
L
Parameter Conditions Typ
=
25˚C. Boldface limits apply at the temperature extremes. V
J
(Note 4)
LMC660AMD LMC660AI LMC660C LMC660E Units
LMC660AMJ/883
Limit Limit Limit Limit
(Notes 4, 9) (Note 4) (Note 4) (Note 4)
+
=
Output Swing V
5V 4.87 4.82 4.82 4.78 4.78 V
R
L
=
2kΩto V
+
/2 4.77 4.79 4.76 4.70 min
0.10 0.15 0.15 0.19 0.19 V
0.19 0.17 0.21 0.25 max
+
=
V
5V 4.61 4.41 4.41 4.27 4.27 V
=
R
600Ω to V
L
+
/2 4.24 4.31 4.21 4.10 min
0.30 0.50 0.50 0.63 0.63 V
0.63 0.56 0.69 0.75 max
+
=
V
15V 14.63 14.50 14.50 14.37 14.37 V
=
R
2kΩto V
L
+
/2 14.40 14.44 14.32 14.25 min
0.26 0.35 0.35 0.44 0.44 V
0.43 0.40 0.48 0.55 max
+
=
V
15V 13.90 13.35 13.35 12.92 12.92 V
=
R
600Ω to V
L
+
/2 13.02 13.15 12.76 12.60 min
0.79 1.16 1.16 1.45 1.45 V
1.42 1.32 1.58 1.75 max
Output Current Sourcing, V
+
=
V
5V 12 14 11 9 min
Sinking, V
=
0V 22 16 16 13 13 mA
O
=
5V 21 16 16 13 13 mA
O
12 14 11 9 min
Output Current Sourcing, V
+
=
V
15V 19 25 21 15 min
Sinking, V
=
0V 40 19 28 23 23 mA
O
=
13V 39 19 28 23 23 mA
O
(Note 12) 19 24 20 15 min
Supply Current All Four Amplifiers 1.5 2.2 2.2 2.7 2.7 mA
=
V
1.5V 2.9 2.6 2.9 3.0 max
O
+
=
5V, V
−
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
=
0V, V
=
CM
1.5V, V
=
2.5V and R
O
>
L
Parameter Conditions Typ
1M unless otherwise specified.
(Note 4)
=
25˚C. Boldface limits apply at the temperature extremes. V
J
LMC660AMD LMC660AI LMC660C LMC660E Units
LMC660AMJ/883
+
=
5V, V
Limit Limit Limit Limit
(Notes 4, 9) (Note 4) (Note 4) (Note 4)
Slew Rate (Note 6) 1.1 0.8 0.8 0.8 0.8 V/µs
0.5 0.6 0.7 0.4 min
Gain-Bandwidth Product 1.4 0.5 MHz
Phase Margin 50 Deg
Gain Margin 17 dB
Amp-to-Amp Isolation (Note 7) 130 dB
Input Referred Voltage Noise F=1 kHz 22
Input Referred Current Noise F=1 kHz 0.0002
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−
Page 5
AC Electrical Characteristics (Continued)
+
=
5V, V
=
D
(Note 4)
=
25˚C. Boldface limits apply at the temperature extremes. V
J
LMC660AMD LMC660AI LMC660C LMC660E Units
LMC660AMJ/883
Unless otherwise specified, all limits guaranteed for T
=
0V, V
=
1.5V, V
CM
=
O
2.5V and R
>
1M unless otherwise specified.
L
Parameter Conditions Typ
Limit Limit Limit Limit
(Notes 4, 9) (Note 4) (Note 4) (Note 4)
Total Harmonic Distortion F=10 kHz,
=
−10
A
V
=
2kΩ,
R
L
=
8V
V
O
+
=
V
15V
Note 1: Applies to both singlesupply and split supply operation. Continuous shortcircuit operation at elevated ambient temperature and/ormultiple Op Amp shorts
can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of
Note 2: Themaximum power dissipation is a function of T
−TA)/θJA.
Note 3: Absolute Maximum Ratings indicatelimits beyond which damage to the devicemay occur. Operating Ratingsindicate conditions for whichthe device is in-
tended to be functional, butdo not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 4: Typical values represent the most likely parametric norm. Limits are guaranteed by testing or correlation.
+
=
Note 5: V
+
=
Note 6: V
Note 7: Input referred. V
Note 8: Human body model, 1.5 kΩ in series with 100 pF.
Note 9: AmilitaryRETS electrical test specification is availableon request.At the time of printing,theLMC660AMJ/883 RETS spec complied fully withthe boldface
limits in this column. The LMC660AMJ/883 may also be procured to a Standard Military Drawing specification.
Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance θ
Note 11: All numbers apply for packages soldered directly into a PC board.
Note 12: Do not connect output to V
=
15V, V
15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
CM
7.5V and R
+
=
connected to 7.5V. For Sourcing tests, 7.5V ≤ VO≤ 11.5V. For Sinking tests, 2.5V ≤ VO≤ 7.5V.
L
15V and R
=
10 kΩ connected to V
L
+
when V+is greater than 13V or reliability may be adversely affected.
0.01
PP
±
, θJA, and TA. The maximum allowable power dissipation atanyambienttemperatureis P
J(max)
+
/2. Each amp excited in turn with 1 kHz to produce V
30 mA over long term may adversely affect reliability.
=
.
13 V
O
PP
=
with P
JA
D
(T
J−TA
)/θJA.
(T
−
%
J(max)
Typical Performance Characteristics V
Supply Current
vs Supply Voltage
DS008767-24
Output Characteristics
Current Sinking
DS008767-27
Offset Voltage
Output Characteristics
Current Sourcing
=
±
S
7.5V, T
=
25˚C unless otherwise specified
A
Input Bias Current
DS008767-25
DS008767-26
Input Voltage Noise
vs Frequency
DS008767-28
DS008767-29
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Page 6
Typical Performance Characteristics V
=
±
S
7.5V, T
=
25˚C unless otherwise specified (Continued)
A
CMRR vs Frequency
Open-Loop Frequency
Response
DS008767-30
Non-Inverting Large Signal
Pulse Response
DS008767-33
Note: Avoid resistive loads of less than 500Ω, as they may cause instability.
Stability vs
Capacitive Load
DS008767-31
DS008767-34
Frequency Response
vs Capacitive Load
DS008767-32
Stability vs
Capacitive Load
DS008767-35
Application Hints
Amplifier Topology
Figure 1
The topology chosen for the LMC660, shown in
unconventional (compared to general-purpose op amps) in
that thetraditional unity-gain buffer output stage is not used;
instead, theoutput is taken directly from the output of the integrator, to allow rail-to-rail output swing. Since the buffer
traditionally deliversthe powerto theload, whilemaintaining
high op amp gain and stability, and must withstand shorts to
either rail, these tasks now fall to the integrator.
As a result of these demands, the integrator is a compound
affair with anembedded gain stagethatis doubly fedforward
(via C
and Cff) by a dedicated unity-gain compensation
f
driver. In addition, the output portion of the integrator is a
push-pull configuration for delivering heavy loads. While
sinking current the whole amplifier path consists of three
gain stages with one stage fed forward, whereas while
sourcing the path contains four gain stages with two fed
forward.
www.national.com 6
,is
DS008767-4
FIGURE 1. LMC660 Circuit Topology (Each Amplifier)
The large signal voltage gain while sourcing is comparable
to traditional bipolar op amps, even with a 600Ω load. The
gain while sinking is higher than most CMOS op amps, due
to the additional gain stage; however, under heavy load
(600Ω) thegain will be reduced as indicated in the Electrical
Characteristics.
Compensating Input Capacitance
The high input resistance ofthe LMC660 op amps allowsthe
use of largefeedback andsource resistor valueswithout losing gain accuracy due to loading. However,the circuitwill be
especially sensitive to its layout when these large-value resistors are used.
Page 7
Application Hints (Continued)
Every amplifier has some capacitance between each input
and AC ground, and also some differential capacitance between the inputs. When the feedback network around an
amplifier is resistive, this input capacitance (along with any
additional capacitance due to circuit board traces, the
socket, etc.) and the feedback resistors create a pole in the
feedback path. Inthe following GeneralOperationalAmplifier
circuit,
Figure 2
the frequency of this pole is
where CSis the total capacitance at the inverting input, including amplifierinput capcitanceand anystray capacitance
from the IC socket (ifone is used), circuit board traces, etc.,
and R
is the parallel combination of RFand RIN. This for-
P
mula, as well as all formulae derived below, apply to inverting and non-inverting op-amp configurations.
When the feedback resistors are smaller than a few kΩ, the
frequency of the feedback pole will be quite high,since C
generally less than 10 pF. If the frequency of the feedback
pole is much higher than the “ideal” closed-loop bandwidth
(the nominal closed-loop bandwidth in the absence of C
the polewill havea negligibleeffect onstability,as itwill add
only a small amount of phase shift.
However,if thefeedback pole isless thanapproximately 6 to
10 times the “ideal” −3 dB frequency, a feedback capacitor,
C
, should be connected betweenthe output and the invert-
F
ing input of the op amp. This condition can also be stated in
terms of the amplifier’s low-frequency noise gain: To maintain stability a feedback capacitor will probably be needed if
where
is the amplifier’s low-frequency noise gain and GBW is the
amplifier’s gain bandwidth product. An amplifier’s lowfrequency noise gain is represented by the formula
regardless ofwhether theamplifier isbeing usedin inverting
or non-inverting mode. Note that a feedback capacitor is
more likely to be needed when the noise gain is low and/or
the feedback resistor is large.
If the above condition ismet (indicatinga feedback capacitor
will probably be needed), and the noise gain is large enough
that:
the following value of feedback capacitor is recommended:
S
S
the feedback capacitor should be:
Note that these capacitor values are usually significant
smaller than those given bythe older, more conservative formula:
is
),
CSconsists of the amplifier’s input capacitance plus any stray capacitance
from the circuit board and socket. CFcompensates for the pole caused by
CSand the feedback resistors.
DS008767-6
FIGURE 2. General Operational Amplifier Circuit
Using the smaller capacitors will give much higher bandwidth with little degradation of transient response. It may be
necessary in any of the above cases to use a somewhat
larger feedback capacitor to allow for unexpected stray capacitance, or totolerate additional phaseshifts in theloop, or
excessive capacitiveload, or to decrease the noise or bandwidth, or simply because the particular circuit implementation needs more feedback capacitance to be sufficiently
stable. For example, a printed circuit board’s stray capacitance may be larger orsmaller thanthe breadboard’s, so the
actual optimum value for C
estimated using the breadboard. In most cases, the values
of C
should be checked on the actual circuit, starting with
F
the computed value.
may be different from the one
F
Capacitive Load Tolerance
Like many other op amps, the LMC660 may oscillate when
its applied load appears capacitive.The threshold of oscillation varies both with load and circuit gain. The configuration
most sensitive to oscillation is a unity-gain follower. See
Typical Performance Characteristics.
The load capacitance interacts with the op amp’s output resistance to create an additional pole. If this polefrequency is
sufficiently low, itwill degrade the op amp’s phase margin so
that the amplifier is no longer stable at low gains.As shown
in
Figure 3
, the addition of a small resistor (50Ω to 100Ω)in
series with the op amp’s output, and a capacitor (5 pF to
10 pF) from inverting input to output pins, returns the phase
margin to a safe value without interfering with lowerfrequency circuit operation. Thus larger values of capacitance can be tolerated without oscillation. Note that in all
cases, the output will ring heavily whenthe loadcapacitance
is near the threshold for oscillation.
If
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Page 8
Application Hints (Continued)
DS008767-5
FIGURE 3. Rx, Cx Improve Capacitive Load Tolerance
Capacitive load drivingcapability isenhanced by usinga pull
up resistor to V
ducting 500 µA or more will significantly improve capacitive
load responses. Thevalue ofthe pull up resistor mustbe determined based onthe current sinkingcapability of theamplifier withrespect to the desired output swing. Open loop gain
of the amplifier can also be affected by the pull up resistor
(see Electrical Characteristics).
FIGURE 4. Compensating for Large Capacitive Loads
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuitwhich mustoperate
with less than 1000 pA of leakage current requires special
layout ofthe PCboard. Whenone wishesto take advantage
of the ultra-low bias current of the LMC662, typically less
than 0.04 pA, it is essential to have an excellent layout. Fortunately, the techniques for obtaining low leakages are quite
simple. First, the user mustnot ignore the surface leakageof
the PC board,even though itmay sometimes appearacceptably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC660’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs. See
5
. To have a significant effect, guard rings should be placed
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage asthe amplifier inputs, since no leakage current can
flow betweentwo points at the same potential. For example,
a PC board trace-to-pad resistance of 10
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of an input. This
would cause a100 times degradationfrom the LMC660’sactual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current, or perhaps a minor
(2:1) degradation of the amplifier’s performance. See
6a
,
Figure 6b,Figure 6c
+
(
Figure 4
). Typically a pull up resistor con-
DS008767-23
with a Pull Up Resistor
for typical connections of guard
12
Ω, which is nor-
11
Ω would
Figure
Figure
rings for standard op-amp configurations. If both inputs are
active and at high impedance, the guard can be tied to
ground and still provide some protection; see
Figure 6d
DS008767-16
.
FIGURE 5. Example, using the LMC660,
of Guard Ring in P.C. Board Layout
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Page 9
Application Hints (Continued)
struction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See
7
.
Figure
DS008767-17
(a) Inverting Amplifier
DS008767-18
(b) Non-Inverting Amplifier
DS008767-19
(c) Follower
DS008767-20
(d) Howland Current Pump
FIGURE 6. Guard Ring Connections
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all,but bend itup inthe air anduse only airas an insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board con-
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
DS008767-21
FIGURE 7. Air Wiring
BIAS CURRENT TESTING
Figure 8
The test method of
is appropriate for bench-testing
bias currentwith reasonableaccuracy. Tounderstand its operation, first close switch S2 momentarily. When S2 is
opened, then
DS008767-22
FIGURE 8. Simple Input Bias Current Test Circuit
A suitable capacitor for C2 would bea5pFor10pFsilver
mica, NPO ceramic, or air-dielectric. When determining the
magnitude of I
must be taken into account.Switch S2should be left shorted
−, the leakage of the capacitor and socket
b
most of the time, or else the dielectric absorption of the capacitor C2 could cause errors.
Similarly, if S1 is shorted momentarily (while leaving S2
shorted)
where Cxis the stray capacitance at the + input.
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Page 10
Typical Single-Supply Applications (V
Additional single-supply applications ideas can be found in
the LM324datasheet. The LMC660 ispin-for-pin compatible
with the LM324and offers greaterbandwidth and input resistance over the LM324. These features will improve the performance of many existing single-supply applications. Note,
however, that the supply voltage range of the LMC660 is
smaller than that of the LM324.
Low-Leakage Sample-and-Hold
+
=
5.0 VDC)
Sine-Wave Oscillator
DS008767-7
Instrumentation Amplifier
DS008767-8
If R1=R5, R3=R6, and R4=R7; then
∴
AV≈100 for circuit shown.
For good CMRR over temperature,low drift resistors should
be used. Matching of R3 to R6 and R4 to R7 affect CMRR.
Gain may be adjusted through R2. CMRR may be adjusted
through R7.
DS008767-9
Oscillator frequency is determined by R1, R2, C1, and C2:
fosc=1/2πRC, where R=R1=R2 and
C=C1=C2.
This circuit, as shown, oscillates at 2.0 kHz with a peak-topeak output swing of 4.5V.
1 Hz Square-Wave Oscillator
DS008767-10
Power Amplifier
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DS008767-11
Page 11
Typical Single-Supply Applications
+
=
(V
5.0 VDC) (Continued)
10 Hz Bandpass Filter
1 Hz Low-Pass Filter
(Maximally Flat, Dual Supply Only)
=
f
10 Hz
O
Q=2.1
Gain=−8.8
=
f
10 Hz
c
d=0.895
Gain=1
2 dB passband ripple
10 Hz High-Pass Filter
DS008767-12
DS008767-13
=
f
1Hz
c
d=1.414
Gain=1.57
DS008767-14
High Gain Amplifier with Offset
Voltage Reduction
Gain=−46.8
Output offset voltage reduced to the level of the input offset voltage of the
bottom amplifier (typically 1 mV).
DS008767-15
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Page 12
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Hermetic Dual-In-Line Package (D)
Order Number LMC660AMD
NS Package Number D14E
14-Lead Ceramic Dual-In-Line Pkg. (J)
Order Number LMC660AMJ/883
NS Package Number J14A
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Page 13
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Order Number LMC660AIM, LMC660CM or LMC660EM
Small Outline Dual-In-Line Pkg. (M)
NS Package Number M14A
Molded Dual-In-Line Pkg. (N)
Order Number LMC660AIN, LMC660CN or LMC660EN
NS Package Number N14A
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Page 14
LMC660 CMOS Quad Operational Amplifier
Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
labeling, can be reasonably expected to result in a
significant injury to the user.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are impliedand National reserves the right at any time without notice to change said circuitry and specifications.
National Semiconductor
Europe
Fax: +49 (0) 1 80-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 1 80-530 85 85
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