Page 1
LMC6492 Dual/LMC6494 Quad
CMOS Rail-to-Rail Input and Output Operational
Amplifier
LMC6492 Dual/LMC6494 Quad CMOS Rail-to-Rail Input and Output Operational Amplifier
October 1994
General Description
The LMC6492/LMC6494 amplifiers were specifically developed for single supply applications that operate from −40˚C
to +125˚C. Thisfeatureiswell-suited for automotive systems
because of the wide temperature range. A unique design topology enables the LMC6492/LMC6494 common-mode voltage range to accommodate input signals beyond the rails.
This eliminates non-linear output errors due to input signals
exceeding a traditionally limited common-mode voltage
range. The LMC6492/LMC6494 signal range has a high
CMRR of 82 dB for excellent accuracy in non-inverting circuit
configurations.
The LMC6492/LMC6494 rail-to-rail input is complemented
by rail-to-rail output swing. This assures maximum dynamic
signal range which is particularly important in 5V systems.
Ultra-low input current of 150 fA and 120 dB open loop gain
provide high accuracy and direct interfacing with high impedance sources.
Connection Diagrams
8-Pin DIP/SO
Features
(Typical unless otherwise noted)
n Rail-to-Rail input common-mode voltage range,
guaranteed over temperature
n Rail-to-Rail output swing within 20 mV of supply rail,
100 kΩ load
n Operates from 5V to 15V supply
n Excellent CMRR and PSRR 82 dB
n Ultra low input current 150 fA
n High voltage gain (R
n Low supply current (
n Low offset voltage drift 1.0 µV/˚C
=
100 kΩ) 120 dB
L
=
@
V
5V) 500 µA/Amplifier
S
Applications
n Automotive transducer amplifier
n Pressure sensor
n Oxygen sensor
n Temperature sensor
n Speed sensor
14-Pin DIP/SO
DS012049-1
Top View
DS012049-2
Top View
© 1999 National Semiconductor Corporation DS012049 www.national.com
Page 2
Ordering Information
Package
8-Pin Small Outline LMC6492AEM Rails M08A
8-Pin Molded DIP LMC6492AEN Rails N08A
14-Pin Small Outline LMC6494AEM Rails M14A
14-Pin Molded DIP LMC6494AEN Rails N14A
Temperature Range Transport
Extended −40˚C to +125˚C
LMC6492BEM
LMC6492AEMX Tape and Reel
LMC6492BEMX
LMC6492BEN
LMC6494BEM
LMC6494AEMX Tape and Reel
LMC6494BEMX
LMC6494BEN
Media
NSC
Drawing
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Page 3
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2) 2000V
Differential Input Voltage
Voltage at Input/Output Pin (V
Supply Voltage (V
+−V−
) 16V
Current at Input Pin
Current at Output Pin (Note 3)
Current at Power Supply Pin 40 mA
Lead Temp. (Soldering, 10 sec.) 260˚C
Storage Temperature Range −65˚C to +150˚C
±
Supply Voltage
+
) + 0.3V, (V−) − 0.3V
±
5mA
±
30 mA
Junction Temperature (Note 4) 150˚C
Operating Conditions (Note 1)
Supply Voltage 2.5V ≤ V
Junction Temperature Range
LMC6492AE, LMC6492BE −40˚C ≤ T
LMC6494AE, LMC6494BE −40˚C ≤ T
Thermal Resistance (θ
)
JA
N Package, 8-Pin Molded DIP 108˚C/W
M Package, 8-Pin Surface Mount 171˚C/W
N Package, 14-Pin Molded DIP 78˚C/W
M Package, 14-Pin Surface Mount 118˚C/W
+
≤ 15.5V
≤ +125˚C
J
≤ +125˚C
J
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
face limits apply at the temperature extremes
=
J
25˚C, V
+
=
5V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
1MΩ.Bold-
L
LMC6492AE LMC6492BE
Symbol Parameter Conditions Typ LMC6494AE LMC6494BE Units
(Note 5) Limit Limit
(Note 6) (Note 6)
V
OS
Input Offset Voltage 0.11 3.0 6.0 mV
3.8 6.8 max
TCV
Input Offset Voltage 1.0 µV/˚C
OS
Average Drift
I
B
I
OS
R
IN
C
IN
Input Bias Current (Note 11) 0.15 200 200 pA max
Input Offset Current (Note 11) 0.075 100 100 pA max
Input Resistance
>
10 Tera Ω
Common-Mode 3 pF
Input Capacitance
CMRR Common-Mode 0V ≤ V
Rejection Ratio V
0V ≤ V
≤ 15V 82 65 63 dB
CM
+
=
15V 60 58
≤ 5V 82 65 63
CM
min
60 58
+PSRR Positive Power Supply 5V ≤ V
Rejection Ratio V
−PSRR Negative Power Supply 0V ≤ V
Rejection Ratio V
V
CM
Input Common-Mode V
+
≤ 15V, 82 65 63 dB
=
2.5V 60 58 min
O
−
≤ −10V, 82 65 63 dB
=
2.5V 60 58 min
O
+
=
5V and 15V V
−
−0.3 −0.25 −0.25 V
Voltage Range For CMRR ≥ 50 dB 00max
+
V
+ 0.3 V++ 0.25 V++ 0.25 V
A
V
Large Signal Voltage Gain R
=
2kΩ: Sourcing 300 V/mV
L
+
V
+
V
min
(Note 7) Sinking 40 min
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Page 4
DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
face limits apply at the temperature extremes
=
J
25˚C, V
+
Symbol Parameter Conditions Typ LMC6494AE LMC6494BE Units
+
V
O
I
SC
Output Swing V
Output Short Circuit Current Sourcing, V
V
I
SC
Output Short Circuit Current Sourcing, V
V
I
S
Supply Current LMC6492 1.0 1.75 1.75 mA
+
=
5V Sinking, V
+
=
15V Sinking, V
=
5V 4.9 4.8 4.8 V
=
R
2kΩto V
L
+
=
V
5V 4.7 4.5 4.5 V
=
R
600Ω to V
L
+
=
V
15V 14.7 14.4 14.4 V
=
R
2kΩto V
L
+
=
V
15V 14.1 13.4 13.4 V
=
R
600Ω to V
L
(Note 8)
+
=
V
+5V, V
+
/2 4.7 4.7 min
+
/2 4.24 4.24 min
+
/2 14.0 14.0 min
+
/2 13.0 13.0 min
=
0V 25 16 16
O
=
5V 22 11 11
O
=
0V 30 28 28
O
=
5V
O
+
=
/2 2.1 2.1 max
V
O
LMC6492 1.3 1.95 1.95 mA
V
+
=
+15V, V
+
=
/2 2.3 2.3 max
V
O
LMC6494 2.0 3.5 3.5 mA
+
=
V
+5V, V
+
=
/2 4.2 4.2 max
V
O
LMC6494 2.6 3.9 3.9 mA
V
+
=
+15V, V
+
=
/2 4.6 4.6 max
V
O
=
5V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
LMC6492AE LMC6492BE
(Note 5) Limit Limit
(Note 6) (Note 6)
0.1 0.18 0.18 V
0.24 0.24 max
0.3 0.5 0.5 V
0.65 0.65 max
0.16 0.35 0.35 V
0.5 0.5 max
0.5 1.0 1.0 V
1.5 1.5 max
10 10
88
20 20
30 30 30
22 22
>
1MΩ.Bold-
L
mA
min
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Page 5
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
face limits apply at the temperature extremes
=
J
25˚C, V
+
=
5V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
1MΩ.Bold-
L
LMC6492AE LMC6492BE
Symbol Parameter Conditions Typ LMC6494AE LMC6494BE Units
(Note 5) Limit Limit
(Note 6) (Note 6)
SR Slew Rate (Note 9) 1.3 0.7 0.7 Vµs min
0.5 0.5
+
=
GBW Gain-Bandwidth Product V
φ
m
G
m
Phase Margin 50 Deg
Gain Margin 15 dB
15V 1.5 MHz
Amp-to-Amp Isolation (Note 10) 150 dB
e
n
i
n
Input-Referred F=1 kHz
Voltage Noise V
=
1V
CM
Input-Referred F=1 kHz
37
0.06
Current Noise
=
T.H.D. Total Harmonic
Distortion
F=1 kHz, A
=
R
10 kΩ,V
L
F=10 kHz, A
=
R
10 kΩ,V
L
+
=
V
10V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩ in series with 100 pF.
Note 3: Applies to both single-supply and split-supply operation. Continuous short operation at elevated ambient temperature can result in exceeding the maximum
allowed junction temperature at 150˚C. Output currents in excess of
Note 4: The maximum power dissipation is a function of T
−TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
+
Note 7: V
Note 8: Do not short circuit output to V
Note 9: V
Note 10: Input referred, V
Note 11: Guaranteed limits are dictated by tester limits and not device performance. Actual performance is reflected in the typical value.
=
+
=
=
15V, V
15V. Connected as voltage follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
CM
7.5V and R
+
connected to 7.5V. For Sourcing tests, 7.5V ≤ VO≤ 11.5V. For Sinking tests, 3.5V ≤ VO≤ 7.5V.
L
+
, when V+is greater than 13V or reliability will be adversely affected.
=
15V and R
=
L
J(max)
100 kΩ connected to 7.5V. Each amp excited in turn with 1 kHz to produce V
−2 0.01
V
=
−4.1 V
O
V
O
±
, θJAand TA. The maximum allowable power dissipation at any ambient temperature is P
PP
=
−2
=
8.5 V
PP
30 mA over long term may adversely affect reliability.
0.01
=
.
12 V
O
PP
%
=
(T
D
J(max)
Typical Performance Characteristics V
specified
Supply Current vs
Supply Voltage
DS012049-25
Input Current vs
Temperature
=
+15V, Single Supply, T
S
DS012049-26
=
25˚C unless otherwise
A
Sourcing Current vs
Output Voltage
DS012049-27
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Page 6
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Sourcing Current vs
Output Voltage
Sinking Current vs
Output Voltage
DS012049-28
DS012049-31
Sourcing Current vs
Output Voltage
Sinking Current vs
Output Voltage
DS012049-29
DS012049-32
Sinking Current vs
Output Voltage
DS012049-30
Output Voltage Swing vs
Supply Voltage
DS012049-33
Input Voltage Noise
vs Frequency
DS012049-34
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Input Voltage Noise
vs Input Voltage
DS012049-35
Input Voltage Noise
vs Input Voltage
DS012049-36
Page 7
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Input Voltage Noise
vs Input Voltage
Positive PSRR
vs Frequency
CMRR vs
Input Voltage
DS012049-37
DS012049-40
Crosstalk Rejection
vs Frequency
Negative PSRR
vs Frequency
CMRR vs
Input Voltage
DS012049-38
DS012049-41
Crosstalk Rejection
vs Frequency
DS012049-39
CMRR vs
Frequency
DS012049-42
CMRR vs
Input Voltage
DS012049-43
DS012049-44
DS012049-45
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Page 8
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
∆V
OS
vs CMR
Input Voltage vs
Output Voltage
Open Loop Frequency
Response vs Temperature
DS012049-46
DS012049-49
∆V
OS
vs CMR
Open Loop
Frequency Response
Maximum Output Swing
vs Frequency
DS012049-47
DS012049-50
Input Voltage vs
Output Voltage
DS012049-48
Open Loop
Frequency Response
DS012049-51
Gain and Phase vs
Capacitive Load
DS012049-52
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DS012049-53
DS012049-54
Page 9
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Gain and Phase vs
Capacitive Load
Slew Rate vs
Supply Voltage
Non-Inverting Large
Signal Pulse Response
DS012049-55
DS012049-58
Open Loop Output
Impedance vs Frequency
Non-Inverting Large
Signal Pulse Response
Non-Inverting Small
Signal Pulse Response
DS012049-56
DS012049-59
Open Loop Output
Impedance vs Frequency
DS012049-57
Non-Inverting Large
Signal Pulse Response
DS012049-60
Non-Inverting Small
Signal Pulse Response
DS012049-61
DS012049-62
DS012049-63
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Page 10
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Non-Inverting Small
Signal Pulse Response
Inverting Large Signal
Pulse Response
Inverting Small Signal
Pulse Response
DS012049-64
DS012049-67
Inverting Large
Signal Pulse Response
Inverting Small Signal
Pulse Response
Stability vs
Capacitive Load
DS012049-65
DS012049-68
Inverting Large Signal
Pulse Response
DS012049-66
Inverting Small Signal
Pulse Response
DS012049-69
Stability vs
Capacitive Load
DS012049-70
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DS012049-71
DS012049-72
Page 11
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Stability vs
Capacitive Load
DS012049-73
Stability vs
Capacitive Load
Stability vs
Capacitive Load
DS012049-76
Application Notes
Input Common-Mode Voltage Range
Unlike Bi-FET amplifier designs, the LMC6492/4 does not
exhibit phase inversion when an input voltage exceeds the
negative supply voltage.
ceeding both supplies with no resulting phase inversion on
the output.
Figure 1
shows an input voltage ex-
Stability vs
Capacitive Load
DS012049-74
ceeding this absolute maximum rating, as in
DS012049-75
Figure 2
, can
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
DS012049-8
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6492/4 Power Supply Voltages with
No Output Phase Inversion
The absolute maximum input voltage is 300 mV beyond either supply rail at room temperature. Voltages greatly ex-
DS012049-9
FIGURE 2. A±7.5V Input Signal Greatly
Exceeds the 5V Supply in
No Phase Inversion Due to R
Figure 3
Causing
I
Applications that exceed this rating must externally limit the
±
maximum input current to
as shown in
Figure 3
5 mA with an input resistor (RI)
.
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Page 12
Application Notes (Continued)
DS012049-10
FIGURE 3. RIInput Current Protection for
Voltages Exceeding the Supply Voltages
Rail-To-Rail Output
The approximate output resistance of the LMC6492/4 is
110Ω sourcing and 80Ω sinking at V
lated output resistance, maximum output voltage swing can
be esitmated as a function of load.
Compensating for Input Capacitance
It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the
LMC6492/4.
Although the LMC6492/4 is highly stable over a wide range
of operating conditions, certain precautions must be met to
achieve the desired pulse response when a large feedback
resistor is used. Large feedback resistors with even small
values of input capacitance, due to transducers, photodiodes, and circuit board parasitics, reduce phase margins.
When high input impedances are demanded, guarding of the
LMC6492/4 is suggested. Guarding input lines will not only
reduce leakage, but lowers stray input capacitance as well.
(See
Printed-Circuit-Board Layout for High Impedance
Work
).
The effect of input capacitance can be compensated for by
adding a capacitor, C
Figure 1
) such that:
, around the feedback resistors (as in
f
or
R
1CIN
Since it is often difficult to know the exact value of CIN,Cfcan
be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and LMC662 for a
more detailed discussion on compensating for input
capacitance.
FIGURE 4. Cancelling the Effect of Input Capacitance
≤ R2C
s
f
=
5V.Using the calcu-
DS012049-11
Capacitive Load Tolerance
All rail-to-rail output swing operational amplifiers have voltage gain in the output stage. A compensation capacitor is
normally included in this integrator stage. The frequency location of the dominant pole is affected by the resistive load
on the amplifier. Capacitive load driving capability can be optimized by using an appropriate resistive load in parallel with
the capacitive load (see Typical Curves).
Direct capacitive loading will reduce the phase margin of
many op-amps. A pole in the feedback loop is created by the
combination of the op-amp’s output impedance and the capacitive load. This pole induces phase lag at the unity-gain
crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in
Figure 5
.
DS012049-12
FIGURE 5. LMC6492/4 Noninverting Amplifier,
Compensated to Handle Capacitive Loads
Printed-Circuit-Board Layout
for High-Impedance Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6492/4, typically
150 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6492/4’s inputs and
the terminals of components connected to the op-amp’s inputs, as in
Figure 6
. To have a significant effect, guard rings
should be placed on both the top and bottom of the PC
board. This PC foil must then be connected to a voltage
which is at the same voltage as the amplifier inputs, since no
leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of
12
10
Ω, which is normally considered a very large resistance,
could leak 5 pAif the trace were a 5V bus adjacent to the pad
of the input.
This would cause a 33 times degradation from the
LMC6492/4’s actual performance. If a guard ring is used and
held within 5 mV of the inputs, then the same resistance of
11
10
Ω will only cause 0.05 pA of leakage current. See
7
for typical connections of guard rings for standard op-amp
Figure
configurations.
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Page 13
Application Notes (Continued)
DS012049-13
FIGURE 6. Examples of Guard
Ring in PC Board Layout
DS012049-14
Inverting Amplifier
DS012049-15
Non-Inverting Amplifier
DS012049-16
Follower
FIGURE 7. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See
8
.
Figure
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board).
DS012049-17
FIGURE 8. Air Wiring
Application Circuits
DC Summing Amplifier (V
=
Where: V
(V1+V2≥(V3+V4) to keep V
V
0
1+V2−V3–V4
IN
>
0V
0
DC
≥ 0VDCand VO≥ V
DS012049-18
DC
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Page 14
Application Circuits (Continued)
High Input Z, DC Differential Amplifier
Rail-to-Rail Single Supply Low Pass Filter
DS012049-22
For
(CMRR depends on this resistor ratio match)
As shown: V
=
)
2(V
O
2−V1
Photo Voltaic-Cell Amplifier
Instrumentation Amplifier
DS012049-19
DS012049-20
This low-pass filter circuit can be used as an anti-aliasing filter with the same supply as the A/D converter. Filter designs
can also take advantage of the LMC6492/4 ultra-low input
current. The ultra-low input current yields negligible offset error even when large value resistors are used. This in turn allows the use of smaller valued capacitors which take less
board space and cost less.
Low Voltage Peak Detector with Rail-to-Rail Peak
Capture Range
DS012049-23
Dielectric absorption and leakage is minimized by using a
polystyrene or polypropylene hold capacitor. The droop rate
is primarily determined by the value of C
current. Select low-leakage current diodes to minimize
and diode leakage
H
drooping.
Pressure Sensor
If R1=R5, R3=R6, and R4=R7; then
∴
AV≈ 100 for circuit shown (R
www.national.com 14
=
9.3k).
2
DS012049-21
=
R
Rx
f
>>
R1, R2, R3, and R4
R
f
DS012049-24
In a manifold absolute pressure sensor application, a strain
gauge is mounted on the intake manifold in the engine unit.
Manifold pressure causes the sensing resistors, R1, R2, R3
Page 15
Application Circuits (Continued)
and R4 to change. The resistors change in a way such that
R2 and R4 increase by the same amount R1 and R3 decrease. This causes a differential voltage between the input
of the amplifier. The gain of the amplifier is adjusted by R
Spice Macromodel
A spice macromodel is available for the LMC6492/4. This
model includes accurate simulation of:
Input common-model voltage range
•
Frequency and transient response
•
GBW dependence on loading conditions
•
Quiescent and dynamic supply current
•
Output swing dependence on loading conditions
•
.
f
and many other characteristics as listed on the macromodel
disk.
Contact your local National Semiconductor sales office to
obtain an operational amplifier spice model library disk.
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Page 16
Physical Dimensions inches (millimeters) unless otherwise noted
8-Pin Small Outline Package
Order Number LMC6492AEM or LMC6492BEM
NS Package Number M08A
14-Pin Small Outline Package
Order Number LMC6494AEM or LMC6494BEM
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NS Package Number M14A
Page 17
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead (0.300" Wide) Molded Dual-In-Line Package
Order Number LMC6492AEN or LMC6492BEN
NS Package Number N08A
14-Lead Molded Dual-In-Line Package
Order Number LMC6494AEN or LMC6494BEN
NS Package Number N14A
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Page 18
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
LMC6492 Dual/LMC6494 Quad CMOS Rail-to-Rail Input and Output Operational Amplifier
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
www.national.com
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Email: europe.support@nsc.com
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Response Group
Tel: 65-2544466
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Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
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