Page 1
查询LMC6484供应商
LMC6484
CMOS Quad Rail-to-Rail Input and Output Operational
Amplifier
LMC6484 CMOS Quad Rail-to-Rail Input and Output Operational Amplifier
May 1999
General Description
The LMC6484 provides a common-mode range that extends
to both supply rails. This rail-to-rail performance combined
with excellent accuracy, due to a high CMRR, makes it
unique among rail-to-rail input amplifiers.
It is ideal for systems, such as data acquisition, that require
a large input signal range. The LMC6484 is also anexcellent
upgrade for circuits using limited common-mode range amplifiers such as the TLC274 and TLC279.
Maximum dynamic signal range is assured in low voltage
and single supply systems by the LMC6484’s rail-to-rail output swing.TheLMC6484’srail-to-railoutput swing is guaranteed for loads down to 600Ω.
Guaranteed low voltage characteristics and low power dissipation make the LMC6484 especially well-suited for
battery-operated systems.
See the LMC6482 data sheet for a Dual CMOS operational
amplifier with these same features.
3V Single Supply Buffer Circuit
Rail-to-Rail Input
Features
(Typical unless otherwise noted)
n Rail-to-Rail Input Common-Mode Voltage Range
(Guaranteed Over Temperature)
n Rail-to-Rail Output Swing (within 20 mV of supply rail,
100 kΩ load)
n Guaranteed 3V, 5V and 15V Performance
n Excellent CMRR and PSRR: 82 dB
n Ultra Low Input Current: 20 fA
n High Voltage Gain (R
n Specified for 2 kΩ and 600Ω loads
=
500 kΩ): 130 dB
L
Applications
n Data Acquisition Systems
n Transducer Amplifiers
n Hand-held Analytic Instruments
n Medical Instrumentation
n Active Filter, Peak Detector, Sample and Hold, pH
Meter, Current Source
n Improved Replacement for TLC274, TLC279
Rail-to-Rail Output
DS011714-1
DS011714-2
© 1999 National Semiconductor Corporation DS011714 www.national.com
DS011714-3
Page 2
Connection Diagram
Ordering Information
Package Temperature Range NSC
14-pin LMC6484MN LMC6484AIN N14A Rail
Molded DIP LMC6484IN
14-pin LMC6484AIM M14A Rail
Small Outline LMC6484IM Tape and
14-pin Ceramic
DIP
14-pin
Ceramic SOIC
DS011714-4
Military Industrial
−55˚C to +125˚C −40˚C to +85˚C
LMC6484AMJ/883 J14A Rail
LMC6484AMWG/883 WG14A Tray
Drawing
Transport
Media
Reel
www.national.com 2
Page 3
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2) 2.0 kV
Differential Input Voltage
Voltage at Input/Output Pin (V
Supply Voltage (V
+−V−
) 16V
Current at Input Pin (Note 12)
Current at Output Pin
(Notes 3, 8)
Current at Power Supply Pin 40 mA
Lead Temp. (Soldering, 10 sec.) 260˚C
±
Supply Voltage
+
) + 0.3V, (V−) − 0.3V
±
5mA
±
30 mA
Storage Temperature Range −65˚C to +150˚C
Junction Temperature (Note 4) 150˚C
Operating Ratings (Note 1)
Supply Voltage 3.0V ≤ V
Junction Temperature Range
LMC6484AM −55˚C ≤ T
LMC6484AI, LMC6484I −40˚C ≤ T
Thermal Resistance (θ
)
JA
N Package, 14-Pin Molded DIP 70˚C/W
M Package, 14-Pin
Surface Mount 110˚C/W
+
≤ 15.5V
≤ +125˚C
J
≤ +85˚C
J
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
limits apply at the temperature extremes.
=
J
25˚C, V
+
=
5V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
1M. Boldface
L
Typ LMC6484AI LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
V
Input Offset Voltage 0.110 0.750 3.0 3.0 mV
OS
1.35 3.7 3.8 max
TCV
Input Offset Voltage 1.0 µV/˚C
OS
Average Drift
I
I
C
Input Current (Note 13) 0.02 4.0 4.0 100 pA max
B
Input Offset Current (Note 13) 0.01 2.0 2.0 50 pA max
OS
Common-Mode 3 pF
IN
Input Capacitance
R
IN
Input Resistance
CMRR Common Mode 0V ≤ V
+
=
Rejection Ratio V
15V 67 62 60
0V ≤ V
+
=
V
5V 67 62 60
+PSRR Positive Power Supply 5V ≤ V
−
Rejection Ratio V
=
0V, V
−PSRR Negative Power Supply −5V ≤ V
+
Rejection Ratio V
V
Input Common-Mode V
CM
=
0V, V
+
=
5V and 15V V
≤ 15.0V, 82 70 65 65 dB
CM
≤ 5.0V 82 70 65 65
CM
+
≤ 15V, 82 70 65 65 dB
=
2.5V 67 62 60 min
O
−
≤ −15V, 82 70 65 65 dB
=
−2.5V 67 62 60 min
O
>
10 Tera Ω
−
− 0.3 −0.25 −0.25 −0.25 V
min
Voltage Range For CMRR ≥ 50 dB 000max
+
V
+ 0.3 V++ 0.25 V++ 0.25 V++ 0.25 V
A
Large Signal R
V
=
2kΩ Sourcing 666 140 120 120 V/mV
L
+
V
+
V
+
V
min
Voltage Gain (Notes 7, 13) 84 72 60 min
Sinking 75 35 35 35 V/mV
20 20 18 min
=
R
600Ω Sourcing 300 80 50 50 V/mV
L
(Notes 7, 13) 48 30 25 min
Sinking 35 20 15 15 V/mV
13 10 8 min
www.national.com3
Page 4
DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
limits apply at the temperature extremes.
=
J
25˚C, V
+
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
+
V
I
Output Swing V
O
Output Short Circuit Sourcing, V
SC
=
5V 4.9 4.8 4.8 4.8 V
=
R
2kΩto V
L
+
=
V
5V 4.7 4.5 4.5 4.5 V
=
R
600Ω to V
L
+
=
V
15V 14.7 14.4 14.4 14.4 V
=
R
2kΩto V
L
+
=
V
15V 14.1 13.4 13.4 13.4 V
=
R
600Ω to V
L
+
/2 4.7 4.7 4.7 min
+
/2 4.24 4.24 4.24 min
+
/2 14.2 14.2 14.2 min
+
/2 13.0 13.0 13.0 min
=
0V 20 16 16 16 mA
O
Current 12 12 10 min
V+=5V Sinking, V
I
Output Short Circuit Sourcing, V
SC
=
5V 15 11 11 11 mA
O
=
0V 30 28 28 28 mA
O
Current 22 22 20 min
+
=
V
15V Sinking, V
=
12V 30 30 30 30 mA
O
(Note 8) 24 24 22 min
I
Supply Current All Four Amplifiers 2.0 2.8 2.8 2.8 mA
S
+
=
V
+5V, V
+
=
/2 3.6 3.6 3.8 max
V
O
All Four Amplifiers 2.6 3.0 3.0 3.0 mA
V
+
=
+15V, V
+
=
/2 3.8 3.8 4.0 max
V
O
=
5V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
1M. Boldface
L
Typ LMC6484AI LMC6484I LMC6484M
(Note 6) (Note 6) (Note 6)
0.1 0.18 0.18 0.18 V
0.24 0.24 0.24 max
0.3 0.5 0.5 0.5 V
0.65 0.65 0.65 max
0.16 0.32 0.32 0.32 V
0.45 0.45 0.45 max
0.5 1.0 1.0 1.0 V
1.3 1.3 1.3 max
9.5 9.5 8.0 min
AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
limits apply at the temperature extremes.
=
J
25˚C, V
+
=
5V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
1M. Boldface
L
Typ LMC6484A LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 9) 1.3 1.0 0.9 0.9 V/µs
0.7 0.63 0.54 min
+
=
GBW Gain-Bandwidth Product V
φ
G
Phase Margin 50 Deg
m
Gain Margin 15 dB
m
15V 1.5 MHz
Amp-to-Amp Isolation (Note 10) 150 dB
e
i
n
Input-Referred f=1 kHz 37
n
Voltage Noise V
=
1V
CM
Input-Referred f=1 kHz 0.03
Current Noise
www.national.com 4
Page 5
AC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
limits apply at the temperature extremes.
=
J
25˚C, V
+
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
=
T.H.D. Total Harmonic Distortion f=1 kHz, A
=
R
10 kΩ,V
L
f=10 kHz, A
=
R
10 kΩ,V
L
+
=
V
10V
−2 0.01
V
=
4.1 V
O
V
O
PP
=
−2
=
8.5 V
PP
=
5V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
L
Typ LMC6484A LMC6484I LMC6484M
(Note 6) (Note 6) (Note 6)
0.01
>
1M. Boldface
%
%
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
=
J
25˚C, V
+
=
3V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
1M
L
Typ LMC6484AI LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
V
Input Offset Voltage 0.9 2.0 3.0 3.0 mV
OS
2.7 3.7 3.8 max
TCV
Input Offset Voltage 2.0 µV/˚C
OS
Average Drift
I
B
I
OS
CMRR Common Mode 0V ≤ V
Input Bias Current 0.02 pA
Input Offset Current 0.01 pA
≤ 3V 74 64 60 60 dB
CM
Rejection Ratio min
PSRR Power Supply 3V ≤ V
+
≤ 15V, V
−
=
0V 80 68 60 60 dB
Rejection Ratio min
V
Input Common-Mode For CMRR ≥ 50 dB V−− 0.25 0 0 0 V
CM
Voltage Range max
+
V
+ 0.25 V
+
+
V
+
V
V
min
V
Output Swing R
O
=
L
2kΩto V
+
/2 2.8 V
0.2 V
R
L
=
600Ω to V
+
/2 2.7 2.5 2.5 2.5 V
min
0.37 0.6 0.6 0.6 V
max
I
S
Supply Current All Four Amplifiers 1.65 2.5 2.5 2.5 mA
3.0 3.0 3.2 max
AC Electrical Characteristics
Unless otherwise specified, V
+
=
3V, V
−
=
0V, V
CM
+
=
=
/2 and R
V
V
O
>
1M
L
Typ LMC6484AI LMC6484I LMC6484M
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 11) 0.9 V/µs
GBW Gain-Bandwidth Product 1.0 MHz
=
T.H.D. Total Harmonic Distortion f=10 kHz, A
=
R
10 kΩ,V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2: Human body model, 1.5 kΩ in series with 100 pF. All pins rated per method 3015.6 of MIL-STD-883. This is a class 2 device rating.
L
−2 0.01
V
=
2V
O
PP
%
www.national.com5
Page 6
AC Electrical Characteristics (Continued)
Note 3: Applies to both single supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maxi-
mum allowed junction temperature of 150˚C. Output currents in excess of
Note 4: The maximum power dissipation is a function of T
−TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
+
Note 7: V
Note 8: Do not short circuit output to V
Note 9: V
Note 10: Input referred, V
Note 11: Connected as Voltage Follower with 2V step input. Number specified is the slower of either the positive or negative slew rates.
Note 12: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Note 13: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
Note 14: For guaranteed Military Temperature Range parameters see RETSMC6484X.
=
+
=
=
15V, V
15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of either the positive or negative slew rates.
CM
7.5V and R
+
connected to 7.5V. For Sourcing tests, 7.5V ≤ VO≤ 11.5V. For Sinking tests, 3.5V ≤ VO≤ 7.5V.
L
+
, when V+is greater than 13V or reliability will be adversely affected.
=
15V and R
=
L
J(max)
100 kΩ connected to 7.5V. Each amp excited in turn with 1 kHz to produce V
±
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is P
30 mA over long term may adversely affect reliability.
=
O
12 V
.
PP
=
(T
D
J(max)
Typical Performance Characteristics V
specified
Supply Current vs
Supply Voltage
DS011714-39
Sourcing Current vs
Output Voltage
Input Current vs
Temperature
Sourcing Current vs
Output Voltage
=
+15V, Single Supply, T
S
DS011714-40
=
25˚C unless otherwise
A
Sourcing Current vs
Output Voltage
Sinking Current vs
Output Voltage
DS011714-41
DS011714-42
www.national.com 6
DS011714-43
DS011714-44
Page 7
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Sinking Current vs
Output Voltage
Input Voltage Noise
vs Frequency
DS011714-45
Sinking Current vs
Output Voltage
DS011714-48
DS011714-46
Input Voltage Noise
vs Input Voltage
Output Voltage Swing
vs Supply Voltage
DS011714-47
DS011714-49
Input Voltage Noise
vs Input Voltage
DS011714-50
Input Voltage Noise
vs Input Voltage
DS011714-51
Crosstalk Rejection
vs Frequency
DS011714-52
www.national.com7
Page 8
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Crosstalk Rejection
vs Frequency
CMRR vs Frequency
CMRR vs Input Voltage
DS011714-53
DS011714-56
Positive PSRR
vs Frequency
CMRR vs Input Voltage
∆VOSvs CMR
DS011714-54
DS011714-57
Negative PSRR
vs Frequency
DS011714-55
CMRR vs Input Voltage
DS011714-58
∆ VOSvs CMR
DS011714-59
www.national.com 8
DS011714-60
DS011714-61
Page 9
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Input Voltage
vs Output Voltage
Open Loop Frequency
Response
DS011714-62
DS011714-65
Input Voltage
vs Output Voltage
Open Loop Frequency
Response vs Temperature
DS011714-63
DS011714-66
Open Loop
Frequency Response
DS011714-64
Maximum Output Swing
vs Frequency
DS011714-67
Gain and Phase
vs Capacitive Load
DS011714-68
Gain and Phase
vs Capacitive Load
DS011714-69
Open Loop Output
Impedance vs Frequency
DS011714-70
www.national.com9
Page 10
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Open Loop Output
Impedance vs Frequency
Non-Inverting Large Signal
Pulse Response
Non-Inverting Small Signal
Pulse Response
DS011714-71
DS011714-74
Slew Rate vs
Supply Voltage
Non-Inverting Large Signal
Pulse Response
Non-Inverting Small Signal
Pulse Response
DS011714-72
DS011714-75
Non-Inverting Large Signal
Pulse Response
DS011714-73
Non-Inverting Small Signal
Pulse Response
DS011714-76
Inverting Large Signal
Pulse Response
DS011714-77
www.national.com 10
DS011714-78
DS011714-79
Page 11
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Inverting Large Signal
Pulse Response
Inverting Small Signal
Pulse Response
Stability vs
Capacitive Load
DS011714-80
DS011714-83
Inverting Large Signal
Pulse Response
Inverting Small Signal
Pulse Response
Stability vs
Capacitive Load
DS011714-81
DS011714-84
Inverting Small Signal
Pulse Response
DS011714-82
Stability vs
Capacitive Load
DS011714-85
Stability vs
Capacitive Load
DS011714-86
DS011714-87
DS011714-88
www.national.com11
Page 12
Typical Performance Characteristics V
specified (Continued)
=
+15V, Single Supply, T
S
=
25˚C unless otherwise
A
Stability vs
Capacitive Load
DS011714-89
Application Information
1.0 Amplifier Topology
The LMC6484 incorporates specially designed
wide-compliance range current mirrors and the body effect to
extend input common mode range to each supply rail.
Complementary paralleled differential input stages, like the
type used in other CMOS and bipolar rail-to-rail input amplifiers, were not used because of their inherent accuracy problems due to CMRR, cross-over distortion, and open-loop
gain variation.
The LMC6484’s input stage design is complemented by an
output stage capable of rail-to-rail output swing even when
driving a large load. Rail-to-rail output swing is obtained by
taking the output directly from the internal integrator instead
of an output buffer stage.
2.0 Input Common-Mode Voltage Range
Unlike Bi-FET amplifier designs, the LMC6484 does not exhibit phase inversion when an input voltage exceeds the
negative supply voltage.
ceeding both supplies with no resulting phase inversion on
the output.
Figure 1
shows an input voltage ex-
Stability vs
Capacitive Load
DS011714-90
ceeding this absolute maximum rating, as in
Figure 2
cause excessive current to flow in or out of the input pins
possibly affecting reliability.
FIGURE 2. A±7.5V Input Signal Greatly
Exceeds the 3V Supply in
No Phase Inversion Due to R
Figure 3
Causing
I
Applications that exceed this rating must externally limit the
±
maximum input current to
shown in
Figure 3
.
5 mA with an input resistor as
, can
DS011714-12
DS011714-10
FIGURE 1. An Input Voltage Signal Exceeds the
LMC6484 Power Supply Voltages with
No Output Phase Inversion
The absolute maximum input voltage is 300 mV beyond either supply rail at room temperature. Voltages greatly ex-
www.national.com 12
DS011714-11
FIGURE 3. RIInput Current Protection for
Voltages Exceeding the Supply Voltage
3.0 Rail-To-Rail Output
The approximated output resistance of the LMC6484 is
180Ω sourcing and 130Ω sinking at V
sourcing and 83Ω sinking at V
output resistance, maximum output voltage swing can be es-
=
S
=
3V and 110Ω
S
5V. Using the calculated
timated as a function of load.
4.0 Capacitive Load Tolerance
The LMC6484 can typically directly drive a 100 pF load with
=
V
15V at unity gain without oscillating. The unity gain fol-
S
lower is the most sensitive configuration. Direct capacitive
Page 13
Application Information (Continued)
loading reduces the phase margin of op-amps. The combination of the op-amp’s output impedance and the capacitive
load induces phase lag. This results in either an underdamped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in
nique is useful for isolating the capacitive input of multiplexers and A/D converters.
Figure 4
. This simple tech-
DS011714-17
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
DS011714-18
FIGURE 5. Pulse Response of
the LMC6484 Circuit in
Figure 4
Improved frequency response is achieved by indirectly driv-
Figure 6
ing capacitive loads as shown in
.
DS011714-16
FIGURE 7. Pulse Response of
LMC6484 Circuit in
Figure 6
5.0 Compensating for Input Capacitance
It is quite common to use large values of feedback resistance with amplifiers that have ultra-low input current, like
the LMC6484. Large feedback resistors can react with small
values of input capacitance due to transducers, photodiodes, and circuit board parasitics to reduce phase
margins.
DS011714-19
FIGURE 8. Canceling the Effect of Input Capacitance
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 8
), Cf, is first estimated by:
DS011714-15
FIGURE 6. LMC6484 Non-Inverting Amplifier,
Compensated to Handle a 330 pF Capacitive Load
R1 and C1 serve to counteract the loss of phase margin by
feeding forward the high frequency component of the output
signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback loop. The values of
R1 and C1 are experimentally determined for the desired
pulse response. The resulting pulse response can be seen in
Figure 7
.
or
≤ R2C
R
1CIN
f
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for C
checked on the actual circuit. (Refer to the LMC660 quad
may be different. The values of Cfshould be
f
CMOS amplifier data sheet for a more detailed discussion.)
6.0 Printed-Circuit-Board Layout for High-Impedance
Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. when one wishes to take advantage
www.national.com13
Page 14
Application Information (Continued)
of the ultra-low input current of the LMC6484, typically less
than 20 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6484’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals, etc. connected to the op-amp’s inputs, as in
ure 9
. To have a significant effect, guard rings should be
placed in both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
12
Ω, which is normally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 250 times degradation from the LMC6484’s
actual performance. However, if a guard ring is held within 5
mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current. See
typical connections of guard rings for standard op-amp
configurations.
11
Ω would
Figure 10
Fig-
for
DS011714-21
Inverting Amplifier
DS011714-22
Non-Inverting Amplifier
DS011714-23
Follower
FIGURE 10. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring.
See
Figure 11
.
DS011714-20
FIGURE 9. Example of Guard Ring in P.C. Board
Layout
www.national.com 14
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board.)
DS011714-24
FIGURE 11. Air Wiring
Page 15
Application Information (Continued)
7.0 Offset Voltage Adjustment
Offset voltage adjustment circuits are illustrated in
13, 14
. Large value resistances and potentiometers are used
to reduce power consumption while providing typically
mV of adjustment range, referred to the input, for both configurations with V
=
±
5V.
S
FIGURE 12. Inverting Configuration
Offset Voltage Adjustment
DS011714-25
Figures
±
2.5
DS011714-26
FIGURE 13. Non-Inverting Configuration
Offset Voltage Adjustment
8.0 Upgrading Applications
The LMC6484 quads and LMC6482 duals have industry
standard pin outs to retrofit existing applications. System
performance can be greatly increased by the LMC6484’s
features. The key benefit of designing in the LMC6484 is increased linear signal range. Most op-amps have limited input common mode ranges. Signals that exceed this range
generate a non-linear output response that persists long after the input signal returns to the common mode range.
Linear signal range is vital in applications such as filters
where signal peaking can exceed input common mode
ranges resulting in output phase inversion or severe distortion.
9.0 Data Acquisition Systems
Low power, single supply data acquisition system solutions
are provided by buffering the ADC12038 with the LMC6484
(
Figure 14
). Capable of using the full supply range, the
LMC6484 does not require input signals to be scaled down
to meet limited common mode voltage ranges. The
LMC6484 CMRR of 82 dB maintains integral linearity of a
12-bit data acquisition system to
±
0.325 LSB. Other
rail-to-rail input amplifiers with only 50 dB of CMRR will degrade the accuracy of the data acquisition system to only 8
bits.
www.national.com15
Page 16
Application Information (Continued)
FIGURE 14. Operating from the same
Supply Voltage, the LMC6484 buffers the
ADC12038 maintaining excellent accuracy
10.0 Instrumentation Circuits
The LMC6484 has the high input impedance, large
common-mode range and high CMRR needed for designing
instrumentation circuits. Instrumentation circuits designed
with the LMC6484 can reject a larger range of
common-mode signals than most in-amps. This makes instrumentation circuits designed with the LMC6484 an excellent choice for noisy or industrial environments. Other appli-
DS011714-28
cations that benefit from these features include analytic
medical instruments, magnetic field detectors, gas detectors,
and silicon-based transducers.
A small valued potentiometer is used in series with Rg to set
the differential gain of the 3 op-amp instrumentation circuit in
Figure 15
. This combination is used instead of one large valued potentiometer to increase gain trim accuracy and reduce
error due to vibration.
FIGURE 15. Low Power 3 Op-Amp Instrumentation Amplifier
A 2 op-amp instrumentation amplifier designed for a gain of
100 is shown in
www.national.com 16
Figure 16
. Low sensitivity trimming is made
DS011714-29
Page 17
Application Information (Continued)
for offset voltage, CMRR and gain. Low cost and low power
consumption are the main advantages of this two op-amp
circuit.
FIGURE 16. Low-Power Two-Op-Amp Instrumentation Amplifier
11.0 Spice Macromodel
A spice macromodel is available for the LMC6484. This
model includes accurate simulation of:
input common-mode voltage range
•
frequency and transient response
•
GBW dependence on loading conditions
•
quiescent and dynamic supply current
•
output swing dependence on loading conditions
•
and many more characteristics as listed on the macromodel
disk.
Contact your local National Semiconductor sales office to
obtain an operational amplifier spice model library disk.
Higher frequency and larger common-mode range applications are best facilitated by a three op-amp instrumentation
amplifier.
DS011714-30
Typical Single-Supply Applications
DS011714-31
FIGURE 17. Half-Wave Rectifier with
Input Current Protection (RI)
DS011714-32
FIGURE 18. Half-Wave Rectifier Waveform
The circuit in
tify a sinusoid centered about ground. R
the amplifier caused by the input voltage exceeding the sup-
Figure 17
use a single supply to half wave rec-
limits current into
I
ply voltage. Full wave rectification is provided by the circuit in
Figure 19
.
DS011714-33
FIGURE 19. Full Wave Rectifier
with Input Current Protection (R
)
I
www.national.com17
Page 18
Typical Single-Supply Applications (Continued)
FIGURE 20. Full Wave Rectifier Waveform
DS011714-34
FIGURE 21. Large Compliance Range Current Source
FIGURE 22. Positive Supply Current Sense
www.national.com 18
DS011714-35
DS011714-36
Page 19
Typical Single-Supply Applications (Continued)
DS011714-37
FIGURE 23. Low Voltage Peak Detector with Rail-to-Rail Peak Capture Range
Figure 23
In
is primarily determined by the value of C
effect on droop.
The LMC6484’s high CMRR (85 dB) allows excellent accuracy throughout the circuit’s rail-to-rail dynamic capture range.
dielectric absorption and leakage is minimized by using a polystyrene or polyethylene hold capacitor. The droop rate
and diode leakage current. The ultra-low input current of the LMC6484 has a negligible
H
DS011714-38
FIGURE 24. Rail-to-Rail Sample and Hold
DS011714-27
FIGURE 25. Rail-to-Rail Single Supply Low Pass Filter
The low pass filter circuit in
Figure 25
can be used as an anti-aliasing filter with the same voltage supply as the A/D converter.
Filter designs can also take advantage of the LMC6484 ultra-low input current. The ultra-low input current yields negligible offset
error even when large value resistors are used. This in turn allows the use of smaller valued capacitors which take less board
space and cost less.
www.national.com19
Page 20
Physical Dimensions inches (millimeters) unless otherwise noted
14-Pin Ceramic Dual-In-Line Package
Order Number LMC6484AMJ/883, LMC6484AMWG/883
NS Package Number J14A, WG14A
www.national.com 20
Page 21
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Order Package Number LMC6484AIM or LMC6484IM
14-Pin Small Outline
NS Package Number M14A
www.national.com21
Page 22
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Order Package Number LMC6484AIN, LMC6484IN or LMC6484MN
14-Pin Molded DIP
NS Package Number N14A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
LMC6484 CMOS Quad Rail-to-Rail Input and Output Operational Amplifier
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
labeling, can be reasonably expected to result in a
significant injury to the user.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
www.national.com
National Semiconductor
Europe
Fax: +49 (0) 1 80-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 1 80-530 85 85
English Tel: +49 (0) 1 80-532 78 32
Français Tel: +49 (0) 1 80-532 93 58
Italiano Tel: +49 (0) 1 80-534 16 80
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
Email: sea.support@nsc.com
National Semiconductor
Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
Loading...