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查询LMC6062供应商
LMC6062
Precision CMOS Dual Micropower Operational Amplifier
LMC6062 Precision CMOS Dual Micropower Operational Amplifier
November 1994
General Description
The LMC6062 is a precision dual low offset voltage, micropower operational amplifier, capable of precision single
supply operation. Performance characteristics include ultra
low input bias current, high voltage gain, rail-to-rail output
swing, and an input common mode voltage range that includes ground. Thesefeatures, plus its low power consumption, make the LMC6062 ideally suited for battery powered
applications.
Other applications using the LMC6062 include precision
full-wave rectifiers, integrators, references, sample-and-hold
circuits, and true instrumentation amplifiers.
This device is built with National’s advanced double-Poly
Silicon-Gate CMOS process.
For designs that require higher speed, see the LMC6082
precision dual operational amplifier.
PATENT PENDING
Connection Diagram
8-Pin DIP/SO
Features
(Typical Unless Otherwise Noted)
n Low offset voltage 100 µV
n Ultra low supply current 16 µA/Amplifier
n Operates from 4.5V to 15V single supply
n Ultra low input bias current 10 fA
n Output swing within 10 mV of supply rail, 100k load
n Input common-mode range includes V
n High voltage gain 140 dB
n Improved latchup immunity
−
Applications
n Instrumentation amplifier
n Photodiode and infrared detector preamplifier
n Transducer amplifiers
n Hand-held analytic instruments
n Medical instrumentation
n D/A converter
n Charge amplifier for piezoelectric transducers
DS011298-1
Top View
Ordering Information
Temperature Range
Package
8-Pin LMC6062AMN LMC6062AIN N08E Rail
Molded DIP LMC6062IN
8-Pin LMC6062AIM M08A Rail
Small Outline LMC6062IM Tape and Reel
8-Pin LMC6062AMJ/883 J08A Rail
Ceramic DIP
© 1999 National Semiconductor Corporation DS011298 www.national.com
Military Industrial
−55˚C to +125˚C −40˚C to +85˚C
NSC
Drawing
Transport
Media
Page 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Differential Input Voltage
Voltage at Input/Output Pin (V
+−V−
Supply Voltage (V
Output Short Circuit to V
Output Short Circuit to V
) 16V
+
−
Lead Temperature
(Soldering, 10 sec.) 260˚C
Storage Temp. Range −65˚C to +150˚C
Junction Temperature 150˚C
ESD Tolerance (Note 4) 2 kV
±
Supply Voltage
+
) +0.3V,
−
) −0.3V
(V
(Note 11)
(Note 2)
±
Current at Input Pin
Current at Output Pin
10 mA
±
30 mA
Current at Power Supply Pin 40 mA
Power Dissipation (Note 3)
Operating Ratings (Note 1)
Temperature Range
LMC6062AM −55˚C ≤ T
LMC6062AI, LMC6082I −40˚C ≤ T
Supply Voltage 4.5V ≤ V
Thermal Resistance (θ
) (Note 12)
JA
8-Pin Molded DIP 115˚C/W
8-Pin SO 193˚C/W
Power Dissipation (Note 10)
≤ +125˚C
J
≤ +85˚C
J
+
≤ 15.5V
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
−
=
V
0V, V
=
1.5V, V
CM
=
2.5V and R
O
>
1M unless otherwise specified.
L
=
25˚C. Boldface limits apply at the temperature extremes. V
J
+
=
5V,
Typ LMC6062AM LMC6062AI LMC6062I
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
V
Input Offset Voltage 100 350 350 800 µV
OS
1200 900 1300 Max
TCV
Input Offset Voltage 1.0 µV/˚C
OS
Average Drift
I
B
Input Bias Current 0.010 pA
100 4 4 Max
I
OS
Input Offset Current 0.005 pA
100 2 2 Max
R
IN
Input Resistance
CMRR Common Mode 0V ≤ V
+
Rejection Ratio V
=
+PSRR Positive Power Supply 5V ≤ V
Rejection Ratio V
=
O
−PSRR Negative Power Supply 0V ≤ V
≤ 12.0V 85 75 75 66 dB
CM
15V 70 72 63 Min
+
≤ 15V 85 75 75 66 dB
2.5V 70 72 63 Min
−
≤ −10V 100 84 84 74 dB
>
10 Tera Ω
Rejection Ratio 70 81 71 Min
+
V
Input Common-Mode V
CM
=
5V and 15V −0.4 −0.1 −0.1 −0.1 V
Voltage Range for CMRR ≥ 60 dB 000Max
+
V
− 1.9 V+− 2.3 V+− 2.3 V+− 2.3 V
A
Large Signal R
V
=
100 kΩ Sourcing 4000 400 400 300 V/mV
L
+
V
− 2.6 V+− 2.5 V+− 2.5 Min
Voltage Gain (Note 7) 200 300 200 Min
Sinking 3000 180 180 90 V/mV
70 100 60 Min
=
R
25 kΩ Sourcing 3000 400 400 200 V/mV
L
(Note 7) 150 150 80 Min
Sinking 2000 100 100 70 V/mV
35 50 35 Min
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Page 3
DC Electrical Characteristics (Continued)
Unless otherwise specified, all limits guaranteed for T
−
=
V
0V, V
=
1.5V, V
CM
=
2.5V and R
O
>
1M unless otherwise specified.
L
=
25˚C. Boldface limits apply at the temperature extremes. V
J
Typ LMC6062AM LMC6062AI LMC6062I
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
+
V
Output Swing V
O
=
5V 4.995 4.990 4.990 4.950 V
=
R
100 kΩ to 2.5V 4.970 4.980 4.925 Min
L
0.005 0.010 0.010 0.050 V
0.030 0.020 0.075 Max
+
=
V
5V 4.990 4.975 4.975 4.950 V
=
R
25 kΩ to 2.5V 4.955 4.965 4.850 Min
L
0.010 0.020 0.020 0.050 V
0.045 0.035 0.150 Max
+
=
V
15V 14.990 14.975 14.975 14.950 V
=
R
100 kΩ to 7.5V 14.955 14.965 14.925 Min
L
0.010 0.025 0.025 0.050 V
0.050 0.035 0.075 Max
+
=
V
15V 14.965 14.900 14.900 14.850 V
=
R
25 kΩ to 7.5V 14.800 14.850 14.800 Min
L
0.025 0.050 0.050 0.100 V
0.200 0.150 0.200 Max
I
O
Output Current Sourcing, V
+
=
V
5V 8108Min
Sinking, V
=
0V 22 16 16 13 mA
O
=
5V 21 16 16 16 mA
O
788Min
I
O
Output Current Sourcing, V
+
=
V
15V 91010Min
Sinking, V
=
0V 25 15 15 15 mA
O
=
13V 35 24 24 24 mA
O
(Note 11) 788Min
I
S
Supply Current Both Amplifiers 32 38 38 46 µA
+
=
V
+5V, V
=
1.5V 60 46 56 Max
O
Both Amplifiers 40 47 47 57 µA
+
V
=
+15V, V
=
7.5V 70 55 66 Max
O
+
=
5V,
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AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
−
=
V
0V, V
=
1.5V, V
CM
=
2.5V and R
O
>
1M unless otherwise specified.
L
=
25˚C, Boldface limits apply at the temperature extremes. V
J
+
=
5V,
Typ LMC6062AM LMC6062AI LMC6062I
Symbol Parameter Conditions (Note 5) Limit Limit Limit Units
(Note 6) (Note 6) (Note 6)
SR Slew Rate (Note 8) 35 20 20 15 V/ms
8107Min
GBW Gain-Bandwidth Product 100 kHz
θ
Phase Margin 50 Deg
m
Amp-to-Amp Isolation (Note 9) 155 dB
e
i
T.H.D. Total Harmonic Distortion F=1 kHz, A
Input-Referred Voltage Noise F=1 kHz 83 nV/√Hz
n
Input-Referred Current Noise F=1 kHz 0.0002 pA/√Hz
n
=
R
L
±
5V Supply
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed.
Note 2: Applies to both single-supply and split-supply operation. Continous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C. Output currents in excess of
Note 3: The maximum power dissipation is a function ofT
−TA)/θJA.
Note 4: Human body model, 1.5 kΩ in series with 100 pF.
Note 5: Typical values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
+
=
Note 7: V
+
=
Note 8: V
Note 9: Input referred V
Note 10: For operating at elevated temperatures the device must be derated based on the thermal resistance θ
Note 11: Do not connect output to V
Note 12: All numbers apply for packages soldered directly into a PC board.
Note 13: For guaranteed Military Temperature Range parameters, see RETSMC6062X.
=
15V, V
15V. Connected as Voltage Follower with 10V step input. Number specified is the slower of the positive and negative slew rates.
CM
7.5V and R
+
=
connected to 7.5V. For Sourcing tests, 7.5V ≤ VO≤ 11.5V. For Sinking tests, 2.5V ≤ VO≤ 7.5V.
L
15V and R
=
100 kΩ connected to 7.5V. Each amp excited in turn with 100 Hz to produce V
L
+
, when V+is greater than 13V or reliability witll be adversely affected.
=
−5
V
100 kΩ,V
J(Max)
=
2V
O
±
, θJA, and TA. The maximum allowable power dissipation at any ambient temperature is P
30 mA over long term may adversely affect reliability.
0.01
PP
=
.
12 V
O
PP
=
JA
with P
)/θJA.
(T
D
J–TA
%
=
(T
D
J(Max)
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Page 5
Typical Performance Characteristics V
Distribution of LMC6062
Input Offset Voltage
=
(T
+25˚C)
A
Distribution of LMC6062
Input Offset Voltage
=
(T
−55˚C)
A
=
±
S
7.5V, T
=
25˚C, Unless otherwise specified
A
Distribution of LMC6062
Input Offset Voltage
=
(T
+125˚C)
A
Input Bias Current
vs Temperature
Common Mode
Rejection Ratio
vs Frequency
DS011298-15
DS011298-18
Supply Current
vs Supply Voltage
Power Supply Rejection
Ratio vs Frequency
DS011298-16
DS011298-19
DS011298-17
Input Voltage
vs Output Voltage
DS011298-20
Input Voltage Noise
vs Frequency
DS011298-21
DS011298-22
DS011298-23
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Page 6
Typical Performance Characteristics V
specified (Continued)
=
±
S
7.5V, T
=
25˚C, Unless otherwise
A
Output Characteristics
Sourcing Current
DS011298-24
Gain and Phase
Response vs Capacitive Load
=
with R
20 kΩ
L
DS011298-27
Output Characteristics
Sinking Current
DS011298-25
Gain and Phase
Response vs Capacitive Load
=
with R
L
500 kΩ
DS011298-28
Gain and Phase Response
vs Temperature
(−55˚C to +125˚C)
DS011298-26
Open Loop
Frequency Response
DS011298-29
Inverting Small Signal
Pulse Response
DS011298-30
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Inverting Large Signal
Pulse Response
DS011298-31
Non-Inverting Small
Signal Pulse Response
DS011298-32
Page 7
Typical Performance Characteristics V
specified (Continued)
=
±
7.5V, T
S
=
25˚C, Unless otherwise
A
Non-Inverting Large
Signal Pulse Response
Stability vs Capacitive
=
Load R
1MΩ
L
DS011298-33
DS011298-36
Crosstalk Rejection
vs Frequency
Applications Hints
AMPLIFIER TOPOLOGY
The LMC6062 incorporates a novel op-amp design topology
that enables it to maintain rail-to-rail output swing even when
driving a large load. Instead of relying on a push-pull unity
gain output buffer stage, the output stage is taken directly
from the internal integrator, which provides both low output
impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability
over a wider range of operating conditions than traditional
micropower op-amps. These features make the LMC6062
both easier to design with, and provide higher speed than
products typically found in this ultra-low power class.
COMPENSATING FOR INPUT CAPACITANCE
It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the
LMC6062.
Although the LMC6062 is highly stable over a wide range of
operating conditions, certain precautions must be met to
achieve the desired pulse response when a large feedback
resistor is used. Large feedback resistors and even small
values of input capacitance, due to transducers, photodiodes, and circuit board parasitics, reduce phase margins.
When high input impedances are demanded, guarding of the
LMC6062 is suggested. Guarding input lines will not only re-
Stability vs Capacitive
Load, R
DS011298-34
=
20 kΩ
L
DS011298-35
duce leakage, but lowers stray input capacitance as well.
(See
Printed-Circuit-Board Layout for High Impedance
Work
).
The effect of input capacitance can be compensated for by
adding a capacitor. Place a capacitor, C
back resistor (as in
Figure 1
) such that:
, around the feed-
f
or
≤ R2C
R
1CIN
f
Since it is often difficult to know the exact value of CIN,Cfcan
be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and the LMC662
for a more detailed discussion on compensating for input
capacitance.
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Page 8
Applications Hints (Continued)
DS011298-4
FIGURE 1. Canceling the Effect of Input Capacitance
CAPACITIVE LOAD TOLERANCE
All rail-to-rail output swing operational amplifiers have voltage gain in the output stage. A compensation capacitor is
normally included in this integrator stage. The frequency location of the dominate pole is affected by the resistive load
on the amplifier.Capacitive load driving capability can be optimized by using an appropriate resistive load in parallel with
the capacitive load (see typical curves).
Direct capacitive loading will reduce the phase margin of
many op-amps. Apole in the feedback loop is created by the
combination of the op-amp’s output impedance and the capacitive load. This pole induces phase lag at the unity-gain
crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in
Figure 2
.
fier with respect to the desired output swing. Open loop gain
of the amplifier can also be affected by the pull up resistor
(see Electrical Characteristics).
DS011298-14
FIGURE 3. Compensating for Large Capacitive Loads
with a Pull Up Resistor
PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6062, typically less
than 10 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6062’s inputs and the
terminals of capacitors, diodes, conductors, resistors, relay
terminals etc. connected to the op-amp’s inputs, as in
4
. To have a significant effect, guard rings should be placed
Figure
on both the top and bottom of the PC board. This PC foil
must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
12
Ω, which is normally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 100 times degradation from the LMC6062’s
actual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current. See
Figure 5
11
Ω would
for typical connections of guard rings for standard op-amp
configurations.
DS011298-5
FIGURE 2. LMC6062 Noninverting Gain of 10 Amplifier,
Compensated to Handle Capacitive Loads
Figure 2
In the circuit of
, R1 and C1 serve to counteract the
loss of phase margin by feeding the high frequency component of the output signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback
loop.
Capacitive load driving capability is enhanced by using a pull
up resistor to V
+
(
Figure 3
). Typically a pull up resistor conducting 10 µA or more will significantly improve capacitive
load responses. The value of the pull up resistor must be determined based on the current sinking capability of the ampli-
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DS011298-6
FIGURE 4. Example of Guard Ring in P.C. Board
Layout
Page 9
Applications Hints (Continued)
(a) Inverting Amplifier
Latchup
CMOS devices tend to be susceptible to latchup due to their
internal parasitic SCReffects. The (I/O) input and outputpins
look similar to the gate of the SCR. There is a minimum current required to trigger the SCR gate lead. The LMC6062
and LMC6082 are designed to withstand 100 mA surge current on the I/O pins. Some resistive method should be used
to isolate any capacitance from supplying excess current to
the I/O pins. In addition, like an SCR, there is a minimum
holding current for any latchup mode. Limiting current to the
supply pins will also inhibit latchup susceptibility.
DS011298-7
DS011298-8
(b) Non-Inverting Amplifier
DS011298-9
(c) Follower
FIGURE 5. Typical Connections of Guard Rings
The designer should be aware that when it is inappropriate
to lay out a PC board for the sake of just a few circuits, there
is another technique which is even better than a guard ring
on a PC board: Don’t insert the amplifier’s input pin into the
board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may
have to forego some of the advantages of PC board construction, but the advantages are sometimes well worth the
effort of using point-to-point up-in-the-air wiring. See
6
.
Figure
(Input pins are lifted out of PC board and soldered directly to components.
All other pins connected to PC board).
DS011298-10
FIGURE 6. Air Wiring
Typical Single-Supply
Applications
+
=
(V
The extremely high input impedance, and low power con-
sumption, of the LMC6062 make it ideal for applications that
require battery-powered instrumentation amplifiers. Examples of these types of applications are hand-held pH
probes, analytic medical instruments, magnetic field detectors, gas detectors, and silicon based pressure transducers.
Figure 7
high differential and common mode input resistance
>
(
1014Ω), 0.01%gain accuracy at A
CMRR with 1 kΩ imbalance in bridge source resistance. Input current is less than 100 fA and offset drift is less than
2.5 µV/˚C. R
over a wide range without degrading CMRR. R
trim used to maximize CMRR without using super precision
matched resistors. For good CMRR over temperature, low
drift resistors should be used.
)
5.0 V
DC
shows an instrumentation amplifier that features
=
100, excellent
V
provides a simple means of adjusting gain
2
is an initial
7
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Page 10
Typical Single-Supply
Applications
(Continued)
=
If R
∴
AV≈ 100 for circuit shown (R
=
5,R3
R
, and R
6
R
1
=
; then
R
4
7
=
9.822k).
2
DS011298-11
FIGURE 7. Instrumentation Amplifier
DS011298-12
FIGURE 8. Low-Leakage Sample and Hold
FIGURE 9. 1 Hz Square Wave Oscillator
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DS011298-13
Page 11
Physical Dimensions inches (millimeters) unless otherwise noted
8-Pin Ceramic Dual-In-Line Package
Order Number LMC6062AMJ/883
NS Package Number J08A
8-Pin Small Outline Package
Order Number LMC6062AIM or LMC6062IM
NS Package Number M08A
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Page 12
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Order Number LMC6062AIN, LMC6062AMN or LMC6062IN
8-Pin Molded Dual-In-Line Package
NS Package Number N08E
LMC6062 Precision CMOS Dual Micropower Operational Amplifier
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whosefailure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
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Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
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Email: europe.support@nsc.com
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2. A critical component is any component of a life support
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device or system, or to affect its safety or effectiveness.
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Tel: 65-2544466
Fax: 65-2504466
Email: sea.support@nsc.com
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Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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