Datasheet LMC555CN, LMC555CMX, LMC555CMMX, LMC555CM, LMC555CBPX Datasheet (NSC)

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LMC555 CMOS Timer
General Description
The LMC555 is a CMOS version of the industry standard 555 series general purpose timers. In addition to the stan­dard package(SOIC, MSOP, and MDIP) the LMC555 is also available in achip sized package(8 Bump micro SMD) using National’s micro SMD package technology. The LMC555 of­fers the same capability of generating accurate time delays and frequencies as the LM555 but with much lower power dissipation and supply current spikes. When operated as a one-shot, the time delay is precisely controlled by a single external resistor and capacitor. In the stable mode the oscil­lation frequency and duty cycle are accurately set by two ex­ternal resistors and one capacitor. The use of National Semi­conductor’s LMCMOS
process extends boththe frequency
range and low supply capability.
Features
n Less than 1 mW typical power dissipation at 5V supply n 3 MHz astable frequency capability n 1.5V supply operating voltage guaranteed n Output fully compatible with TTL and CMOS logic at 5V
supply
n Tested to −10 mA, +50 mA output current levels n Reduced supply current spikes during output transitions n Extremely low reset, trigger, and threshold currents n Excellent temperature stability n Pin-for-pin compatible with 555 series of timers n Available in 8 pin MSOP Package and 8-Bump micro
SMD package
Block and Connection Diagrams
LMCMOS™is a trademark of National Semiconductor Corp.
8-Pin SOIC, MSOP,
and MDIP Packages
DS008669-1
Top View
8-Bump micro SMD
DS008669-9
Top View
(bump side down)
February 2000
LMC555 CMOS Timer
© 2000 National Semiconductor Corporation DS008669 www.national.com
Ordering Information
Package Temperature Range Package Marking Transport Media NSC
Drawing
Industrial
−40˚C to +85˚C
8-LeadSmall Outline (SO)
LMC555CM LMC555CM Rails
M08A
LMC555CMX LMC555CM 2.5k Units Tape and Reel
8-Lead Mini Small Outline (MSOP)
LMC555CMM ZC5 1k Units Tape and Reel
MUA08A
LMC555CMMX ZC5 3.5k Units Tape and Reel
8-Lead Molded Dip (MDIP)
LMC555CN LMC555CN Rails
N08E
8-Bump micro SMD LMC555CBP F1 250 Units Tape and Reel
BPA08EFB
LMC555CBPX F1 3k Units Tape and Reel
Metronome Circuit LMC555CBPEVAL N/A N/A N/A
micro SMD Marking Orientation
Top View
DS008669-23
Bumps are numbered counter-clockwise
LMC555
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Absolute Maximum Ratings (Notes 2, 3)
If Military/Aerospace specified devices are required, please contact theNational Semiconductor SalesOffice/ Distributors for availability and specifications.
Supply Voltage, V
+
15V
Input Voltages, V
TRIG,VRES,VCTRL
,
V
THRESH
−0.3V to VS+ 0.3V
Output Voltages, V
O,VDIS
15V
Output Current I
O,IDIS
100 mA Storage Temperature Range −65˚C to +150˚C Soldering Information
MDIP Soldering (10 seconds) 260˚C SOIC, MSOP Vapor Phase (60
sec) 215˚C
SOIC, MSOP Infrared (15 sec) 220˚C
Note: See AN-450 “Surface Mounting Methods and Their Effect on Product
Reliability” for other methods of soldering surface mount devices.
Operating Ratings(Notes 2, 3)
Termperature Range −40˚C to +85˚C
Thermal Resistance (θ
JA
) (Note 2) SO, 8-lead Small Outline 169˚C/W MSOP, 8-lead Mini Small
Outline 225˚C/W MDIP, 8-lead Molded Dip 111˚C/W 8-Bump micro SMD 220˚C/W
Maximum Allowable Power Dissipation
@
25˚C MDIP-8 1126mW SO-8 740mW MSOP-8 555mW 8 Bump micro SMD 568mW
Electrical Characteristics (Notes 1, 2)
Test Circuit, T=25˚C, all switches open, RESET to V
S
unless otherwise noted
Symbol Parameter Conditions Min Typ Max Units
(Limits)
I
S
Supply Current V
S
=
1.5V
V
S
=
5V
V
S
=
12V
50 100 150
150 250 400
µA
V
CTRL
Control Voltage V
S
=
1.5V
V
S
=
5V
V
S
=
12V
0.8
2.9
7.4
1.0
3.3
8.0
1.2
3.8
8.6
V
V
DIS
Discharge Saturation Voltage
V
S
=
1.5V, I
DIS
=
1mA
V
S
=
5V, I
DIS
=
10 mA
75 150
150 300
mV
V
OL
Output Voltage (Low) V
S
=
1.5V, I
O
=
1mA
V
S
=
5V, I
O
=
8mA
V
S
=
12V, I
O
=
50 mA
0.2
0.3
1.0
0.4
0.6
2.0
V
V
OH
Output Voltage (High)
V
S
=
1.5V, I
O
=
−0.25 mA
V
S
=
5V, I
O
=
−2 mA
V
S
=
12V, I
O
=
−10 mA
1.0
4.4
10.5
1.25
4.7
11.3
V
V
TRIG
Trigger Voltage V
S
=
1.5V
V
S
=
12V
0.4
3.7
0.5
4.0
0.6
4.3
V
I
TRIG
Trigger Current V
S
=
5V 10 pA
V
RES
Reset Voltage V
S
=
1.5V (Note 4)
V
S
=
12V
0.4
0.4
0.7
0.75
1.0
1.1
V
I
RES
Reset Current V
S
=
5V 10 pA
I
THRESH
Threshold Current V
S
=
5V 10 pA
I
DIS
Discharge Leakage V
S
=
12V 1.0 100 nA
t Timing Accuracy SW 2, 4 Closed
V
S
=
1.5V
V
S
=
5V
V
S
=
12V
0.9
1.0
1.0
1.1
1.1
1.1
1.25
1.20
1.25
ms
t/V
S
Timing Shift with Supply V
S
=
5V
±
1V 0.3
%
/V
t/T Timing Shift with
Temperature
V
S
=
5V
−40˚C T +85˚C
75 ppm/˚C
f
A
Astable Frequency SW 1, 3 Closed, V
S
=
12V 4.0 4.8 5.6 kHz
f
MAX
Maximum Frequency Max. Freq. Test Circuit, V
S
=
5V 3.0 MHz
t
R,tF
Output Rise and Fall Times
Max. Freq. Test Circuit V
S
=
5V, C
L
=
10 pF
15 ns
LMC555
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Electrical Characteristics (Notes 1, 2)
Test Circuit, T=25˚C, all switches open, RESET to V
S
unless otherwise noted (Continued)
Symbol Parameter Conditions Min Typ Max Units
(Limits)
t
PD
Trigger Propagation Delay V
S
=
5V, Measure Delay
from Trigger to Output
100 ns
Note 1: All voltages are measured with respect to the ground pin, unless otherwise specified. Note 2: Absolute Maximum Ratings indicate limits beyond which damagetothedevicemayoccur. Operating Ratings indicate conditions for whichthedeviceisfunc-
tional, but donotguaranteespecificperformancelimits.Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guar­antee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is given, however, the typical value is a good indication of device performance.
Note 3: See AN-450 for other methods of soldering surface mount devices, and also AN-1112 for micro SMD considerations. Note 4: If the RESET pin is to be used at temperatures of −20˚C and below V
S
is required to be 2.0V or greater.
Note 5: For device pinout please refer to table 1
TABLE 1. Package Pinout Names vs. Pin Function
Pin Function Package Pin numbers
8-Pin SO,MSOP, and MDIP 8-Bump micro SMD GND 1 7 Trigger
26 Output 3 5 Reset
44 Control Voltage 5 3 Threshold 6 2 Discharge 7 1 V
+
88
Test Circuit (Note 5)
DS008669-2
Maximum Frequency Test Circuit (Note 5)
DS008669-3
LMC555
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Application Info
MONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot (
Figure 1
). The external capacitor is initially held discharged by internal circuitry. Upon application of a negative trigger pulse of less than 1/3 V
S
to the Trigger terminal, the flip-flop is set whichboth releases theshort circuit acrossthe capaci­tor and drives the output high.
The voltage across the capacitor then increases exponen­tially for a period of t
H
=
1.1 R
A
C, which is also the time that the output stays high, at the end of which time the voltage equals 2/3 V
S
. The comparator then resets the flip-flopwhich in turn discharges the capacitor and drives the output to its low state.
Figure 2
shows the waveforms generated in this mode of operation. Since the charge and the threshold level of the comparator are both directly proportional to supply voltage, the timing internal is independent of supply.
Reset overrides Trigger, which can override threshold. Therefore the trigger pulse must be shorter than the desired t
H
. The minimum pulse width for the Trigger is 20ns, and it is 400ns for the Reset. Duringthe timing cycle when the output is high, the further applicationof a trigger pulse will not effect the circuit solong as thetrigger input is returned highat least 10µs before the end of the timing interval. However the cir­cuit can be reset during this time by the application of a negative pulse to the reset terminal. The output will then re­main in the low state until a trigger pulse is again applied.
When the reset function is not use, it is recommended that it be connected to V
+
to avoid any possibilityof false triggering.
Figure 3
is a nomograph foreasy determination ofRC values
for various time delays.
Note: In monstable operation, the trigger should be driven high before the
end of timing cycle.
ASTABLE OPERATION
If the circuit is connected as shown in
Figure 4
(Trigger and Threshold terminals connected together) it will trigger itself and free run as a multivibrator. The external capacitor charges through R
A+RB
and discharges through RB. Thus the duty cycle may be precisely set by the ratio of these two resistors.
In this mode of operation, the capacitor charges and dis­charges between 1/3 V
S
and 2/3 VS. As in the triggered mode, the chargeand dischargetimes, and thereforethe fre­quency are independent of the supply voltage.
Figure 5
shows the waveform generated in this mode of
operation.
DS008669-4
FIGURE 1. Monostable (One-Shot)
DS008669-10
V
CC
=
5V Top Trace: Input 5V/Div. TIME=0.1 ms/Div. Middle Trace: Output 5V/Div. R
A
=
9.1k Bottom Trace: Capacitor Voltage 2V/Div.
C=0.01µF
FIGURE 2. Monostable Waveforms
DS008669-11
FIGURE 3. Time Delay
DS008669-5
FIGURE 4. Astable (Variable Duty Cycle Oscillator)
LMC555
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Application Info (Continued)
The charge time (output high) is given by
t
1
=
Ln2 (R
A+RB
)C
And the discharge time (output low) by:
t
2
=
Ln2 (R
B
)C
Thus the total period is:
T=t
1+t2
=
Ln2 (R
A+RB
)C
The frequency of oscillation is:
Figure 6
may be used for quick determination of these RC Values. The duty cycle, as a fraction of total period that the output is low, is:
FREQUENCY DIVIDER
The monostable circuit of
Figure 1
can be used as a fre-
quency divider by adjusting the length of the timing cycle.
Figure 7
shows the waveforms generatedin a divideby three
circuit.
PULSE WIDTH MODULATOR
When the timer is connected in the monostable mode and triggered with a continuous pulse train, the output pulse width can be modulated by a signal applied to the Control Voltage Terminal.
Figure 8
shows the circuit, and in
Figure 9
are some waveform examples.
PULSE POSITION MODULATOR
Figure 10
, with a modulating signal again applied
to the control voltage terminal.The pulse position varies with
DS008669-12
V
CC
=
5V Top Trace: Output 5V/Div. TIME=20 µs/Div. Bottom Trace: Capacitor Voltage 1V/Div. R
A
=
3.9k
R
B
=
9k
C=0.01µF
FIGURE 5. Astable Waveforms
DS008669-13
FIGURE 6. Free Running Frequency
DS008669-14
V
CC
=
5V Top Trace: Input 4V/Div. TIME=20 µs/Div. Middle Trace: Output 2V/Div. R
A
=
9.1 k Bottom Trace: Capacitor 2V/Div.
C=0.01µF
FIGURE 7. Frequency Divider Waveforms
DS008669-20
FIGURE 8. Pulse Width Modulator
DS008669-15
V
CC
=
5V Top Trace: Modulation 1V/Div. TIME=0.2 ms/Div. Bottom Trace: Output Voltage 2V/Div. R
A
=
9.1 k
C=0.01µF
FIGURE 9. Pulse Width Modulator Waveforms
LMC555
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Application Info (Continued)
Figure 11
shows the waveforms
generated for a triangle wave modulation signal.
50%DUTY CYCLE OSCILLATOR
The frequency of oscillation is
f=1/(1.4 R
C
C)
DS008669-21
FIGURE 10. Pulse Position Modulator
DS008669-16
V
CC
=
5V Top Trace: Modulation Input 1V/Div. TIME=0.1 ms/Div. Bottom Trace: Output Voltage 2V/Div. R
A
=
3.9 k
R
B
=
3k
C=0.01µF
FIGURE 11. Pulse Position Modulator Waveforms
DS008669-6
FIGURE 12. 50%Duty Cycle Oscillator
LMC555
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Physical Dimensions inches (millimeters) unless otherwise noted
Molded Small Outline (SO) Package (M)
NS Package Number M08A
LMC555
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
8-Lead (0.118” Wide) Molded Mini Small Outline Package
NS Package Number MUA08A
LMC555
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
Molded Dual-in-line Package (N)
NS Package Number N08E
LMC555
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. 63Sn/37Pb EUTECTIC BUMP
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTERCLOCKWISE.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACK­AGE LENGTH AND X3 IS PACKAGE HEIGHT.
6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC.
micro SMD Package
NS Package Number BPA08EFB
X
1
=
1.387 X
2
=
1.412 X
3
=
0.850
LMC555
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Notes
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com
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Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +44 (0) 870 24 0 2171 Français Tel: +33 (0) 1 41 91 8790
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Tel: 81-3-5639-7560 Fax: 81-3-5639-7507
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LMC555 CMOS Timer
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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