Datasheet LM75DM-50R2, LM75DM-33R2 Datasheet (MOTOROLA)

 Semiconductor Components Industries, LLC, 1999

February, 2000 – Rev. 0

1 Publication Order Number:

LM75/D

LM75

2-Wire Serial Temperatur e
Sensor and Monitor

The LM75 is a serially programmable temperature sensor that
notifies the host controller when ambient temperature exceeds a
user–programmed setpoint. Hysteresis is also programmable. The
INT/CMPTR output is programmable as either a simple comparator
for thermostat operation or as a temperature event interrupt.
Communication with the LM75 is accomplished via a two–wire bus
that is compatible with industry standard protocols. This permits
reading the current temperature, programming the setpoint and
hysteresis, and configuring the device.

The LM75 powers up in Comparator Mode with a default setpoint
of 80°C with 5°C hysteresis. Defaults allow independent operation as
a stand–alone thermostat. A shutdown command may be sent via the
2–wire bus to activate the low–power standby mode. Address
selection inputs allow up to eight LM75’ s to share the same 2–wire bus
for multi–zone monitoring.

All registers can be read by the host and the INT/CMPTR output’s
polarity is user programmable. Both polled and interrupt driven
systems are easily accommodated. Small physical size, low installed
cost, and ease of use make the LM75 an ideal choice for implementing
sophisticated system management schemes.

Features

• Temperature Sensing: 0.5°C Accuracy (Typ.)

• Operates from: 55°C to +125°C

• Operating Range: 2.7V – 5.5V

• Programmable Trip Point and Hysteresis with

Power–up Defaults

• Standard 2–Wire Serial Interface

• Thermal Event Alarm Output Functions as Interrupt or Comparator /

Thermostat Output

• Up to 8 LM75’s May Share the Same Bus

• Shutdown Mode for Low Standby Power Consumption

• 5V Tolerant I/O at V

DD

= 3V

• Low Power 250µA (Typ.) Operating, 1µA (Typ.)

Shutdown Mode

Typical Applications

• Thermal Protection for High Performance CPUs

• Solid–State Thermometer

• Fire/Heat Alarms

• Thermal Management in Electronic Systems:

Computers
Telecom Racks
Power Supplies / UPS

• Copiers / Office Electronics

• Consumer Electronics / Amplifiers

• Process Control

Micro8

DM SUFFIX

CASE TBD

PRELIMINARY INFORMATION

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PIN CONFIGURATION

(Top View)

Device Package Shipping

ORDERING INFORMATION

LM75DM–33R2 Micro–8 2500 Tape/Reel

1
2
3
4

SDA

SCL

INT/CMPTR

GND

8
7
6
5

V
A0
A1
A2

DD

LM75

LM75DM–50R2 Micro–8 2500 Tape/Reel

LM75

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2

FUNCTIONAL BLOCK DIAGRAM

V

DD

INT/
CMPTR

Two Wire

Serial Port

Interface

9 Bit

DS

A/D

Converter

Control

Logic

Temp

Sensor

A

0

A

1

A

2

SDA
SCL

Register Set

Configuration

T

Temperature

SET

T

HYST

LM75

TIMING DIAGRAM

SCL

SDA

SDA

Data Out

Data In

t

H (START)

t

SC

t

DSU

t

DH

t

SU (STOP)

PIN DESCRIPTION

Pin No. Symbol Description

1

ББББББ

SDA

Bidirectional Serial Data

2

ББББББ

SCL

Serial Data Clock Input

3

ББББББ

INT/CMPTR

Interrupt or Comparator Output

4

ББББББ

GND

System Ground

5

ББББББ

A

2

Address Select Pin (MSB)

6

ББББББ

A

1

Address Select Pin

7

ББББББ

A

0

Address Select Pin (LSB)

8

ББББББ

V

DD

Power Supply Input

LM75

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ABSOLUTE MAXIMUM RATINGS*

Parameter Value Unit

Supply Voltage (VDD) 6.0 V
ESD Susceptibility 1000 V
Input Voltage, On Pins:

A0, A1, A2
SDA, SCL, INT/CMPTR

(GND – 0.3) to (VCC + 0.3)

(GND – 0.3) to 5.5

V

Operating Temperature Range (TJ) –55 to +125 °C
Storage Temperature Range (T

STG

) –65 to +150 °C
Lead Temperature Range (Soldering, 10 sec) +300 °C
Thermal Resistance (Junction to Ambient) 250 °C/W

* Maximum Ratings are those values beyond which damage to the device may occur.

ELECTRICAL CHARACTERISTICS (Specifications Measured Over Operating Temperature Range, V+ = 5V, C

OSC

= 0,

Test Circuit (Figure 1), unless otherwise noted.

Symbol Characteristic Min Typ Max Unit

V

+

H

Supply Voltage Range, High

(–40°C ≤ TA ≤ +85°C, RL = 10 kW, LV Open)

3.0 — 10

V

V

+

L

Supply Voltage Range, Low

(–40°C ≤ TA ≤ +85°C, RL = 10 kW, LV to GND)

1.5 — 3.5

V

I

+

Supply Current (RL = R) — 80 180 µA

R

OUT

Output Source Resistance

I

OUT

= 20mA, TA = 25°C

I

OUT

= 20mA, 0°C ≤ TA ≤ +70°C

I

OUT

= 20mA, –40°C ≤ TA ≤ +85°C

V+ =2V , I

OUT

= 3 mA, LV to GND, 0°C ≤ TA ≤ +70°C

—
—
—
—

70

—
—

150

100
120
130
300

W

F

OSC

Oscillator Frequency (Pin 7 Open) — 10 — kHz

P

EFF

Power Efficiency (RL = 5kW)

95 98 — %

V

OUT EFF

Voltage Conversion Efficiency 97 99.9 — %

Z

OSC

Oscillator Impedance

V+ = 2V
V+ = 5V

—
—

1000

100

—
—

k

W

LM75

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DET AILED OPERATING DESCRIPTION

A typical LM75 hardware connection is shown in Figure 1.

Figure 1. Typical Application

+V

DD

A

0

A

1

A

2

SDA
SCL

TCN75

C

Bypass

7

6
5

1

3

2

8

Address

(Set as Desired)

Interface

4

0.1mF Recommended
Unless Device is
Mounted Close to CPU

Two Wire

INT/CMPTR

Serial Data (SDA)

Bidirectional. Serial data is transferred in both directions

using this pin.

Serial Clock (SCL)

Input. Clocks data into and out of the LM75.

INT/CMPTR

Open Collector, Programmable Polarity. In Comparator
Mode, unconditionally driven active any time temperature
exceeds the value programmed into the T

SET

register.
INT/CMPTR will become inactive when temperature
subsequently falls below the T

HYST

setting. (See Register Set
and Programmer’s Model.) In Interrupt Mode,
INT/CMPTR is made active by TEMP exceeding T

SET

; it is
unconditionally reset to its inactive state by reading any
register via the 2–wire bus. If and when temperature falls
below T

HYST

, INT/CMPTR is again driven active. Reading

any register will clear the T

HYST

interrupt. In Interrupt Mode,
the INT/CMPTR output is unconditionally reset upon
entering Shutdown Mode. If programmed as an active–low
output, it can be wire–ORed with any number of other open
collector devices. Most systems will require a pull–up
resistor for this configuration.

Note that current sourced from the pull–up resistor causes
power dissipation and may cause internal heating of the
LM75. To avoid affecting the accuracy of ambient
temperature readings, the pull–up resistor should be made as
large as possible. INT/CMPTR’s output polarity may be
programmed by writing to the INT/CMPTR POLARITY bit
in the CONFIG register. The default is active low.

Address (A2, A1, A0)

Inputs. Sets the three least significant bits of the LM75
8–bit address. A match between the LM75’s address and the
address specified in the serial bit stream must be made to
initiate communication with the LM75. Many
protocol–compatible devices with other addresses may
share the same 2–wire bus.

Slave Address

The four most significant bits of the Address Byte (A6,
A5, A4, A3) are fixed to 1001[B]. The states of A2, A1 and
A0 in the serial bit stream must match the states of the A2,
A1 and A0 address inputs for the LM75 to respond with an
Acknowledge (indicating the LM75 is on the bus and ready
to accept data). The Slave Address is represented by:

LM75 Slave Address

1

0 0 1 A2 A1 A0

MSB LSB

Comparator/Interrupt Modes

INT/CMPTR behaves differently depending on whether
the LM75 is in Comparator Mode or Interrupt Mode.
Comparator Mode is designed for simple thermostatic
operation. INT/CMPTR will go active anytime TEMP
exceeds T

SET

. When in Comparator Mode, INT/CMPTR

will remain active until TEMP falls below T

HYST

, whereupon
it will reset to its inactive state. The state of INT/CMPTR is
maintained in shutdown mode when the LM75 is in
comparator mode. In Interrupt Mode, INT/CMPTR will
remain active indefinitely, even if TEMP falls below T

HYST

,
until any register is read via the 2–wire bus. Interrupt Mode
is better suited to interrupt driven microprocessor–based
systems. The INT/CMPTR output may be wire–OR’ed with
other interrupt sources in such systems. Note that a pull–up
resistor is necessary on this pin since it is an open–drain
output. Entering Shutdown Mode will unconditionally reset
INT/CMPTR when in Interrupt Mode.

SHUTDOWN MODE

When the appropriate bit is set in the configuration
register (CONFIG) the LM75 enters its low–power
shutdown mode (I

DD

= 1µA, typical) and the

temperature–to–digital conversion process is halted. The
LM75’s bus interface remains active and TEMP, T

SET

, and

T

HYST

may be read from and written to. Transitions on SDA
or SCL due to external bus activity may increase the standby
power consumption. If the LM75 is in Interrupt Mode, the
state of INT/CMPTR will be RESET upon entering
shutdown mode.

Fault Queue

To lessen the probability of spurious activation of
INT/CMPTR the LM75 may be programmed to filter out
transient events. This is done by programming the desired
value into the Fault Queue. Logic inside the LM75 will
prevent the device from triggering INT/CMPTR unless the
programmed number of sequential temperature–to–digital
conversions yield the same qualitative result. In other words,
the value reported in TEMP must remain above T

SET

or

below T

HYST

for the consecutive number of cycles

LM75

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programmed in the Fault Queue. Up to a six–cycle ”filter”
may be selected. See Register Set and Programmer’ s Model.

Serial Port Operation

The Serial Clock input (SCL) and bidirectional data port
(SDA) form a 2–wire bidirectional serial port for
programming and interrogating the LM75. The following
conventions are used in this bus scheme:

LM75 Serial Bus Conventions

Term

Explanation

Transmitter The device sending data to the bus.
Receiver The device receiving data from the bus.
Master The device which controls the bus: initiat-

ing transfers (START), generating the

clock, and terminating transfers (STOP).
Slave The device addressed by the master.
Start A unique condition signaling the beginning

of a transfer indicated by SDA falling

(High–Low) while SCL is high.
Stop A unique condition signaling the end of a

transfer indicated by SDA rising (Low –

High) while SCL is high.
ACK A Receiver acknowledges the receipt of

each byte with this unique condition. The

Receiver drives SDA low during SCL high

of the ACK clock–pulse. The Master pro-

vides the clock pulse for the ACK cycle.
NOT Busy When the bus is idle, both SDA & SCL will

remain high.
Data Valid The state of SDA must remain stable dur-

ing the High period of SCL in order for a

data bit to be considered valid. SDA only

changes state while SCL is low during nor-

mal data transfers. (See Start and Stop

conditions)

All transfers take place under control of a host, usually a
CPU or microcontroller, acting as the Master, which
provides the clock signal for all transfers. The LM75 always
operates as a Slave. This serial protocol is illustrated in
Figure 2. All data transfers have two phases; and all bytes are
transferred MSB first. Accesses are initiated by a start
condition (ST ART), followed by a device address byte and
one or more data bytes. The device address byte includes a
Read/Write selection bit. Each access must be terminated by
a Stop Condition (STOP). A convention called
Acknowledge (ACK) confirms receipt of each byte. Note
that SDA can change only during periods when SCL is LOW

(SDA changes while SCL is HIGH are reserved for Start and
Stop Conditions).

Start Condition (START)

The LM75 continuously monitors the SDA and SCL lines
for a start condition (a HIGH to LOW transition of SDA
while SCL is HIGH), and will not respond until this
condition is met. (See Timing Diagram)

Address Byte

Immediately following the Start Condition, the host must
next transmit the address byte to the LM75. The four most
significant bits of the Address Byte (A6, A5, A4, A3) are
fixed to 1001(B). The states of A2, A1 and A0 in the serial
bit stream must match the states of the A2, A1 and A0
address inputs for the LM75 to respond with an
Acknowledge (indicating the LM75 is on the bus and ready
to accept data). The eighth bit in the Address Byte is a
Read–Write Bit. This bit is a 1 for a read operation or 0 for
a write operation.

Acknowledge (ACK)

Acknowledge (ACK) provides a positive handshake
between the host and the LM75. The host releases SDA after
transmitting eight bits then generates a ninth clock cycle to
allow the LM75 to pull the SDA line LOW to acknowledge
that it successfully received the previous eight bits of data or
address.

Data Byte

After a successful ACK of the address byte, the host must
next transmit the data byte to be written or clock out the data
to be read. (See the appropriate timing diagrams.) ACK will
be generated after a successful write of a data byte into the
LM75.

Stop Condition (STOP)

Communications must be terminated by a stop condition
(a LOW to HIGH transition of SDA while SCL is HIGH).
The Stop Condition must be communicated by the
transmitter to the LM75. (See Timing Diagram)

Power Supply

To minimize temperature measurement error, the
LM75DM–33 is factory calibrated at a supply voltage of

3.3V ±5% and the LM75DM–50 is factory calibrated at a
supply voltage of 5V ±5%. Either device is fully operational
over the power supply voltage range of 2.7V to 5.5V, but
with a lower measurement accuracy. The typical value of
this power supply–related error is ±2°C.

LM75

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1 0 0 1 A2 A1 A0

R/W

D7 D6 D5 D4

91 911

D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

9

91 9911

Start

by

Master

Address Byte

Ack

by

LM75

Most Significant Data Byte

Ack

by

Master

Least Significant Data Byte

No Ack

by

Master

91 9

1

1 0 0 1 A2 A1 A0

R/W

Start

by

Master

Address Byte

Ack

by

LM75

Pointer Byte

Ack

by

LM75

.....

.....

D1 D0000000

Stop

Cond

by

Master

Most Significant Data Byte

Ack

by

Master

Least Significant Data Byte

No Ack

by

Master

Stop

Cond

by

Master

Repeat

Address Byte

Ack

by

LM75

Start

by

Master

1 0 0 1 A2 A1 A0

R/W

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

1 0 0 1 A2 A1 A0

R/W

D7 D6 D5 D4 D3 D2 D1 D0

Start

by

Master

Address Byte

Ack

by

LM75

Data Byte

No Ack

by

Master

Stop

Cond

by

Master

1 0 0 1 A2 A1 A0

R/W

Start

by

Master

Address Byte

Ack

by

LM75

Pointer Byte

1199

1199

Ack

by

LM75

1

10000 000D0 0

Address Byte

Ack

by

LM75

Repeat

Start

by

Master

Data Byte

No Ack

by

Master

Stop

Cond

by

Master

199

0 1 A2 A1 A0

R/W D7 D6 D5 D4 D3 D2 D1 D0

Most Significant Data Byte

Ack

by

LM75

Least Significant Data Byte

Ack

by

LM75

Stop

Cond

by

Master

Start

by

Master

Address Byte

Ack

by

LM75

Pointer Byte

Ack

by

LM75

Configuration Byte

Ack

by

LM75

Stop
Cond

by

Master

119919

1199191

Start

by

Master

Address Byte

Ack

by

LM75

Pointer Byte

Ack

by

LM75

1 0 0 1 A2 A1 A0

R/W

0000 00D1D0 000D4D3D2D1D0

D4 D3 D2 D1 D0D1 D0 D7 D6 D5 D4 D3 D2 D1 D0D7 D6 D5

9

1 0 0 1 A2 A1 A0

R/W

0000 00

(a) Typical 2–Byte Read From Preset Pointer Location Such as Temp, TOS, T

HYST

(b) Typical Pointer Set Followed by Immediate Read for 2–Byte Register Such as Temp, TOS, T

HYST

(c) Typical 1–Byte Read From Configuration Register With Preset Pointer

(d) Typical Pointer Set Followed by Immediate Read from Configuration Register

(e) Configuration Register Write

(f) TOS and T

HYST

Write

Figure 2. Serial Port Operation

LM75

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REGISTER SET AND PROGRAMMER’S MODEL

Register (POINT), 8–bits, Write–only

Pointer Register (POINT)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

Must Be Set To Zero Pointer

Register Selection via the Pointer Register:

D1 D0 Register Selection

0 0 TEMP
0 1 CONFIG
1 0 T

HYST

1 1 T

SET

Configuration Register (CONFIG), 8–bits,
Read/Write

Configuration Register (CONFIG)

D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

Must Be Set

To Zero

Fault

Queue

INT/

CMPTR.

POLAR-

ITY

COMP/

INT.

Shut–
Down

D0: Shutdown: 0 = Normal Operation

1 = Shutdown Mode

D1: CMPTR/INT: 0 = Comparator Mode

1 = Interrupt Mode

D2: INT/CMPTR POLARITY: 0 = Active Low

1 = Active High

D3 – D4: Fault Queue: Number of sequential
temperature–to–digital conversions with the same result
before the INT/CMPTR output is updated:

D4 D3 Number of Conversions

0 0 1 (Power–up–default)
0 1 2
1 0 4
1 1 6

LM75

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Temperature (TEMP) Register, 16–bits, Read–only

The binary value in this register represents ambient

temperature following a conversion cycle.

Temperature Register (TEMP)

D[15] D[14] D[13] D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

MSB D7 D6 D5 D4 D3 D2 D1 LSB X X X X X X X

Temperature Setpoint (T

SET

) and Hysteresis (T

HYST

) Register, 16–bits, Read–Write:

Temperature Setpoint Register (T

SET

)

D[15] D[14] D[13] D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

MSB D7 D6 D5 D4 D3 D2 D1 LSB X X X X X X X

Hysteresis Register (T

HYST

)

D[15] D[14] D[13] D[12] D[11] D[10] D[9] D[8] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]

MSB D7 D6 D5 D4 D3 D2 D1 LSB X X X X X X X

In the TEMP , T

SET

, and T

HYST

registers, each unit value
represents one–half degree (Celsius). The value is in 2’s –
complement binary format such that a reading of
000000000b corresponds to 0°C. Examples of this
temperature to binary value relationship are shown in the
following table.

Temperature to Digital Value Conversion

Temperature Binary Value HEX Value

+125°C 0 11111010 0FA

+25°C 0 00110010 032

+0.5°C 0 00000001 001

0°C 0 00000000 00

— 0.5°C 1 11111111 1FF

— 25°C 1 11001110 1CE
— 40°C 1 10110000 1B0
— 55°C 1 10010010 192

The LM75’s register set is summarized below

Name Description Width Read Write Notes

TEMP Ambient Temperature 16 X 2’s Complement Format

T

SET

T emperature Setpoint 16 X X 2’s Complement Format

T

HYST

Temperature Hysteresis 16 X X 2’s Complement Format

POINT Register Pointer 8 X X

CONFIG Configuration Register 8 X X

LM75

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T APE AND REEL INFORMATION

USER DIRECTION OF FEED

Component Taping Orientation for Micro–8 Devices

Standard Reel Component Orientation
for R2 Suffix Device
(Mark Right Side Up)

Micro–8

Package Tape Width (W) Pitch (P) Part Per Full Reel Diameter

12 mm 4 mm 2500 13 inches

Tape & Reel Specifications Table

PIN 1

MARKING

LM75DM–33

LM75

33

LM75DM–50

LM75

50

LM75

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10

P ACKAGE DIMENSIONS

Micro8

PLASTIC PACKAGE

CASE TBD

ISSUE TBD

Dimensions: inches (mm)

.122 (3.10)

6 MAX.°

PIN 1

.016 (0.40)

.026 (0.65) TYP.

.114 (2.90)

.197 (5.00)
.187 (4.80)

.010 (0.25)

.006 (0.15)

.043 (1.10)

.002 (0.05)

MAX.

.122 (3.10)
.114 (2.90)

.028 (0.70)
.016 (0.40)

.008 (0.20)
.005 (0.13)

LM75

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Notes

LM75

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without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular
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