Page 1
LM4752
Stereo 11W Audio Power Amplifier
n P
at 10%THD@1 kHz into 8Ω bridged TO-263 pkg.
General Description
The LM4752 is a stereo audio amplifier capable of delivering
11W per channel of continuous average output power to a
4Ω load, or 7W per channel into 8Ω using a single 24V supply at 10%THD+N.
The LM4752 is specifically designed for single supply operation and a low external component count. The gain and bias
resistors are integrated on chip, resulting in a 11W stereo
amplifier in a compact 7 pin TO220 package. High output
power levels at both 20V and 24V supplies and low external
component count offer highvalueforcompactstereoandTV
applications. A simple mute function can be implemented
with the addition of a few external components.
Key Specifications
n Output power at 10%THD+N with 1 kHz into 4Ω at V
= 24V 11W (typ)
n Output power at 10%THD+N with 1 kHz into 8Ω at V
= 24V 7W (typ)
n Closed loop gain 34 dB (typ)
n P
at 10%THD@1 kHz into 4Ω Single-ended TO-263
O
pkg. at V
=
12V 2.5W (typ)
CC
CC
CC
O
at V
CC
Features
n Drives 4Ω and 8Ω loads
n Internal gain resistors (A
n Minimum external component requirement
n Single supply operation
n Internal current limiting
n Internal thermal protection
n Compact 7 lead TO-220 package
n Low cost-per-watt
Applications
n Compact stereos
n Stereo TVs
n Mini component stereos
n Multimedia speakers
=
12V 5W (typ)
=34dB)
V
LM4752 Stereo 11W Audio Power Amplifier
February 1999
Typical Application Connection Diagram
Plastic Package
DS100039-2
Package Description
Top View
Order Number LM4752T
Package Number TA07B
DS100039-1
FIGURE 1. Typical Audio Amplifier Application Circuit
© 1999 National Semiconductor Corporation DS100039 www.national.com
Package Description
Top View
Order Number LM4752TS
Package Number TS07B
DS100039-50
Page 2
Absolute Maximum Ratings (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage 40V
Input Voltage
Output Current Internally Limited
Power Dissipation (Note 3) 62.5W
±
0.7V
Storage Temperature −40˚C to 150˚C
Operating Ratings
Temperature Range
≤ TA≤ T
T
MIN
MAX
Supply Voltage 9V to 32V
θ
JC
θ
JA
−40˚C ≤ TA≤ +85˚C
2˚C/W
79˚C/W
ESD Susceptability (Note 4) 2 kV
Junction Temperature 150˚C
Soldering Information
T Package (10 sec) 250˚C
Electrical Characteristics
The following specifications apply to each channel with VCC= 24V, TA= 25˚C unless otherwise specified.
Symbol Parameter Conditions
I
total
P
o
Total Quiescent Power Supply
Current
V
= 0V, Vo= 0V, RL=
INAC
Output Power (Continuous f = 1 kHz, THD+N = 10%,RL=8Ω 7W
Average per Channel) f = 1 kHz, THD+N = 10%,R
V
= 20V, RL=8Ω 4W
CC
V
= 20V, RL=4Ω 7W
CC
f = 1 kHz, THD+N = 10%,R
= 12V, TO-263 Pkg.
V
THD+N Total Harmonic Distortion plus
Noise
V
OSW
X
talk
Output Swing RL=8Ω,VCC= 20V 15 V
Channel Separation See
PSRR Power Supply Rejection Ratio See
V
ODV
Differential DC Output Offset
Voltage
S
f = 1 kHz, P
R
=4Ω,VCC= 20V 14 V
L
= 1 W/ch, RL=8Ω 0.08
o
Figure 1
f = 1 kHz, V
= 4 Vrms, RL=8Ω
o
Figure 1
V
= 22V to 26V, RL=8Ω
CC
V
= 0V 0.09 0.4 V(max)
INAC
∞
=4Ω 10 W(min)
L
=4Ω
L
Typical
(Note 5)
Limit
(Note 6)
10.5 20 mA(max)
7 mA(min)
2.5 W
55 dB
50 dB
SR Slew Rate 2 V/µs
LM4752
R
IN
PBW Power Bandwidth 3 dB BW at P
A
VCL
Input Impedance 83 kΩ
= 2.5W, RL=8Ω 65 kHz
o
Closed Loop Gain (Internally Set) RL=8Ω 34 33 dB(min)
35 dB(max)
e
in
Noise IHF-A Weighting Filter, RL=8Ω 0.2 mVrms
Output Referred
I
o
Note 1: All voltages are measured with respect to the GND pin (4), unless otherwise specified.
Note 2:
tional, but do not guarantee specificperformance limits.
antee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit is
given, however, the typical value is a good indication of device performance.
Note 3: For operating at case temperatures above 25˚C, the device must be derated based on a 150˚C maximum junction temperature and a thermal resistance of
θ
JC
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Typicals are measured at 25˚C and represent the parametric norm.
Note 6: Limits are guarantees that all parts are tested in production to meet the stated values.
Note 7: The TO-263 Package is not recommended for V
Output Short Circuit Current Limit VIN= 0.5V, RL=2Ω 2 A(min)
Absolute Maximum Ratings
= 2˚C/W (junction to case). Refer to the section Determining the Maximum Power Dissipation in the Application Information section for more information.
indicate limits beyondwhich damage to the device may occur.
Electrical Characteristics
>
16V due to impractical heatsinking limitations.
S
state DC and AC electrical specifications underparticular test conditions which guar-
Operating Ratings
indicate conditions forwhich the device is func-
Units
(Limits)
%
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Test Circuit
DS100039-36
FIGURE 2. Test Circuit
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Page 4
Typical Application with Mute
FIGURE 3. Application with Mute Function
DS100039-3
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Page 5
Equivalent Schematic Diagram
DS100039-4
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Page 6
System Application Circuit
FIGURE 4. Circuit for External Components Description
External Components Description
DS100039-5
Components Function Description
1, 2 Cs Provides power supply filtering and bypassing.
3, 4 Rsn Works with Csn to stabilize the output stage from high frequency oscillations.
5, 6 Csn Works with Rsn to stabilize the output stage from high frequency oscillations.
7 Cb Provides filtering for the internally generated half-supply bias generator.
8, 9 Ci Input AC coupling capacitor which blocks DC voltage at the amplifier’s input terminals.
10, 11 Co Output AC coupling capacitor which blocks DC voltage at the amplifier’s output terminal.
12, 13 Ri Voltage control - limits the voltage level to the amplifier’s input terminals.
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Also creates a high pass filter with fc=1/(2
Creates a high pass filter with fc=1/(2
•π•
Rin•Cin).
•π•
Rout•Cout).
Page 7
Typical Performance Characteristics
THD+N vs Output Power
THD+N vs Output Power
THD+N vs Output Power
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DS100039-6
THD+N vs Output Power
THD+N vs Output Power
THD+N vs Output Power
DS100039-13
DS100039-7
THD+N vs Output Power
DS100039-14
THD+N vs Output Power
DS100039-8
THD+N vs Output Power
THD+N vs Output Power
DS100039-15
DS100039-9
THD+N vs Output Power
DS100039-16
DS100039-10
DS100039-17
THD+N vs Output Power
DS100039-11
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Typical Performance Characteristics (Continued)
THD+N vs Output Power
THD+N vs Output Power
THD+N vs Output Power
DS100039-38
DS100039-41
THD+N vs Output Power
THD+N vs Output Power
THD+N vs Output Power
DS100039-39
DS100039-42
THD+N vs Output Power
DS100039-40
THD+N vs Output Power
DS100039-43
THD+N vs Output Power
DS100039-44
THD+N vs Output Power
DS100039-47
THD+N vs Output Power
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DS100039-45
DS100039-48
DS100039-46
THD+N vs Output Power
DS100039-49
Page 9
Typical Performance Characteristics (Continued)
Output Power vs Supply Voltage
DS100039-18
THD+N vs Frequency
DS100039-21
Channel Separation
Output Power vs Supply Voltage
DS100039-19
THD+N vs Frequency
DS100039-22
PSRR vs Frequency
Frequency Response
DS100039-20
Frequency Response
DS100039-23
Supply Current vs
Supply Voltage
Power Derating Curve
DS100039-24
DS100039-27
DS100039-25
Power Dissipation vs Output Power
DS100039-28
DS100039-26
Power Dissipation vs Output Power
DS100039-29
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Page 10
Typical Performance Characteristics (Continued)
Power Dissipation vs Output Power
DS100039-51
Power Dissipation vs Output Power
Application Information
CAPACITOR SELECTION AND FREQUENCY
RESPONSE
With the LM4752, as in all single supply amplifiers, AC coupling capacitors are used to isolate the DC voltage present at
the inputs (pins 2,6) and outputs (pins 1,7). As mentioned
earlier in the External Components section these capacitors create high-pass filters with their corresponding input/
output impedances. The TypicalApplication Circuit shown
in
Figure 1
1,000 µF respectively. At the input, with an 83 kΩ typical input resistance, the result is a high pass 3 dB point occurring
at 19 Hz. There is another high pass filter at 39.8 Hz created
with the output load resistance of 4Ω. Careful selection of
these components is necessary to ensure that the desired
frequency response is obtained. The Frequency Response
curves in the Typical Performance Characteristics section
show how different output coupling capacitors affect the low
frequency rolloff.
APPLICATION CIRCUIT WITH MUTE
With the addition of a few external components, a simple
mute circuit can be implemented, such as the one shown in
Figure 3
half supply bias line (pin 5), effectively shutting down the input stage.
When using an external circuit to pull down the bias, care
must be taken to ensure that this line is not pulled down too
quickly, or output “pops” or signal feedthrough may result. If
the bias line is pulled down too quickly, currents induced in
the internal bias resistors will cause a momentary DC voltage to appear across the inputs of each amplifier’s internal
shows input and output capacitors of 0.1 µF and
. This circuit works by externally pulling down the
DS100039-52
differential pair, resulting in an output DC shift towards
V
. An R-C timing circuit should be used to limit the
SUPPLY
pull-down time such that output “pops” and signal
feedthroughs will be minimized. The pull-down timing is a
function of a number of factors, including the external mute
circuitry, the voltage used to activate the mute, the bias capacitor, the half-supply voltage, and internal resistances
used in the half-supply generator.
Table1
shows a list of rec-
ommended values for the external mute circuitry.
TABLE 1. Values for Mute Circuit
V
R1 R2 C1 R3 C
MUTE
V
B
CC
5V 10 kΩ 10 kΩ 4.7 µF 360Ω 100 µF 21V–32V
V
20 kΩ 1.2 kΩ 4.7 µF 180Ω 100 µF 15V–32V
S
V
20 kΩ 910Ω 4.7 µF 180Ω 47 µF 22V–32V
S
OPERATING IN BRIDGE-MODE
Though designed for use as a single-ended amplifier, the
LM4752 can be used to drive a load differentially (bridgemode). Due to the low pin count of the package, only the
non-inverting inputs are available. An inverted signal must
be provided to one of the inputs. This can easilybe done with
the use of an inexpensive op-amp configured as a standard
inverting amplifier.An LF353 is a good low-cost choice. Care
must be taken, however, for a bridge-mode amplifier must
theoretically dissipate four times the power of a single-ended
type. The load seen by each amplifier is effectively half that
of the actual load being used, thus an amplifier designed to
drive a 4Ω load in single-ended mode should drive an 8Ω
load when operating in bridge-mode.
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Page 11
Application Information (Continued)
FIGURE 5. Bridge-Mode Application
DS100039-30
DS100039-31 DS100039-37
FIGURE 6. THD+N vs. P
PREVENTING OSCILLATIONS
With the integration of the feedback and bias resistors onchip, theLM4752 fits into a very compact package. However,
due to the close proximity of the non-inverting input pins to
the corresponding output pins, the inputs should be AC terminated at all times. If the inputs are left floating, the amplifier will have a positive feedback path through high impedance coupling, resulting in a high frequency oscillation. In
most applications, this termination is typically provided by
the previous stage’s source impedance. If the application will
require an external signal, the inputs should be terminated to
ground with a resistance of 50 kΩ or less on the AC side of
the input coupling capacitors.
for Bridge-Mode Application
OUT
UNDERVOLTAGE SHUTDOWN
If the power supply voltage drops below the minimum operating supply voltage, the internal under-voltage detection circuitry pulls down the half-supply bias line, shutting down the
preamp section of the LM4752. Due to the wide operating
supply range of the LM4752, the threshold is set to just under 9V. There may be certain applications where a higher
threshold voltage is desired. One example is a design requiring a high operating supply voltage, with large supply and
bias capacitors, and there is little or no other circuitry connected to the main power supply rail. In this circuit, when the
power is disconnected, the supply and bias capacitors will
discharge at a slower rate, possibly resulting in audible output distortion as the decaying voltage begins to clip the out-
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Page 12
Application Information (Continued)
put signal. An external circuit may be used to sense for the
desired threshold, and pull the bias line (pin5) to ground to
disable the input preamp.
such a circuit. When the voltage across the zener diode
drops below its threshold, current flow into the base of Q1 is
interrupted. Q2 then turns on, discharging the bias capacitor.
This discharge rate is governed by several factors, including
the bias capacitor value, the bias voltage, and the resistor at
the emitter of Q2.An equation for approximating the value of
the emitter discharge resistor, R, is given below:
R = (0.7V) / (C
Note that this is only a linearized approximation based on a
discharge time of 0.1s. The circuit should be evaluated and
adjusted for each application.
As mentioned earlier in the Application Circuit with Mute
section, when using an external circuit to pull down the bias
line, the rate of discharge will have an effect on the turn-off
induced distortions. Please refer to the Application Circuit
with Mute section for more information.
FIGURE 7. External Undervoltage Pull-Down
THERMAL CONSIDERATIONS
Heat Sinking
Proper heatsinking is necessary to ensure that the amplifier
will function correctly under all operating conditions. A heatsink that is too small will cause the die to heat excessively
and will result in a degraded output signal as the internal
thermal protection circuitry begins to operate.
The choice of a heatsink for a given application is dictated by
several factors: the maximum power the IC needs to dissipate, the worst-case ambient temperature of the circuit, the
junction-to-case thermal resistance, and the maximum junction temperature of the IC. The heat flow approximation
equation used in determining the correct heatsink maximum
thermal resistance is given below:
T
J–TA=PDMAX
where:
= maximum power dissipation of the IC
P
DMAX
(˚C) = junction temperature of the IC
T
J
(˚C) = ambient temperature
T
A
(˚C/W) = junction-to-case thermal resistance of the IC
θ
JC
(˚C/W) = case-to-heatsink thermal resistance (typically
θ
CS
0.2 to 0.5 ˚C/W)
θ
(˚C/W) = thermal resistance of heatsink
SA
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Figure 7
shows an example of
(VS/ 2) / 0.1s)
•
B
(θJC+ θCS+ θSA)
•
DS100039-32
When determining the proper heatsink, the above equation
should be re-written as:
θ
≤ [(TJ−TA)/P
SA
DMAX
]−θJC− θ
CS
TO-263 HEATSINKING
Surface mount applications will be limited by the thermal dissipation properties of printed circuit board area. The TO-263
package is not recommended for surface mount applications
>
with V
There are TO-263 package enhancements, such as clip-on
16V due to limited printed circuit board area.
S
heatsinks and heatsinks with adhesives, that can be used to
improve performance.
Standard FR-4 single-sided copper clad will have an approximate Thermal resistance (θ
1.5 x 1.5 in. sq. 20–27˚C/W (T
2 x 2 in. sq. 16–23˚C/W
The above values for θ
proportions (i.e. variations in width and length will vary θ
SA
) ranging from:
SA
=28˚C, Sine wave
A
testing, 1 oz. Copper)
vary widely due to dimensional
SA
For audio applications, where peak power levels are short in
duration, this part will perform satisfactory with less
heatsinking/copper clad area.As with any high power design
proper bench testing should be undertaken to assure the design can dissipate the required power. Proper bench testing
requires attention to worst case ambient temperature and air
flow.At high power dissipation levels the part will show a tendency to increase saturation voltages, thus limiting the undistorted power levels.
Determining Maximum Power Dissipation
For a single-ended class AB power amplifier, the theoretical
maximum power dissipation point is a function of the supply
voltage, V
following equation:
(single channel)
, and the load resistance, RLand is given by the
S
2
P
DMAX
(W)=[V
S
2
/(2•π
•
RL)]
The above equation is for a single channel class-AB power
amplifier. For dual amplifiers such as the LM4752, the equation for calculating the total maximum power dissipated is:
(dual channel)
P
DMAX
or
(Bridged Outputs)
(W) = 4[V
P
DMAX
(W)=2•[V
2
V
S
2
2
/(2π
S
/(π
•
S
2
RL)]
2
/(2•π
RL)
•
2
RL)]
•
Heatsink Design Example:
Determine the system parameters:
V
= 24V Operating Supply Voltage
S
R
=4Ω Minimum load impedance
L
T
= 55˚C Worst case ambient temperature
A
Device parameters from the datasheet:
T
= 150˚C Maximum junction temperature
J
θ
= 2˚C/W Junction-to-case thermal resistance
JC
Calculations:
2
P
=2•[V
•
DMAX
≤ [(TJ−TA)/P
θ
SA
/ 14.6W ] − 2˚C/W − 0.2˚C/W = 4.3˚C/W
S
DMAX
Conclusion: Choose a heatsink with θ
2
2
/(2•π
RL) ] = (24V)2/(2•π
•
4Ω) = 14.6W
]−θJC− θCS= [ (150˚C − 55˚C)
≤ 4.3˚C/W.
SA
2
).
•
Page 13
Application Information (Continued)
TO-263 HEATSINK DESIGN EXAMPLES:
Example 1: (Stereo Single-Ended Output)
Given: T
P
DMAX
Calculating P
P
DMAX
Calculating Heatsink Thermal Resistance:
θ
SA
Therefore the recommendation is to use 1.5 x 1.5 square
inch of single-sided copper clad.
Example 2: (Stereo Single-Ended Output)
Given: T
P
DMAX
Calculating P
P
DMAX
Calculating Heatsink Thermal Resistance:
θ
SA
Therefore the recommendation is to use 2.0 x 2.0 square
inch of single-sided copper clad.
Example 3: (Bridged Output)
Given: T
Calculating P
P
DMAX
Calculating Heatsink Thermal Resistance:
θ
SA
Therefore the recommendation is to use 2.0 x 2.0 square
inch of single-sided copper clad.
=
30˚C
A
=
150˚C
T
J
=
4Ω
R
L
=
12V
V
S
=
2˚C/W
θ
JC
from PDvs POGraph:
≈ 3.7W
P
DMAX
:
DMAX
2
=
/(π2RL)=(12V)2/ π2(4Ω))=3.65W
V
CC
<
[(TJ−TA)/P
θ
SA
<
120˚C / 3.7W − 2.0˚C/W − 0.2˚C/W=30.2˚C/W
=
50˚C
A
=
150˚C
T
J
=
4Ω
R
L
=
12V
V
S
=
2˚C/W
θ
JC
DMAX
]−θJC− θ
CS
from PDvs POGraph:
≈ 3.7W
P
DMAX
:
DMAX
2
=
/(π2RL)=(12V)2/(π2(4Ω))=3.65W
V
CC
<
[(TJ−TA)/P
θ
SA
<
100˚C / 3.7W − 2.0˚C/W − 0.2˚C/W=24.8˚C/W
=
50˚C
A
=
150˚C
T
J
=
8Ω
R
L
=
12V
V
S
=
2˚C/W
θ
JC
:
DMAX
2
=
<
/(2π2RL)]=4(12V)2/(2π2(8Ω))=3.65W
4[V
CC
<
[(TJ−TA)/P
θ
SA
100˚C / 3.7W − 2.0˚C/W − 0.2˚C/W=24.8˚C/W
DMAX
DMAX
]−θJC− θ
]−θJC− θ
CS
CS
Layout and Ground Returns
Proper PC board layout is essential for good circuit performance. When laying out a PC board for an audio power amplifer, particular attention must be paid to the routing of the
output signal ground returns relative to the input signal and
bias capacitor grounds. To prevent any ground loops, the
ground returns for the output signals should be routed separately and brought together at the supply ground. The input
signal grounds and the bias capacitor ground line should
also be routed separately. The 0.1 µF high frequency supply
bypass capacitor should be placed as close as possible to
the IC.
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Page 14
Application Information (Continued)
PC BOARD LAYOUT— COMPOSITE
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DS100039-33
Page 15
Application Information (Continued)
PC BOARD LAYOUT— SILK SCREEN
DS100039-34
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Page 16
Application Information (Continued)
PC BOARD LAYOUT— SOLDER SIDE
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DS100039-35
Page 17
Physical Dimensions inches (millimeters) unless otherwise noted
Order Number LM4752T
NS Package Number TA07B
Order Number LM4752TS
NS Package Number TS7B
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Page 18
LM4752 Stereo 11W Audio Power Amplifier
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
National Semiconductor
Corporation
Americas
Tel: 1-800-272-9959
Fax: 1-800-737-7018
Email: support@nsc.com
www.national.com
National Semiconductor
Europe
Fax: +49 (0) 1 80-530 85 86
Email: europe.support@nsc.com
Deutsch Tel: +49 (0) 1 80-530 85 85
English Tel: +49 (0) 1 80-532 78 32
Français Tel: +49 (0) 1 80-532 93 58
Italiano Tel: +49 (0) 1 80-534 16 80
2. A critical component is any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
National Semiconductor
Asia Pacific Customer
Response Group
Tel: 65-2544466
Fax: 65-2504466
Email: sea.support@nsc.com
National Semiconductor
Japan Ltd.
Tel: 81-3-5639-7560
Fax: 81-3-5639-7507
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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