Page 1
September 2003
LM3702/LM3703
Microprocessor Supervisory Circuits with Low Line
Output and Manual Reset
General Description
The LM3702/LM3703 series of microprocessor supervisory
circuits provide the maximum flexibility for monitoring power
supplies and battery controlled functions in systems without
backup batteries. The LM3702/LM3703 series are available
in a 9-bump micro SMD package.
Built-in features include the following:
Reset: Reset is asserted during power-up, power-down, and
brownout conditions. RESET is guaranteed down to V
1.0V.
Manual Reset Input: An input that asserts reset when pulled
low.
Low Line Output: This early power failure warning indicator
goes low when the supply voltage drops to a value which is
2% higher than the reset threshold voltage.
CC
Features
n Standard Reset Threshold voltage: 3.08V
n Custom Reset Threshold voltages: For other voltages
between 2.2V and 5.0V in 10mV increments, contact
National Semiconductor Corp.
n No external components required
n Manual-Reset input
n RESET (LM3702) or RESET (LM3703) outputs
n Precision supply voltage monitor
n Factory programmable Reset Timeout Delay
n Available in micro SMD package for minimum footprint
±
n
0.5% Reset threshold accuracy at room temperature
±
n
2% Reset threshold accuracy over temperature
of
extremes
n Reset assertion down to 1V V
n 28 µA VCCsupply current
(RESET option only)
CC
Applications
n Embedded Controllers and Processors
n Intelligent Instruments
n Automotive Systems
n Critical µP Power Monitoring
LM3702/LM3703 Microprocessor Supervisory Circuits with Low Line Output and Manual Reset
Typical Application
20011503
© 2003 National Semiconductor Corporation DS200115 www.national.com
Page 2
Connection Diagram
Top View
(looking from the coating side)
micro SMD 9 Bump Package
BPA09
LM3702/LM3703
20011501
Pin Descriptions
Bump No. Name Function
A1 MR
B1 V
CC
C1 RESET
RESET Reset Logic Output. RESET is the inverse of RESET (LM3703 only).
C3 LLO Low-Line Logic Output. Early Power-Fail warning output. Low when VCCfalls below V
B3 GND Ground reference for all signals.
A2, A3, C2 NC No Connect.
B2 NC No Connect. Test input used at factory only. Leave floating.
Manual-Reset input. When MR is less than V
RESET/RESET is engaged.
Power Supply input.
Reset Logic Output. Pulses low for tRP(Reset Timeout Period) when triggered, and stays
low whenever V
is below the reset threshold or when MR is below V
CC
for tRPafter either VCCrises above the reset threshold, or after MR input rises above
V
(LM3702 only).
MRT
(Low-Line Output Threshold). This output can be used to generate an NMI (Non-Maskable
Interrupt) to provide an early warning of imminent power-failure.
(Manual Reset Threshold)
MRT
. It remains low
MRT
LLOT
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Page 3
Block Diagram
LM3702/LM3703
20011505
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Page 4
Ordering Information
LM3702/LM3703
*For other voltages between 2.2V and 5.0V, please contact National Semiconductor sales office.
20011504
LM3702/LM3703
Reset
Part Number Output
LM3702XCBP-308 totem-pole 200ms %%I2
LM3702XCBPX-308 totem-pole 200ms %%I2
LM3703XCBP-308 totem-pole 200ms %%I3
LM3703XCBPX-308 totem-pole 200ms %%I3
LM3703XDBP-308 totem-pole 1600ms %%124
LM3703XDBPX-308 totem-pole 1600ms %%124
LM3702YABP-308 open-drain 1.4ms %%131
LM3702ABPX-308 open-drain 1.4ms %%131
LM3702YDBP-220 open-drain 1600ms %%125
LM3702YDBPX-220 open-drain 1600ms %%125
%% is the datecode and will vary with time.
Timeout
Period
Package
Marking
Table Of Functions
Part
Number
LM3702 x X, Y* Customized x x
LM3703 x X Customized x x
* = available upon request. Contact National
Active
Low
Reset
Active
High
Reset
Output
(X = totem-pole)
(Y = open-drain)
Reset
Timeout
Period
Manual
Reset
Low
Line
Output
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Page 5
LM3702/LM3703
Absolute Maximum Ratings (Note 1)
Power Dissipation (Note 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
All Other Inputs −0.3V to V
) −0.3V to 6.0V
CC
CC
+ 0.3V
Operating Ratings (Note 1)
Temperature Range −40˚C ≤ T
≤ 85˚C
J
ESD Ratings (Note 2)
Human Body Model
Machine Model
1.5kV
150V
LM3702/LM3703 Series Electrical Characteristics
Limits in the standard typeface are for TJ= 25˚C and limits in boldface type apply over full operating range. Unless otherwise
specified: V
Symbol Parameter Conditions Min Typ Max Units
POWER SUPPLY
V
CC
I
CC
RESET THRESHOLD
V
RST
V
RSTH
t
RP
t
RD
RESET (LM3703)
V
OL
V
OH
I
LKG
RESET (LM3702)
V
OL
V
OH
= +2.2V to 5.5V.
CC
Operating Voltage
Range: V
CC
VCCSupply
LM3702 1.0 5.5
LM3703 1.2 5.5
All inputs = VCC; all outputs floating 28 50 µA
Current
Reset Threshold VCCfalling −0.5
−2
falling: TA= 0˚C to 70˚C −1.5 +1.5
V
CC
Reset Threshold
Hysteresis
Reset Timeout
Period
VCCto Reset
Reset Timeout Period = A
Reset Timeout Period = B
Reset Timeout Period = C
Reset Timeout Period = D
1
20
140
1120
VCCfalling at 1mV/µs 20 µs
Delay
V
V
V
V
V
V
>
2.25V, I
CC
>
2.7V, I
CC
>
4.5V, I
CC
>
1.2V, I
CC
>
1.8V, I
CC
>
2.25V, I
CC
>
2.7V, I
CC
>
4.5V, I
CC
= 5.5V 1.0 µA
RESET
= 900µA 0.3
SINK
= 1.2mA 0.3
SINK
= 3.2mA 0.4
SINK
SOURCE
SOURCE
SOURCE
SOURCE
= 50µA 0.8 V
= 150µA 0.8 V
SOURCE
= 300µA 0.8 V
= 500µA 0.8 V
= 800µA VCC− 1.5V
RESET V
RESET V
Output Leakage
Current
RESET V
RESET V
>
1.0V, I
CC
>
V
1.2V, I
CC
>
V
2.25V, I
CC
>
V
2.7V, I
CC
>
V
4.5V, I
CC
>
2.25V, I
CC
>
V
2.7V, I
CC
>
V
4.5V, I
CC
= 50µA 0.3
SINK
= 100µA 0.3
SINK
= 900µA 0.3
SINK
= 1.2mA 0.3
SINK
= 3.2mA 0.4
SINK
SOURCE
SOURCE
SOURCE
= 300µA 0.8 V
= 500µA 0.8 V
= 800µA VCC− 1.5V
+0.5
V
RST
0.0032•V
RST
1.4
28
200
1600
CC
CC
CC
CC
CC
CC
+2
mV
2
40
280
2240
V
%
ms
VV
V
V
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Page 6
LM3702/LM3703 Series Electrical Characteristics (Continued)
Limits in the standard typeface are for TJ= 25˚C and limits in boldface type apply over full operating range. Unless otherwise
specified: V
Symbol Parameter Conditions Min Typ Max Units
MR
LM3702/LM3703
V
MRT
V
MRTH
R
MR
t
MD
t
MR
LLO
V
OL
V
OH
LLO OUTPUT
V
LLOT
V
LLOTH
t
CD
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device
is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the
listed conditions.
Note 2: The Human Body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin.
Note 3: The maximum allowable power dissipation is a function of the maximum junction temperature, T
and the ambient temperature, T
= +2.2V to 5.5V.
CC
MR Input
Threshold
MR Threshold
MR, Low
MR, High
MR falling: V
CC=VRST MAX
2.0
to 5.5V 0.0032•V
0.8
RST
Hysteresis
MR Pull-up
35 56 75 kΩ
Resistance
MR to Reset
12 µS
Delay
MR Pulse Width 25 µS
>
LLO Output
Voltage
LLO Output
V
2.25V, I
CC
>
2.7V, I
V
CC
>
V
4.5V, I
CC
>
V
2.25V, I
CC
>
V
2.7V, I
CC
>
V
4.5V, I
CC
= 900µA 0.3
SINK
= 1.2mA 0.3
SINK
= 3.2mA 0.4
SINK
SOURCE
SOURCE
SOURCE
= 300µA 0.8 V
= 500µA 0.8 V
CC
CC
= 800µA VCC− 1.5V
V
1.01
•
RST
1.02•V
RST
1.03•V
Threshold
(V
LLO−VRST,VCC
falling)
Low-Line
0.0032
V
•
RST
Comparator
Hysteresis
Low-Line
VCCfalling at 1mV/µs 20 µs
Comparator Delay
(MAX), the junction-to-ambient thermal resistance, θ
. The maximum allowable power dissipation at any ambient temperture is calculated using:
A
J
RST
V
mV
V
V
mV
J-A
,
Where the value of θ
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for the micro SMD package is 220˚C/W.
J-A
Page 7
Typical Performance Characteristics
Supply Current vs Supply Voltage 3.3V Supply Current vs Temperature
LM3702/LM3703
20011515
Normalized Reset Threshold Voltage vs Temperature Reset Timeout Period vs V
20011512
Max. Transient Duration vs Reset Comparator Overdrive
Reset Timeout Period vs Temperature
(VCC= 3.3V)
20011511
CC
20011532
20011510
20011516
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Page 8
Typical Performance Characteristics (Continued)
Low-Line Comparator Propagation Delay vs Temperature
LM3702/LM3703
20011514
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Page 9
Circuit Information
RESET OUTPUT
The Reset input of a µP initializes the device into a known
state. The LM3702/LM3703 microprocessor supervisory circuits assert a forced reset output to prevent code execution
errors during power-up, power-down, and brownout conditions.
>
RESET is guaranteed valid for V
ceeds the reset threshold, an internal timer maintains the
output for the reset timeout period. After this interval, reset
goes high. The LM3702 offers an active-low RESET; The
LM3703 offers an active-high RESET.
Any time V
drops below the reset threshold (such as
CC
during a brownout), the reset activates. When V
rises above the reset threshold, the internal timer starts.
Reset holds until V
exceeds the reset threshold for longer
CC
than the reset timeout period. After this time, reset releases.
The Manual Reset input (MR) will initiate a forced reset also.
See the Manual Reset Input section.
RESET THRESHOLD
The LM3702/LM3703 family is available with a reset voltage
of 3.08V. Other reset thresholds in the 2.20V to 5.0V range,
in steps of 10 mV, are available; contact National Semiconductor for details.
MANUAL RESET INPUT (MR)
Many µP-based products require a manual reset capability,
allowing the operator to initiate a reset. The MR input is fully
debounced and provides an internal 56 kΩ pull-up. When the
MR input is pulled below V
(1.225V) for more than 25 µs,
MRT
reset is asserted after a typical delay of 12 µs. Reset remains
active as long as MR is held low, and releases after the reset
1V. Once VCCex-
CC
again
CC
timeout period expires after MR rises above V
MRT
. Use MR
with digital logic to assert or to daisy chain supervisory
circuits. It may be used as another low-line comparator by
adding a buffer.
LOW-LINE OUTPUT (LLO)
The low-line output comparator is typically used to provide a
non-maskable interrupt to a µP when V
monitors VCCand goes low when VCCfalls below V
(typically 1.02•V
) with hysteresis of 0.0032•V
RST
begins falling. LLO
CC
RST
LLOT
.
SPECIAL PRECAUTIONS FOR THE MICRO SMD PACKAGE
As with most integrated circuits, the LM3702 and LM3703
are sensitive to exposure from visible and infrared (IR) light
radiation. Unlike a plastic encapsulated IC, the micro SMD
package has very limited shielding from light, and some
sensitivity to light reflected from the surface of the PC board
or long wavelength IR entering the die from the side may be
experienced. This light could have an unpredictable affect on
the electrical performance of the IC. Care should be taken to
shield the device from direct exposure to bright visible or IR
light during operation.
MICRO SMD MOUNTING
The micro SMD package requires specific mounting techniques which are detailed in National Semiconductor Application Note AN-1112. Referring to the section Surface
Mount Technology (SMT) Assembly Considerations,it
should be noted that the pad style which must be used with
the 9-pin package is the NSMD (non-solder mask defined)
type.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
LM3702/LM3703
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Timing Diagrams
LM3702/LM3703
20011528
FIGURE 1. LM3702 Reset Time with MR
FIGURE 2. LLO Output
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20011529
Page 11
Typical Application Circuits
LM3702/LM3703
FIGURE 3. LM3703 Power-On Delay
20011524
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Typical Application Circuits (Continued)
LM3702/LM3703
20011522
FIGURE 4. Regulator/Switch with Long-Term Overvoltage Lockout Prevents Overdissipation in Linear Regulator
20011531
FIGURE 5. Switch Debouncer
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Page 13
Physical Dimensions inches (millimeters)
unless otherwise noted
LM3702/LM3703 Microprocessor Supervisory Circuits with Low Line Output and Manual Reset
NOTES: UNLESS OTHERWISE SPECIFIED
1. EPOXY COATING
2. 63Sn/37Pb EUTECTIC BUMP
3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD.
4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION. REMAINING PINS ARE NUMBERED COUNTER
CLOCKWISE.
5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS
PACKAGE HEIGHT.
6.NO JEDEC REGISTRATION AS OF AUG.1999.
9 bump micro SMD Package
NS Package Number BPA09FFB
The dimensions of X1, X2 and X3 are given below
X1 = 1.412mm
X2 = 1.412mm
X3 = 0.850mm
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
labeling, can be reasonably expected to result in a
significant injury to the user.
National Semiconductor
Americas Customer
Support Center
Email: new.feedback@nsc.com
Tel: 1-800-272-9959
www.national.com
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
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