Datasheet LM3146N, LM3146MX Datasheet (NSC)

Page 1
TL/H/7959
LM3146 High Voltage Transistor Array
February 1995
LM3146 High Voltage Transistor Array
General Description
The LM3146 consists of five high voltage general purpose silicon NPN transistors on a common monolithic substrate. Two of the transistors are internally connected to form a differentially-connected pair. The transistors are well suited to a wide variety of applications in low power system in the dc through VHF range. They may be used as discrete tran­sistors in conventional circuits however, in addition, they provide the very significant inherent integrated circuit ad­vantages of close electrical and thermal matching. The LM3146 is supplied in a 14-lead molded dual-in-line pack­age for applications requiring only a limited temperature range.
Features
Y
High voltage matched pairs of transistors, VBEmatched
g
5 mV, input offset current 2 mA max at I
C
e
1mA
Y
Five general purpose monolithic transistors
Y
Operation from dc to 120 MHz
Y
Wide operating current range
Y
Low noise figure 3.2 dB typ at 1 kHz
Applications
Y
General use in all types of signal processing systems operating anywhere in the frequency range from dc to VHF
Y
Custom designed differential amplifiers
Y
Temperature compensated amplifiers
Connection Diagram
Dual-In-Line and Small Outline Packages
TL/H/7959– 1
Top View
Order Number LM3146M or LM3146N
See NS Package Number M14A or N14A
C
1995 National Semiconductor Corporation RRD-B30M115/Printed in U. S. A.
Page 2
Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
LM3146 Units
Power Dissipation: Each transistor
T
A
e
25§Cto55§C 300 mW
T
A
l
55§C Derate at 6.67 mW/§C
Power Dissipation: Total Package
T
A
e
25§C 500 mW
T
A
l
25§C Derate at 6.67 mW/§C
Collector to Emitter Voltage, V
CEO
30 V
Collector to Base Voltage, V
CBO
40 V
Collector to Substrate Voltage,
V
CIO
(Note 1) 40 V
Emitter to Base Voltage, V
EBO
(Note 2) 5 V
Collector to Current, I
C
50 mA
Operating Temperature Range
b
40 toa85§C
Storage Temperature Range
b
65 toa150§C
Soldering Information
Dual-In-Line Package
Soldering (10 seconds) 260
§
C
Small Outline Package
Vapor Phase (60 seconds) 215
§
C
Infrared (15 seconds) 220
§
C
See AN-450 ‘‘Surface Mounting Methods and Their Effect on Product Reliability’’ for other methods of soldering sur­face mount devices.
DC Electrical Characteristics T
A
e
25§C
Symbol Parameter Conditions
Limits
Units
Min Typ Max
V
(BR)CBO
Collector to Base Breakdown Voltage I
C
e
10 mA, I
E
e
04072 V
V
(BR)CEO
Collector to Emitter Breakdown Voltage I
C
e
1 mA, I
B
e
03056 V
V
(BR)CIO
Collector to Substrate Breakdown I
CI
e
10 mA, I
B
e
0,
40 72 V
Voltage I
E
e
0
V
(BR)EBO
Emitter to Base Breakdown Voltage
I
C
e
0, I
E
e
10 mA57 V
(Note 2)
I
CBO
Collector Cutoff Current V
CB
e
10V, I
E
e
0 0.002 100 nA
I
CEO
Collector Cutoff Current V
CE
e
10V, I
B
e
0 (Note 3) 5 mA
h
FE
Static Forward Current Transfer I
C
e
10 mA, V
CE
e
5V 85
Ratio (Static Beta) I
C
e
1 mA, V
CE
e
5V 30 100
I
C
e
10 mA, V
CE
e
5V 90
IB1–I
B2
Input Offset Current for Matched I
C1
e
1
C2
e
1 mA,
0.3 2 mA
Pair Q1 and Q2 V
CE
e
5V
V
BE
Base to Emitter Voltage I
C
e
1 mA, V
CE
e
3V 0.63 0.73 0.83 V
V
BE1–VBE2
Magnitude of Input Offset Voltage V
CE
e
5V, I
E
e
1mA
0.48 5 mV
for Differential Pair
DVBE/DT Temperature Coefficient of Base V
CE
e
5V, I
E
e
1mA
b
1.9 mV/§C
to Emitter Voltage
V
CE(SAT)
Collector to Emitter Saturation I
C
e
10 mA, I
B
e
1mA
0.33 V
Voltage
DV10/DT Temperature Coefficient of Input I
C
e
1 mA, V
CE
e
5V
1.1 mV/
§
C
Offset Voltage
Note 1: The collector of each transistor is isolated from the substrate by an integral diode. The substrate must be connected to a voltage which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor action. To avoid undesired coupling between transistors, the substrate terminal should be maintained at either dc or signal (ac) ground. A suitable bypass capacitor can be used to establish a signal ground.
Note 2: If the transistors are forced into zener breakdown (V
(BR)EBO
), degradation of forward transfer current ratio (hFE) can occur.
Note 3: See curve.
2
Page 3
AC Electrical Characteristics
Symbol Parameter Conditions
Limits
Units
Min Typ Max
NF Low Frequency Noise Figure fe1 kHz, V
CE
e
5V,
3.25 dB
I
C
e
100 mA, R
S
e
1kX
f
T
Gain Bandwidth Product V
CE
e
5V, I
C
e
3 mA 300 500 MHz
C
EB
Emitter to Base Capacitance V
EB
e
5V, I
E
e
0 0.70 pF
C
CB
Collector to Base Capacitance V
CB
e
5V, I
C
e
0 0.37 pF
C
CI
Collector to Substrate Capacitance V
CI
e
5V, I
C
e
0 2.2 pF
Low Frequency, Small Signal Equivalent Circuit Characteristics
h
fe
Forward Current Transfer Ratio fe1 kHz, V
CE
e
3V, I
C
e
1 mA 100
h
ie
Short Circuit Input Impedance fe1 kHz, V
CE
e
3V, I
C
e
1 mA 3.5 kX
h
oe
Open Circuit Output Impedance fe1 kHz, V
CE
e
3V, I
C
e
1 mA 15.6 mmho
h
re
Open Circuit Reverse Voltage fe1 kHz, V
CE
e
3V, 1.8 x 10
b
4
Transfer Ratio I
C
e
1mA
Admittance Characteristics
Y
fe
Forward Transfer Admittance fe1 MHz, V
CE
e
3V, I
C
e
1mA 31bj 1.5 mmho
Y
ie
Input Admittance fe1 MHz, V
CE
e
3V, I
C
e
1 mA 0.3aj 0.04 mmho
Y
oe
Output Admittance fe1 MHz, V
CE
e
3V, I
C
e
1 mA 0.001aj 0.03 mmho
Y
re
Reverse Transfer Admittance fe1 MHz, V
CE
e
3V, I
C
e
1 mA (Note 3) mmho
Note 1: The collector of each transistor is isolated from the substrate by an integral diode. The substrate must be connected to a voltage which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor action. To avoid undesired coupling between transistors, the substrate terminal should be maintained at either dc or signal (ac) ground. A suitable bypass capacitor can be used to establish a signal ground.
Note 2: If the transistors are forced into zener breakdown (V
(BR)EBO
), degradation of forward transfer current ratio (hFE) can occur.
Note 3: See curve.
3
Page 4
Typical Performance Characteristics
Any Transistor
I
CEO
vs TAfor
Any Transistor
I
CBO
vs TAfor
Any Transistor
hFEvs ICfor
Any Transistor
V
BE
vs TAfor
for Any Transistor
V
CE(SAT)
vs I
C
IIOvs IC(Q1 and Q2)
V
IO
vs TAfor Q1 and Q2 IEfor Q1 and Q2
V
BE
and VIOvs
NF vs I
C
@
R
S
e
500X
TL/H/7959– 2
4
Page 5
Typical Performance Characteristics (Continued)
NF vs I
C
@
R
S
e
1kX NF vs I
C
e
R
S
e
10 kX hfe,hie,hoe,hrevs I
C
Yfevs f Yievs f Yoevs f
Y
re
vs f fTvs I
C
Voltage
C
EB,CCB,CCI
vs Bias
TL/H/7959– 3
5
Page 6
LM3146 High Voltage Transistor Array
Physical Dimensions inches (millimeters)
SO Package (M)
Order Number LM3146M
NS Package Number M14A
Molded Dual-In-Line Package (N)
Order Number LM3146N
NS Package Number N14A
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