Datasheet LM2469TA Datasheet (NSC)

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LM2469 Monolothic Triple 9nS High Gain CRT Driver
LM2469 Monolothic Triple 9nS High Gain CRT Driver
October 2000
General Description
The LM2469 is an integrated high voltage CRT driver circuit designed for use in color monitor applications. The IC con­tains three high input impedance wide band amplifiers, which directly drive the RGB cathodes of a CRT. Each channel has its gain internally set to -20 and can drive CRT capacitive loads as well as resistive loads present in other applications, limitedonly by the package’s power dissipation.
The IC is packaged in an industry standard 9 lead TO-220 molded plastic package.
n 0V to 3.75V input range n Stable with 0-20pF capacitive loads and inductive
peaking networks
n Maintains standard LM243X Family Pinout which is
designed for easy PCB layout
n Convenient TO-220 staggered 9 lead package style
Applications
n Up to 1024 X 768 at 70Hz n Pixel clock frequencies up to 75MHz n Monitors using video blanking
Features
n Higher gain to match LM126X CMOS preamplifiers
Schematic Diagram Connection Diagram
DS200006-2
Note: Tab is at GND.
DS200006-1
FIGURE 1. Simplified Schematic Diagram (One
Channel)
© 2000 National Semiconductor Corporation DS200006 www.national.com
FIGURE 2. Top View
Order Number: LM2469TA
NS package Number: TA09A
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Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required,
LM2469
please contactthe National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage, V Bias Voltage, V Input Voltage, V Storage Temperature Range, T
CC
BB
IN
STG
-65˚C to +150˚C
+90V +16V
0V to 4.5V
Limits of Operating Ranges (Note 2)
V
CC
V
BB
V
IN
V
OUT
Case Temperature -20˚C to +100˚C
Do not operate the part without a heat sink.
+60V to +85V
+8V to 15V
0V to +3.75V
+15V to +75V
Lead Temperature (Soldering,
<
10sec.) 300˚C
ESD Tolerance, Human Body Model 2kV
Electrical Characteristics
(See Figure 3 for Test Circuit) Unless otherwise noted: VCC= +80V, VBB= +12V, CL= 8pF, TC= 50˚C. DC Tests: V AC Tests: Output = 40VPP(25V - 65V) at 1MHz
Symbol Spec Parameter Conditions Min Typ Max Units
I
CC
I
BB
V
OUT
A
V
A
V
LE Linearity Error Note 4, 5, No AC Input Signal 5 % t
R
t
F
OS Overshoot Note 6 5 %
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
the test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may change when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified. Note 4: Calculated value from Voltage Gain test on each channel. Note 5: Linearity Error is the variation in DC Gain from V Note 6: Input from signal generator: t
= +2.25VDC
IN
Supply Current Per Channel, No Input Signal, No
Output Load
812mA
Bias Current All three Channels 15 25 mA DC Output Voltage No AC Input Signal, VIN= 1.25V 62 65 68 V DC Voltage Gain No AC Input Signal -18 -20 -22 Gain Matching Note 4, No AC Input Signal 1.0 dB
Rise Time Note 6, 10% to 90% 9.5 nS Fall Time Note 6, 90% to 10% 10.5 nS
= 1.0 volts to Vin= 3.5 volts.
in
R,tF
<
1nS.
DC
AC Test Circuit
FIGURE 3. Test Circuit (One Channel)
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DS200006-3
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Typical Performance Characteristics
(VCC= +80VDC,VBB= +12VDC,CL= +8pF, V
Figure 9: V
out
vs V
in
= 40VPP(25-65V), Test Circuit - Figure 3 unless otherwise specified.
OUT
DS200006-4
LM2469
DS200006-7
Figure 10: Power Dissipation vs Frequency
DS200006-5
Figure 11: Speed vs Temperature
DS200006-6
Figure 13: LM2469 Pulse Response
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Figure 12: Speed vs Offset
DS200006-9
Figure 14: Speed vs Load Capacitance
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THEORY OF OPERATION
The LM2469 is a high voltage monolithic three channel CRT
LM2469
The circuit diagram of the LM2469 is shown in Figure 1. The PNP emitter follower, Q5, provides input buffering. Q1 and Q2 form a fixed gain cascode amplifier with resistors R1 and R2 setting the gain at -20. Emitter followers Q3 and Q4 isolate the high output impedance of the amplifier from the capacitive load on the output of the amplifier, decreasing the sensitivity of the device to changes in load capacitance. Q6 provides biasing to the output emitter follower stage to re­duce crossover distortion at low signal levels.
Figure 3 shows a typical test circuit for evaluation of the LM2469. This circuit is designed to allow testing of the LM2469 in a 50environment without the use of an expen­sive FET probe. In this test circuit, two low inductance resis­tors in series totalling 4.95Kform a 200:1 wideband, low capacitance probe when connected to a 50load (such as 50oscilloscope input). The input signal from the generator is AC coupled to the base of Q5.
APPLICATION HINTS
INTRODUCTION
National Semiconductor (NSC) is committed to provide ap­plication information that assists our customers in obtaining the best performance possible from our products. The fol­lowing information is provided in order to support this com­mitment. The reader should be awarethat theoptimization of performance was done using a specific printed circuit board designed at NSC. Variations in performance can be realized due to physical changes in the printed circuit board and the application. Therefore, the designer should know that com­ponent value changes might be required in order to optimize performance in a given application. The values shown inthis document can be used as a starting point for evaluation purposes. When working with high bandwidth circuits, good layout practices are always critical to achieving maximum performance.
) to the ground, as close as is
bb
practical to the part.
ARC PROTECTION
During normal CRToperation, internal arcing may occasion­ally occur. Spark gaps,in the range of 200V, connected from the CRT cathodes to CRT ground will limit the maximum voltage, but to a value that is much higher than allowable on the LM2469. This fast, high voltage, high energy pulse can damage the LM2469 output stage. The application circuit shown in Figure 4 is designed to help clamp the voltage at the output of the LM2469 to a safe level. The clamp diodes, D1 andD2, should have a fast transient response, high peak current rating, low series impedance and low shunt capaci­tance. FDH400 or equivalent diodes are recommended. Do not use 1N4148 diodes for the clamp diodes. D1 and D2 should have short, low impedance connections to V
and
cc
ground respectively. The cathode of D1 should be located very close to aseparately decoupledbypass capacitor(C3 in Figure 4). The ground connection of D2 and the decoupling capacitor should be very close to the LM2469 ground. This will significantlyreduce the high frequency voltagetransients that the LM2469 would be subjected to during an arcover condition. Resistor R2 limits the arcover current that is seen by the diodes while R1 limits the current into the LM2469 as well as the voltage stress at the outputs of the device. R2 should be a 1/2W solid carbon type resistor. R1 can be a 1/4W metal or carbon film type resistor. Having large value resistors for R1 and R2 would be desirable, but has the effect of increasing rise and fall times. Inductor L1 is critical to reduce the initial high frequency voltage levels that the LM2469 would be subjected to. The inductor will not only help protect the device, but will also help optimize rise and fall times as well as minimizeEMI. For proper arc protection, it is important to not omit any of the arc protection compo­nents shown in Figure 4.
IMPORTANT INFORMATION
The LM2469 performance is targeted for the VGA (640 x
480) to XGA (1024 x 768, 70Hz refresh) resolution market. It is designed to be a replacement for discrete CRT drivers. The application circuits shown in this document to optimize performance and to protect against damage from CRT arc­over are designed specifically for the LM2469. If another member of the LM246X family is used, please refer to its datasheet.
POWER SUPPLY BYPASS
Since the LM2469 isa widebandwith amplifier, properpower supply bypassing is critical for optimum performance. Im­proper power supply bypassing can result in large over­shoot, ringing or oscillation. A 0.1uF capacitor should be connected from the supply pin, V
, to ground, as close to
CC
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DS200006-10
FIGURE 4. One Video Channel of the LM2469 with the
Recommended Arc Protection Circuit
OPTIMIZING TRANSIENT RESPONSE
Referring to
Figure 4
, there are three components (R1, R2 and L1) that can be adjusted to optimize the transient re­sponse of the application circuit. Increasing the values of R1 and R2 will slow the circuit down while decreasing over­shoot. Increasing the value of L1 will speed up the circuit as well as increase overshoot. It is very important to use induc­tors with very high self-resonant frequencies, preferably above 300 MHz. Ferrite core inductors from J.W. Miller Magnetics (part # 78FR39K) were used for optimizing the performance ofthe device in the NSC application board. The values shown in
Figure 4
can be used as a good starting
point for the evaluation of the LM2469. Using variable resis-
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APPLICATION HINTS (Continued)
tors for R1 will simplify finding the values needed for opti­mum performance in a given application. Once the optimum value is determined, the variable resistors can be replaced with fixed values.
Effect of Load Capacitance
Figure 14 shows the effect of increased load capacitance on the speed of the device. This demonstrates the importance of knowing the load capacitance in the application. Note that the fall time stayed fairly constant while the rise time in­creased approximately 1.8% per pF.
Effect of Offset
Figure 12 shows the variation in rise and fall times when the output offset of the device is varied from 40VDC to 50 VDC. The rise time shows a maximum variation relative to the center data point (45 VDC) of less than 1.3%. The fall time shows a variation of about 3.9% relative to the center data point.
LM2469
PC Board Layout Considerations
For optimum performance, an adequate ground plane, iso­lation between channels, good supply bypassing and the minimization of unwanted feedback are necessary. Also, the length of the signal traces from the preamplifier to the LM2469 andfrom theLM2469 to the CRT cathode should be as short as possible. The following references are recom­mended:
Ott, Henry W., Noise Reduction Techniques in Electronic Systems, John Wiley & Sons, New York, 1976.
Pease, Robert A., Troubleshooting Analog Circuits, Butterworth-Heinemann, 1991.
Because of its high small signal bandwith, the part may oscillate in a monitor if feedback occurs around the video channel through the chassis wiring. To prevent this, leads to the video amplifier input circuit should be shielded, andinput wiring should be spaced as faras possiblefrom outputcircuit wiring.
THERMAL CONSIDERATIONS
Figure 10 shows the maximum power dissipation of the LM2469 vs.Frequency whenall three channels of thedevice are driving an 8pF load with a 40 V
signal alternating one
p-p
pixel on,one pixel off. Thegraph assumes a 72% activetime (device operating at the specified frequency) which is typical in a monitor application. The other 28% of the time the device is assumed to be sitting at the black level (65V in this case). This graph gives the designer the information needed to determine the heat sink requirement for his application. The designer should note that if the load capacitance is increased, the AC component of the total power dissipation will also increase.
The LM2469 case temperature must be maintained below 100˚C. If the maximum expected ambient temperature is 70˚C and the maximum power dissipation is 3.85W (from Figure 10, 50MHz bandwith), then a maximum heat sink thermal resistance can be calculated:
This example assumes a capacitive load of 8pF and no resistive load.
TYPICAL APPLICATION
The typical application of the LM2469 is shown in Figure 5&
6. Used in conjunction with an LM126X and an LM2479/ 2480 bias clamp, a complete video channel from monitor input to CRT cathode can be achieved. Performance is ideal for 1024 x 768 resolution displays with pixel clock frequen­cies up top 75MHz. Figure5&6aretheschematic for the NSC demonstration board that can be used to evaluate the LM126X/246X/2480 combination in a monitor.
NSC Demonstration Board
Figure 7shows therouting and component placement onthe NSC LM126X/246X demonstration board. The schematic of the board is shown in Figure5&6.This board provides a good example of a layout that can be used as a guide for future layouts. Note the location of the following compo­nents:
C16, C19
—VCCbypass capacitor, located very close to
pin 4 and the ground plane near the device.
C20
—VBBbypass capacitors, located close to pin 8 and
ground.
C46, C47, C48
V
clamp diodes. Very important for arc protection.
CC
—VCCbypass capacitors, near LM2469
very close to decoupling
CC
capacitor C48 (see Figure 8), which is connected to the same section of the ground plane as D8. The diode place­ment and routing is very important for minimizing the voltage stress on the LM2469 video outputs during an arc over event. Lastly, notice that S3 is placed very close to the blue cathode and is tied directly to the ground under the CRT connector.
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APPLICATION HINTS (Continued)
LM2469
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FIGURE 5. LM126X/246X Demonstration Board Schematic
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APPLICATION HINTS (Continued)
LM2469
DS200006-30
FIGURE 6. LM126X/246X Demonstration Board Schematic (continued)
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APPLICATION HINTS (Continued)
LM2469
FIGURE 7. NSC LM126X/246X Demo Board Layout
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APPLICATION HINTS (Continued)
LM2469
DS200006-18
FIGURE 8. Trace Routing and Component Placement for Blue Channel Video Output.
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Physical Dimensions inches (millimeters) unless otherwise noted
LM2469 Monolothic Triple 9nS High Gain CRT Driver
Note: Information contained in this data sheet is preliminary and may be subject to change without notice.
NS Package Number TA09A
Order Number LM2469TA
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