Datasheet LM2467TA Datasheet (NSC)

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LM2467 Monolithic Triple 7.5 ns CRT Driver
LM2467 Monolithic Triple 7.5 ns CRT Driver
October 2000
General Description
The LM2467 is an integrated high voltage CRT driver circuit designed for use in color monitor applications. The IC con­tains three high input impedance, wide band amplifiers which directly drive the RGB cathodes of a CRT. Each channel has its gain internally set to −20 and can drive CRT capacitive loads as well as resistive loads present in other applications, limited only by the package’s power dissipation.
The IC is packaged in an industry standard 9-lead TO-220 molded plastic power package. See Thermal Considerations section.
Schematic and Connection Diagrams
Features
n Higher gain to match LM126X CMOS preamplifiers n 0V to 3.75V input range n Stable with 0–20 pF capacitive loads and inductive
peaking networks
n Convenient TO-220 staggered lead package style n Maintains standard LM243X Family pinout which is
designed for easy PCB layout
Applications
n 1024 x 768 displays up to 85 Hz refresh n Pixel clock frequencies up to 95 MHz n Monitors using video blanking
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Note: TabisatGND
Top View
Order Number LM2467T
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FIGURE 1. Simplified Schematic Diagram
(One Channel)
© 2000 National Semiconductor Corporation DS200078 www.national.com
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Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required,
LM2467
please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (V Bias Voltage (V Input Voltage (V Storage Temperature Range (T
) +90V
CC
) +16V
BB
) 0V to 4.5V
IN
) −65˚C to +150˚C
STG
Lead Temperature
<
(Soldering,
10 sec.) 300˚C
ESD Tolerance, Human Body Model 2 kV
Machine Model 250V
Operating Ranges (Note 2)
V
CC
V
BB
V
IN
V
OUT
+60V to +85V
+8V to +15V
+0V to +3.75V
+15V to +75V Case Temperature −20˚C to +100˚C Do not operate the part without a heat sink.
Electrical Characteristics
(See
Figure 2
Unless otherwise noted: VCC= +80V, VBB= +12V, CL= 8 pF, TC= 50˚C DC Tests: V AC Tests: Output = 40VPP(25V - 65V) at 1MHz
Symbol Parameter Conditions
I
CC
I
BB
V
OUT
A
V
A
V
LE Linearity Error (Notes 4, 5), No AC Input Signal 5 % t
R
t
F
OS Overshoot (Note 6) 5 %
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may change when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified. Note 4: Calculated value from Voltage Gain test on each channel. Note 5: Linearity Error is the variation in dc gain from V Note 6: Input from signal generator: t
for Test Circuit)
= 2.25VDC
IN
LM2467
Min Typical Max
Supply Current All Three Channels, No Input Signal,
No Output Load
30 mA
Bias Current All Three Channels 18 mA DC Output Voltage No AC Input Signal, VIN= 1.25V 62 65 68 V DC Voltage Gain No AC Input Signal −18 −20 −22 Gain Matching (Note 4), No AC Input Signal 1.0 dB
Rise Time (Note 6), 10% to 90% 7.5 ns Fall Time (Note 6), 90% to 10% 8 ns
= 1.0V to VIN= 3.5V.
IN
r,tf
<
1 ns.
Units
DC
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AC Test Circuit
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Note: 8 pF load includes parasitic capacitance.
FIGURE 2. Test Circuit (One Channel)
Figure 2
environment without the use of an expensive FET probe. The two 2490resistors form a 200:1 divider with the 50resistor and the oscilloscope. A test point is included for easy use of an oscilloscope probe.The compensation capacitor is used to compensate the stray capacitance of the two 2490resistors to achieve flat frequency response.
shows a typical test circuit for evaluation of the LM2467. This circuit is designed to allow testing of the LM2467 in a 50
LM2467
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Typical Performance Characteristics (V
(25V−65V), Test Circuit -
LM2467
Figure 2
unless otherwise specified)
= +80 VDC,VBB= +12 VDC,CL= 8 pF, V
CC
OUT
=40V
PP
FIGURE 3. V
OUT
vs V
IN
FIGURE 4. Speed vs Temp.
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FIGURE 6. Power Dissipation vs Frequency
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FIGURE 7. Speed vs Offset
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FIGURE 5. LM2467 Pulse Response
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FIGURE 8. Speed vs Load Capacitance
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Theory of Operation
The LM2467 is a high voltage monolithic three channel CRT driver suitable for high resolution display applications. The LM2467 operates with 80V and 12V power supplies. The part is housed in the industry standard 9-lead TO-220 molded plastic power package.
The circuit diagram of the LM2467 is shown in PNP emitter follower, Q5, provides input buffering. Q1 and Q2 form a fixed gain cascode amplifier with resistors R1 and R2 setting the gain at −20. Emitter followers Q3 and Q4 isolate the high output impedance of the cascode stage from the capacitance of the CRT cathode which decreases the sensitivity of the device to load capacitance. Q6 provides biasing to the output emitter follower stage to reduce cross­over distortion at low signal levels.
Figure 2
LM2467. This circuit is designed to allow testing of the LM2467 in a 50environment without the use of an expen­sive FET probe. In this test circuit, the two 4.95kresistors form a 200:1 wideband, low capacitance probe when con­nected to a 50coaxial cable and a 50load (such as a 50oscilloscope input). The input signal from the generator is ac coupled to the base of Q5.
shows a typical test circuit for evaluation of the
Figure 1
. The
Application Hints
INTRODUCTION
National Semiconductor (NSC) is committed to provide ap­plication information that assists our customers in obtaining the best performance possible from our products. The fol­lowing information is provided in order to support this com­mitment. The reader should be aware that the optimization of performance was done using a specific printed circuit board designed at NSC. Variations in performance can be realized due to physical changes in the printed circuit board and the application. Therefore, the designer should know that com­ponent value changes may be required in order to optimize performance in a given application. The values shown in this document can be used as a starting point for evaluation purposes. When working with high bandwidth circuits, good layout practices are also critical to achieving maximum per­formance.
ARC PROTECTION
During normal CRT operation, internal arcing may occasion­ally occur. Spark gaps, in the range of 200V, connected from the CRT cathodes to CRT ground will limit the maximum voltage, but to a value that is much higher than allowable on the LM2467. This fast, high voltage, high energy pulse can damage the LM2467 output stage. The application circuit shown in the output of the LM2467 to a safe level. The clamp diodes, D1 and D2, should have a fast transient response, high peak current rating, low series impedance and low shunt capaci­tance. FDH400 or equivalent diodes are recommended. Do not use 1N4148 diodes for the clamp diodes. D1 and D2 should have short, low impedance connections to V ground respectively. The cathode of D1 should be located very close to a separately decoupled bypass capacitor (C3 in
Figure 9
capacitor should be very close to the LM2467 ground. This will significantly reduce the high frequency voltage transients that the LM2467 would be subjected to during an arcover condition. Resistor R2 limits the arcover current that is seen by the diodes while R1 limits the current into the LM2467 as well as the voltage stress at the outputs of the device. R2 should be a metal or carbon film type resistor. Having large value resis­tors for R1 and R2 would be desirable, but this has the effect of increasing rise and fall times. Inductor L1 is critical to reduce the initial high frequency voltage levels that the LM2467 would be subjected to. The inductor will not only help protect the device but it will also help minimize rise and fall times as well as minimize EMI. For proper arc protection, it is important to not omit any of the arc protection compo­nents shown in
Figure 9
). The ground connection of D2 and the decoupling
is designed to help clamp the voltage at
CC
1
⁄2W solid carbon type resistor. R1 can be a1⁄4W
Figure 9
.
and
LM2467
IMPORTANT INFORMATION
The LM2467 performance is targeted for the VGA (640 x
480) to XGA (1024 x 768, 85 Hz refresh) resolution market. The application circuits shown in this document to optimize performance and to protect against damage from CRT ar­cover are designed specifically for the LM2467. If another member of the LM246X family is used, please refer to its datasheet.
POWER SUPPLY BYPASS
Since the LM2467 is a wide bandwidth amplifier, proper power supply bypassing is critical for optimum performance. Improper power supply bypassing can result in large over­shoot, ringing or oscillation. 0.1 µF capacitors should be connected from the supply pins, V close to the LM2467 as is practical. Additionally, a 47 µF or larger electrolytic capacitor should be connected from both supply pins to ground reasonably close to the LM2467.
and VBB, to ground, as
CC
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Application Hints (Continued)
LM2467
FIGURE 9. One Channel of the LM2467 with the Recommended Arc Protection Circuit
OPTIMIZING TRANSIENT RESPONSE
Referring to and L1) that can be adjusted to optimize the transient re­sponse of the application circuit. Increasing the values of R1 and R2 will slow the circuit down while decreasing over­shoot. Increasing the value of L1 will speed up the circuit as well as increase overshoot. It is very important to use induc­tors with very high self-resonant frequencies, preferably above 300 MHz. Ferrite core inductors from J.W. Miller Magnetics (part performance of the device in the NSC application board. The values shown in good starting point for the evaluation of the LM2467. Using variable resistors for R1 and the parallel resistor will simplify finding the values needed for optimum performance in a given application. Once the optimum values are determined the variable resistors can be replaced with fixed values.
EFFECT OF LOAD CAPACITANCE
Figure 8
the speed of the device. This demonstrates the importance of knowing the load capacitance in the application.
EFFECT OF OFFSET
Figure 7
output offset of the device is varied from 40 to 50 V rise time shows a maximum variation relative to the center data point (45 V variation of less than 5% relative to the center data point.
THERMAL CONSIDERATIONS
Figure 4
circuit shown in The figure shows that the rise time of the LM2467 increases by approximately 10% as the case temperature increases from 50˚C to 100˚C. This corresponds to a speed degrada­tion of 2% for every 10˚C rise in case temperature.There is a negligible change in fall time vs. temperature in the test circuit.
Figure 6
LM2467 vs. Frequency when all three channels of the device are driving an 8 pF load with a 40 V on, one pixel off signal. The graph assumes a 72% active time (device operating at the specified frequency) which is typical in a monitor application. The other 28% of the time the device is assumed to be sitting at the black level (65V in this case). This graph gives the designer the information needed to determine the heat sink requirement for his appli-
Figure 9
, there are three components (R1, R2
#
78FR--k) were used for optimizing the
Figure 10
and
Figure 11
can be used as a
shows the effect of increased load capacitance on
shows the variation in rise and fall times when the
) less than 5%. The fall time shows a
DC
shows the performance of the LM2467 in the test
Figure 2
as a function of case temperature.
shows the maximum power dissipation of the
alternating one pixel
p-p
DC
. The
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cation. The designer should note that if the load capacitance is increased the AC component of the total power dissipation will also increase.
The LM2467 case temperature must be maintained below 100˚C. If the maximum expected ambient temperature is 70˚C and the maximum power dissipation is 4.3W (from
Figure 6
, 50 MHz bandwidth) then a maximum heat sink
thermal resistance can be calculated:
This example assumes a capacitive load of 8 pF and no resistive load.
TYPICAL APPLICATION
A typical application of the LM2467 is shown in and
Figure 11
. Used in conjunction with an LM1267, a com-
Figure 10
plete video channel from monitor input to CRT cathode can be achieved. Performance is ideal for 1024 x 768 resolution displays with pixel clock frequencies up to 95 MHz. and
Figure 11
are the schematic for the NSC demonstration
Figure 10
board that can be used to evaluate the LM1267/2467 com­bination in a monitor.
PC BOARD LAYOUT CONSIDERATIONS
For optimum performance, an adequate ground plane, iso­lation between channels, good supply bypassing and mini­mizing unwanted feedback are necessary.Also, the length of the signal traces from the preamplifier to the LM2467 and from the LM2467 to the CRT cathode should be as short as possible. The following references are recommended:
Ott, Henry W., “Noise Reduction Techniques in Electronic Systems”, John Wiley & Sons, New York, 1976.
Pease, Robert A., “Troubleshooting Analog Circuits”, Butterworth-Heinemann, 1991.
Because of its high small signal bandwidth, the part may oscillate in a monitor if feedback occurs around the video channel through the chassis wiring. To prevent this, leads to the video amplifier input circuit should be shielded, and input circuit wiring should be spaced as far as possible from output circuit wiring.
NSC DEMONSTRATION BOARD
Figure 12
shows the routing and component placement on the NSC LM1267/2467 demonstration board. The schematic of the board is shown in
Figure 10
and
Figure 11
. This board
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Application Hints (Continued)
provides a good example of a layout that can be used as a guide for future layouts. Note the location of the following components:
C19—VCCbypass capacitor, located very close to pin 4
and ground pins C20—VBBbypass capacitors, located close to pin 8 and
ground C46, C47, C48— VCCbypass capacitors, near LM2467
and V
The routing of the LM2467 outputs to the CRT is very critical to achieving optimum performance. routing and component placement from pin 1 of the LM2467 to the blue cathode. Note that the components are placed so that they almost line up from the output pin of the LM2467 to
clamp diodes. Very important for arc protection.
CC
Figure 13
shows the
the blue cathode pin of the CRT connector. This is done to minimize the length of the video path between these two components. Note also that D8, D9, R24 and D6 are placed to minimize the size of the video nodes that they are at­tached to. This minimizes parasitic capacitance in the video path and also enhances the effectiveness of the protection diodes. The anode of protection diode D8 is connected directly to a section of the the ground plane that has a short and direct path to the LM2467 ground pins. The cathode of D9 is connected to V C19 (see of the ground plane as D8. The diode placement and routing is very important for minimizing the voltage stress on the LM2467 during an arcover event. Lastly, notice that S3 is placed very close to the blue cathode and is tied directly to CRT ground.
Figure 13
very close to decoupling capacitor
CC
) which is connected to the same section
LM2467
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Application Hints (Continued)
LM2467
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FIGURE 10. LM126X/LM246X Demonstration Board Schematic
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Application Hints (Continued)
LM2467
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FIGURE 11. LM126X/LM246X Demonstration Board Schematic (continued)
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Application Hints (Continued)
LM2467
FIGURE 12. LM126X/LM246X Demo Board Layout
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Application Hints (Continued)
LM2467
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FIGURE 13. Trace Routing and Component Placement for Blue Channel Output
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Physical Dimensions inches (millimeters) unless otherwise noted
LM2467 Monolithic Triple 7.5 ns CRT Driver
CONTROLLING DIMENSION IS INCH VALUES IN [ ] ARE MILLIMETERS
NS Package Number TA09A
Order Number LM2467TA
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