Datasheet LM2413T Datasheet (NSC)

Page 1
LM2413 Monolithic Triple 4 ns CRT Driver
General Description
The LM2413 is an integrated high voltage CRT driver circuit designed for use in high-resolution color monitor applica­tions. The IC contains three high input impedance, wide band amplifiers, which directly drive the RGB cathodes of a CRT. Eachchannel has its gain internally set to −14 and can drive CRT capacitive loads as well as resistive loads present in other applications, limited only by the package’s power dissipation.
Features
n Rise/Fall times typically 3.7/4.4 with 8 pF load at 40 V
Schematic and Connection Diagrams
n Well matched with LM1282/3 video preamps n 1V to 5V input range n Stable with 0–20 pF capacitive loads and inductive
peaking networks
n Convenient TO-220 staggered lead package style n Standard LM240X Family Pinout which is designed for
easy PCB layout
Applications
n 1600 x 1200 Displays up to 70 Hz Refresh n Pixel clock frequencies up to 180 MHz n Monitors using video blanking
PP
LM2413 Monolithic Triple 4 ns CRT Driver
December 1999
DS101275-2
Top View
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FIGURE 1. Simplified Schematic Diagram (One
Channel)
© 1999 National Semiconductor Corporation DS101275 www.national.com
Order Number LM2413T
See NS Package Number TA11C
Page 2
Absolute Maximum Ratings (Notes 1, 3)
If Military/Aerospace specified devices are required,
LM2413
please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage, V Bias Voltage, V Input Voltage, V Storage Temperature Range,T Lead Temperature (Soldering, 10 sec.) 300˚C ESD Tolerance, Human Body Model 2kV
CC
BB
IN
STG
−65˚C to +150˚C
+90V +16V
0V to 6V
Machine Model 250V
Operating Ranges (Note 2)
V
CC
V
BB
V
IN
V
OUT
Case Temperature −20˚C to +100˚C
Do not operate the part without a heat sink.
+60V to +85V +10V to +15V
+1V to +5V
+15 to +75V
Electrical Characteristics (See
Unless otherwise noted: V
Symbol Parameter Conditions
I I V A A
CC BB
OUT V
V
Supply Current Per Channel, No Output Load 10 16 22 mA Bias Current All three channels 15 25 35 mA DC Output Voltage VIN= 1.9V 62 65 68 V DC Voltage Gain −12 −14 −16 Gain Matching (Note 4) 1.0 dB
CC
=
+80V, V
BB
=
+12V, V
Figure 2
IN
for Test Circuit)
=
+3.3V, No AC Input, C
=
L
8pF, T
=
60˚C
C
LM2413
Min Typ Max
Units
LE Linearity Error (Notes 4, 5) 3.5 t
R
t
F
OS Overshoot (Note 6) (Note 6), 40 V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Note 2: Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may change when the device is not operated under the listed test conditions.
Note 3: All voltages are measured with respect to GND, unless otherwise specified. Note 4: Calculated value from Voltage Gain test on each channel. Note 5: Linearity Error is the variation in dc gain from V Note 6: Input from signal generator: t Note 7: 100%tested in production. These limits are not used to calculate outgoing quality levels.
Rise Time (Notes 6, 7) 10%to 90%,40VPPOutput (1 MHz) 3.7 4.7 ns Fall Time (Notes 6, 7) 90%to 10%,40VPPOutput (1 MHz) 4.4 5.4 ns
Output (1 MHz) 5
PP
r,tf
1 ns.
IN
<
=
1.6V to V
=
5V.
IN
AC Test Circuit
DC
%
%
FIGURE 2. Test Circuit (One Channel)
Figure 2
shows a typical test circuit for evaluation of the LM2413. This circuit is designed to allow testing of the LM2413 in a 50environment without the use of an expen­sive FET probe. The combined resistors of 4950at the out-
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put form a 200:1 voltage divider when connected to a 50 load. The compensation cap is used to flatten the frequency response of the 200:1 divider.
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AC Test Circuit (Continued)
FIGURE 3. VINvs V
OUT
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LM2413
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FIGURE 6. Power Dissipation vs Frequency
FIGURE 4. Speed vs Temp
FIGURE 5. Rise/Fall Time
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FIGURE 7. Speed vs Offset
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FIGURE 8. Bandwidth
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Theory of Operation
The LM2413 is a high voltage monolithic three channel CRT
LM2413
The simplified circuit diagram of one channel of the LM2413 is shown in
Figure 1
.APNPemitter follower, Q5, provides in­put buffering. This minimizes the current loading of the video pre-amp. R9 is used to turn on Q5 when there is no input. With Q5 turn on, Q1 will be almost completely off, minimizing the current flow through Q1 and Q2. This will drive the output stage near the V with no inputs. R6 is a pull-up resistor for Q5 and also limits
rail, minimizing the power dissipation
CC
the current flow through Q5. R3 and R2 are used to set the current flow through Q1 and Q2. The ratio of R1 to R2 is used to set the gain of the LM2413. R1, R2, and R3 are all related when calculating the output voltage of the CRT driver. R Q2 are in a cascode configuration. Q1 is a low voltage and
limits the current through the base of Q2. Q1 and
b
very fast transistor. Q2 is a higher voltage transistor. The cascode configuration gives the equivalent of a very fast and high voltage transistor. The two output transistors, Q3 and Q4, form a class B amplifier output stage. R4 and R5 are used to limit the current through the output stage and set the output impedance of the LM2413. Q6, along with R7 and R8 set the bias current through Q3 and Q4 when there is no change in the signal level. This bias current minimizes the crossover distortion of the output stage. With this bias cur­rent the output stage now becomes a class AB amplifier with a crossover distortion much lower than a class B amplifier.
Figure 2
shows a typical test circuit for evaluation of the LM2413. Due to the very wide bandwidth of the LM2413, a specially designed output circuit is used with the required se­ries resistor and C when evaluating the performance of the LM2413 in a 50
to emulate the actual application
LOAD
environment without the use of an expensive FET probe. The combined resistors of 4950at the output form a 200:1 voltage divider when connected to a 50load. The input sig­nal from the generator is ac coupled to the input of the CRT driver. V LM2413.
input sets the DC operating range of the
ADJ
Application Hints
INTRODUCTION
National Semiconductor (NSC) is committed to providing ap­plication information that assists our customers in obtaining the best performance possible from our products. The follow­ing information is provided in order to support this commit­ment. The reader should be aware that the optimization of performance was done using a specific printed circuit board designed at NSC. Variations in performance can be realized due to physical changes in the printed circuit board and the
application. Therefore, the designer should know that com­ponent value changes may be required in order to optimize performance in a given application. The values shown in this document can be used as a starting point for evaluation pur­poses. When working with high bandwidth circuits, good lay­out practices are also critical to achieving maximum perfor­mance.
POWER SUPPY BYPASS
, to ground, as close to
CC
µF to 100 µF electrolytic capacitor should be connected from the supply pin to ground. The electrolytic capacitor should also be placed reasonably close to the LM2413’s supply and ground pins. A 0.1 µF capacitor should be connected from the bias pin, V part.
, to ground, as close as is practical to the
BB
ARC PROTECTION
During normal CRT operation, internal arcing may occasion­ally occur. Spark gaps, in the range of 200V, connected from the CRT cathodes to CRT ground will limit the maximum volt­age, but to a value that is much higher than allowable on the LM2413. This fast, high voltage, high-energy pulse can dam­age the LM2413 output stage. The application circuit shown in
Figure 9
is designed to help clamp the voltage at the out­put of the LM2413 to a safe level. The clamp diodes should have a fast transient response, high peak current rating, low series impedance and low shunt capacitance. FDH400 or equivalent diodes are recommended. D1 and D2 should have short, low impedance connections to V respectively. The cathode of D1 should be located very close
and ground
CC
Figure 9
. The values of L1 and R1 may need to be adjusted for a particular application. The recommended mini­mum value for R1 is 110, with L1=.12 µH.
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Application Hints (Continued)
FIGURE 9. One Channel of the LM2413 with the Recommended Arc Protection Circuit
OPTIMIZING TRANSIENT RESPONSE
Figure 9
Referring to and L1) that can be adjusted to optimize the transient re­sponse of the application circuit. Increasing the values of R1 and R2 will slow the circuit down while decreasing over­shoot. Increasing the value of L1 will speed up the circuit as well as increase overshoot. It is very important to use induc­tors with very high self-resonant frequencies, preferably above 300 MHz. The values shown in as a good starting point for the evaluation of the LM2413.
Effect of Load Capacitance
The output rise and fall times as well as overshoot will vary as the load capacitance varies. The values of the output cir­cuit (R1, R2 and L1 in the nominal load capacitance. Once this is done the perfor­mance of the design can be checked by varying the load based on what the expected variation will be during produc­tion.
Effect of Offset
Figure 5
shows the variation in rise and fall times when the output offset of the device is varied from 35 to 55 VDC. The rise and fall times show about the same overall variation. The slightly faster rise and fall times are fastest near the cen­ter point of 45V, making this the optimum operating point. At the low and high output offset range, the characteristic of rise/fall time is slower due to the saturation of Q3 and Q4. The recovery time of the output transistors takes longer com­ing out of saturation thus slows down the rise and fall times.
THERMAL CONSIDERATIONS
Figure 4
shows the performance of the LM2413 in the test circuit shown in
Figure 4
never to be operated over a case temperature of 100˚C.
In addition to exceeding the safe operating temperature, the rise and fall times will typically exceed 3.7/4.4 ns.
Figure 6
vs. Frequency when all three channels of the device are driv­ing an 8 pF load. Typically the active time is about 72%of the total time for one frame. Worst-case power dissipation is when a one on, one off pixel is displayed over the active time of the video input. This is the condition used to measure the total power dissipation of the LM2413 at different input fre­quencies. signed normally needs for worst case power dissipation.
shows that both the rise and fall times of the
shows that total power dissipation of the LM2413
Figure 6
, there are three components (R1, R2
Figure 9
can be used
Figure 9
) should be chosen based on
Figure 2
as a function of case temperature.
gives all the information a monitor de-
DS101275-10
0.28, the result is 0.6W.
2. Choose the maximum frequency to be used. A typical application would use 90 MHz, or a 180 MHz pixel clock. The power dissipation is 12.4W.
3. Subtract the 0.6W from the power dissipation from
ure 6
. For 100 MHz this would be 12.4 − 0.6=11.8W.
4. Divide the result from step 3 by 0.72. For 90 MHz, the re­sult is 16.4W
5. Multiply the result in 4 by the new active time percent­age.
6. Multiply 1.95W by the new inactive time.
7. Add together the results of steps 5 and 6. This is the ex­pected power dissipation for the LM2413 in the design­er’s application.
The LM2413 case temperature must be maintained below 100˚C. If the maximum expected ambient temperature is 70˚C and the maximum power dissipation is 12.2W (
6
) then a maximum heat sink thermal resistance can be cal-
culated:
TYPICAL APPLICATION
A typical application of the LM2413 is shown in Used in conjunction with an LM1283, a complete video chan­nel from monitor input to CRT cathode can be achieved. Per­formance is excellent for resolutions up to 1600 x 1200 and pixel clock frequencies at 180 MHz. matic for the NSC demonstration board that can be used to evaluate the LM1283/2413 combination in a monitor.
Figure 14
. The recommended input
Figure 14
Figure 10
, if a 1.9V input is
Fig-
Figure
DS101275-11
Figure 10
is the sche-
LM2413
.
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Application Hints (Continued)
PC Board Layout Considerations
LM2413
For optimum performance, an adequate ground plane, isola­tion between channels, good supply bypassing and minimiz­ing unwanted feedback are necessary. Also, the length of the signal traces from the preamplifier to the LM2413 and from the LM2413 to the CRT cathode should be as short as possible. The red video trace from the LM1283 to the LM2413 input should be considered as short as possible on a PCB layout. If possible, position the pre-amp in such a way where the traces from its output connects to the driver input the most direct and shortest path. The following references are recommended for video board designers:
Ott, Henry W., “Noise Reduction Techniques in Electronic Systems”, John Wiley & Sons, New York, 1976.
“Guide to CRT Video Design”, National Semiconductor Appli­cation Note 861.
Because of its high small signal bandwidth, the part may os­cillate in a monitor if feedback occurs around the video chan­nel through the chassis wiring. To prevent this, leads to the video amplifier input circuit should be shielded, and input cir­cuit wiring should be spaced as far as possible from output circuit wiring.
NSC Demonstration Board
Figure 11
and
Figure 12
show routing and component place-
Figure 10
. This board
provides a good example of a layout that can be used as a guide for future layouts. Note the location of the following components:
C79—VCCbypass capacitor, located very close to pin 6
and ground pins. ( C55—VBBbypass capacitor, located close to pin 10 and
ground. ( C75 and C77—VCCbypass capacitors, near LM2413
and V
CC
(
Figure 11
The routing of the LM2413 outputs to the CRT is very critical to achieving optimum performance. routing and component placement from pin 1 to the blue cathode. Note that the components are placed so that they almost line up from the output pin of the LM2413 to the blue cathode pin of the CRT connector. This is done to minimize the length of the video path between these two components. Note also that D14, D15, R29 and D13 are placed to keep the size of the video nodes to a minimum. This minimizes parasitic capacitance in the video path and also enhances the effectiveness of the protection diodes. The anode of pro­tection diode D14 is connected directly to a section of the ground plane that has a short and direct path to the LM2413 ground pins. The cathode of D15 is connected to V close to decoupling capacitor C55 (see connected to the same section of the ground plane as D14. The diode placement and routing is very important for mini­mizing the voltage stress on the LM2413 during an arc over event. Lastly, notice that S3 is placed very close to the blue cathode and is tied directly to CRT ground.
Figure 12
)
Figure 12
)
clamp diodes. Very important for arc protection.
)
Figure 13
Figure 13
shows the
very
CC
) which is
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Application Hints (Continued)
LM2413
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FIGURE 10. National Semiconductor OSD Video Amplier
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Application Hints (Continued)
LM2413
FIGURE 11. PCB Top Layer
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Application Hints (Continued)
LM2413
FIGURE 12. PCB Bottom Layer
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Application Hints (Continued)
LM2413
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FIGURE 13. PCB CRT Driver, Blue Channel Output
FIGURE 14. ICCand IBBvs V
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IN
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Physical Dimensions inches (millimeters) unless otherwise noted
NS Package Number TA11B
LM2413 Monolithic Triple 4 ns CRT Driver
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