Datasheet LM2403T Datasheet (NSC)

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LM2403 Monolithic Triple 4.5 nS CRT Driver
LM2403 Monolithic Triple 4.5 nS CRT Driver
August 1999
General Description
The LM2403 is an integrated high voltage CRT driver circuit designed for use in high resolution color monitor applica­tions. The IC contains three high input impedance, wide band amplifiers which directly drive the RGB cathodes of a CRT. Each channelhas its gain internally set to −14 and can drive CRT capacitive loads as well as resistive loads pre­sented by other applications, limited only by the package’s power dissipation.
The IC is packaged in an industry standard 11 lead TO-220 molded plastic power package. See thermal considerations on page 5.
Schematic and Connection Diagrams
Features
n Rise/fall times typically 4.5 nS with 8 pF load at 40 V n Well matched with LM1283 video preamp n Output swing capability: 60 V n 1V to 5V input range n Stable with 0 pF–20 pF capacitive loads and inductive
peaking networks
n Convenient TO-220 staggered lead package style n Standard LM240X Family Pinout which is designed for
easy PCB layout
for VCC= 80V
pp
pp
Applications
n CRT driver for color monitors with display resolutions up
to 1600 x 1200
n Pixel clock frequency up to 160 MHz
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Top View
Order Number LM2403T
FIGURE 1. Simplified Schematic Diagram (One Channel)
© 1999 National Semiconductor Corporation DS100082 www.national.com
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Absolute Maximum Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications.
Supply Voltage (V Bias Voltage (V Input Voltage (V Storage Temperature Range (T Lead Temperature
(Soldering,
ESD Tolerance, Human Body Model 2 kV
Machine Model 250V
) +90V
CC
) +16V
BB
) −0.5V to V
IN
<
10 sec.) 300˚C
) −65˚C to +150˚C
STG
BIAS
+0.5V
Operating Range(Note 3)
V
CC
V
BB
V
IN
V
OUT
Case Temperature −20˚C to +100˚C
Do not operate the part without a heat sink.
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: Operating ratings indicate conditions for which the device is func­tional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some per­formance characteristics may change when the device is not operated under the listed test conditions.
+60V to +85V
+8V to +15V
+1V to +5V
+10V to +70V
Electrical Characteristics
(See
Figure 2
Unless otherwise noted: VCC= +80V, VBB= +12 V, VIN= +3.3 VDC,CL= 8 pF, LP= 0.22 µH, Output = 40 VPPat 1 MHz, TA= 25˚C.
Symbol Parameter Condition
I
CC
I
BB
V
OUT
A
V
A
V
LE Linearity Error (Notes 4, 5), No AC Input Signal 3.5 t
R
t
F
OS Overshoot 3
Note 4: Calculated value from Voltage Gain test on each channel. Note 5: Linearity Error is the variation in dc gain from V Note 6: Input from signal generator: t
for Test Circuit)
LM2403
Min Typical Max
Units
Supply Current Per Channel, No Output Load 26 mA Bias Current All Three Channels 11.5 mA DC Output Voltage No AC Input Signal, VIN= 2.8 V 48 52 56 V DC Voltage Gain No AC Input Signal −12 −14 −16 Gain Matching (Note 4), No AC Input Signal 1.0 dB
Rise Time 10%to 90 Fall Time 90%to 10
1 nS.
IN
r,tf
<
% %
= 1.5V to VIN=5V.
4.5 nS
4.5 nS
DC
%
%
AC Test Circuit
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FIGURE 2. Test Circuit (One Channel)
Figure 2
shows a typical test circuit for evaluation of the LM2403. This circuit is designed to allow testing of the LM2403 in a 50 environment without the use of an expensive FET probe. The 4950resistor at the output forms a 100:1 voltage divider when connected to a 50load.
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AC Test Circuit (Continued)
FIGURE 3. V
OUT
vs V
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IN
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FIGURE 6. Power Dissipation vs Frequency
FIGURE 4. Speed vs Temp.
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FIGURE 5. Pulse Response
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FIGURE 7. Speed vs Offset
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FIGURE 8. Pulse Response with VCC=70V
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DC
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Theory of Operation
The LM2403 is a high voltage monolithic three channel CRT driver suitable for high resolution display applications. The LM2403 operates using 80V and 12V power supplies. The part is housed in the industry standard 11-lead TO-220 molded plastic power package.
The simplified circuit diagram of the LM2403 is shown in
ure 1
. A PNP emitter follower, Q1, provides input buffering. The 14 kfeedback resistor and the 1 kinput resistor sets the gain of the inverting op-amp to -14. Emitter followers Q2 and Q3 isolate the output of the feedback amplifier from the capacitance of the CRT cathode, and make the circuit rela­tively insensitive to load capacitance.
Figure 2
LM2403. This circuit is designed to allow testing of the LM2403 in a 50environment without the use of an expen­sive FET probe. In this test circuit, two low inductance resis­tors in series totaling 4.95 kform a 100:1 wideband low ca­pacitance probe when connected to a 50cable and load. The input signal from the generator is ac coupled to the base of Q1.
Figure 9
sponse of the LM2403. The frequency response rolls off very rapidly above the bandwidth limit of the amplifier. There are two reasons for this fast response roll-off:
1. The LM2403 contains an input low pass filter to help re-
2. The internal feedback network of the closed loop ampli-
In both cases, the fast roll of the high frequency harmonics will help to limit the creation of high frequency EMI harmon­ics, without limiting video rise and fall time characteristics. However, due to the very fast switching speeds of the de-
shows a typical test circuit for evaluation of the
DS100082-16
FIGURE 9.
shows the large signal sine wave frequency re-
move unwanted high frequency harmonics that can cause EMI problems. This filter does not significantly af­fect the rise and fall times of the signal as it operates above the −3 dB bandwidth of the device.
fier holds the gain at −14 until the loop gain drops below unity. Above this frequency, the amplifier response falls with the open loop gain of the amplifier, as the feedback ceases to have any significant effect. There is also a change in the impedance match between the op-amp and the emitter follower output stage with large signals at higher frequencies. This creates a gain boost that ex­tends the bandwidth, then gives a sudden roll off as shown in may vary slightly depending upon operating conditions, signal amplitude etc.
Figure 9
. The exact response of this roll off
Fig-
vice, good layout design for EMI is CRITICAL. Path lengths and loop areas of the video signals must be kept to a mini­mum.
Application Hints
INTRODUCTION
National Semiconductor (NSC) is committed to providing ap­plication information that assists our customers in obtaining the best performance possible fromour products. The follow­ing information is provided in order to support this commit­ment. The reader should be aware that the optimization of performance was done using a specific printed circuit board designed at NSC. Variations in performance can be realized due to physical changes in the printed circuit board and the application. Therefore, the designer should know that com­ponent value changes may be required in order to optimize performance in a given application. The values shown in this document can be used as a starting point for evaluation pur­poses. When working with high bandwidth circuits, good lay­out practices are also critical to achieving maximum perfor­mance.
POWER SUPPLY BYPASS
Since the LM2403 is a high bandwidth amplifier, proper power supply bypassing is critical for optimum performance. Improper power supply bypassing can result in large over­shoot, ringing and oscillation. A 0.1 µF capacitor should be connected from the supply pin, Vcc, to ground, as close to the supply and ground pins as is practical. Additionally, a 10 µF to 100 µF electrolytic capacitor should be connected from the supply pin to ground. The electrolytic capacitor should also be placed reasonably close to the LM2403’s supply and ground pins. A 0.1µF capacitor should be con­nected from the bias pin, Vbb, to ground, as close as is prac­tical to the part.
ARC PROTECTION
During normal CRT operation, internal arcing may occasion­ally occur. Spark gaps, in the range of 200V,connected from the CRT cathodes to CRT groundwill limit the maximum volt­age, but to a value that is much higher than allowable on the LM2403. This fast, high voltage, high energy pulse can dam­age the LM2403 output stage. The application circuit shown in
Figure 10
put of the LM2403 to a safe level. The clamp diodes should have a fast transient response, high peak current rating, low series impedance and low shunt capacitance. FDH400 or equivalent diodes are recommended. D1 and D2 should have short, low impedance connections to V respectively.The cathode of D1 should be located very close to a separately decoupled bypass capacitor. The ground connection of the diode and the decoupling capacitor should be very close to the LM2403 ground.This will significantly re­duce the high frequency voltage transients that the LM2403 would be subjected to during an arcover condition. Resistor R2 limits the arcover current that is seen by the diodes while R1 limits the current into the LM2403 as well as the voltage stress at the outputs of the device. R2 should be a 1/2W solid carbon type resistor.R1 can be a 1/4W metal or carbon film type resistor. Inductor L1 is critical to reduce the initial high frequency voltage levels that the LM2403 would be sub­jected to. Having large value resistors for R1 and R2 would be desirable, but this has the effect of increasing rise and fall times. The inductor will not only help protect the device but it
is designed to help clamp the voltage at the out-
and ground
CC
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Application Hints (Continued)
will also help optimize rise and fall times as well as minimize EMI. For proper arc protection, it is important to not omit any of the arc protection components shown in
FIGURE 10. One Channel of the LM2403 with the Recommended Arc Protection Circuit
Figure 10
.
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OPTIMIZING TRANSIENT RESPONSE
Figure 10
Referring to
, there are three components (R1, R2 and L1) that can be adjusted to optimize the transient re­sponse of the application circuit. Increasing the values of R1 and R2 will slow the circuit down while decreasing over­shoot. Increasing the value of L1 will speed up the circuit as well as increase overshoot. It is very important to use induc­tors with very high self-resonant frequencies, preferably above 300 MHz. Ferrite core inductors from J.W. Miller Mag­netics (part
#
78FR12M) were used for optimizing the perfor­mance of the device in the NSC application board. The val­ues shown in
Figure 10
can be used as a good starting point for the evaluation of the LM2403. The NSC demo board also has a position open to add a resistor in parallel with L1. This resistor can be used to help control overshoot. Using vari­able resistors for R1 and the parallel resistor is a great way to help dial in the values needed for optimum performance in a given application.
Pull-up Resistors
Optimizing the performance of the LM2403 does require the use of pull-up resistors at the outputs of the CRT driver. These resistors are shown as R100, R101, and R102 in the schematic. If you have a demo board form National please note that these resistors have been added on the back of the board since there is no PCB location for the pull-up resistors. Because of the improved performance with these resistors, all demo boards have been shipped with the added pull-up resistors. The LM2403 does have some crossover distortion, normal for any AB amplifier such as the LM2403. Adding the pull-up resistors does add more bias to Q3 (
Figure 1
) thus minimizing the crossover distortion. The LM2403 is normally used in high end monitors, so it is highly recommended that the 12k pull-up resistors be used in any design using the LM2403. Selecting a 12k resistor provides the needed pull-up current and limits the worst case power dissipation to 1/4W (white level at 25V).
In some applications pull-down resistors may be preferred. Using 12k resistors gives acceptable performance, but this will require the use of 1/2W resistors. Normally the power save mode establishes whether pull-up or pull-down resis­tors are preferred. If the setup of the power save mode in the monitor gives a low outputat the LM2403, then the pull-down resistors would be preferred, if the 80V supply is still turned on.
Effect of Load Capacitance
The output rise and fall times as well as overshoot will vary as the load capacitance varies. The values of the output cir­cuit (R1, R2 and L1 in
Figure 10
) should be chosen based on the nominal load capacitance. Once this is done the perfor­mance of the design can be checked by varying the load based on what the expected variation will be.
For example, suppose you needed to drive a 10 pF ( load with a 40V of R1, R2 and L1 that give the desired response with a 10 pF
waveform. First, you would pick the values
p-p
±
20%)
load. Then you would test the design when driving an 8 pF load and a 12 pF load. The table below summarizes the re­sults from doing this exercise in a test board in the NSC lab. The output signal swing was 40V
from 65V to 25V.
p-p
Parameter 8 pF 10 pF 12 pF
Rise Time 4.1 4.2 4.3 Overshoot 1
%
%
5
%
10 Fall Time 4.4 4.6 4.7 Overshoot 1
%
%
2
%
5
The example above clearly demonstrates the importance of having a good estimate of the range of the load capacitance.
Effect of Offset
Figure 7
shows the variation in rise and fall times when the output offset of the device is varied from 30 V The rise time shows about twice as much variation as the fall
to 50 VDC.
DC
time, however the maximum variation relative to the center data point (40 V
Operation with V
) is less than 10%.
DC
= 70V
CC
The closed loop topography of the LM2403 allows operation down to 10V above ground. If the user can limit the white level between 10V and 20V, then operation with V is possible. Operating the LM2403 with V quire the same current even though the supply voltage has
CC
= 70V
CC
= 70V will re-
dropped by 12.5%. This results in a power savings of 12.5 (as high a 1.5W), allowing a reduction in the size of the heat­sink.
Figure 8
shows the output waveform of the LM2403 op­erating at a white level of 15V, and a peak-to-peak output swing of 40V. Below is a summary of the LM2403 rise and fall times with various output offset levels with V
CC
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= 70V.
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Application Hints (Continued)
Output
Swing
10V–50V 4.0 ns 5.0 ns 15V–55V 4.2 ns 4.8 ns 20V–60V 4.4 ns 5.0 ns
THERMAL CONSIDERATIONS
Figure 4
shows the performance of the LM2403 in the test circuit shown in The figure shows that the speed of the LM2403 decreases by less than 10%as the case temperature increases from 50˚C to 100˚C. This corresponds to a speed degradation of 2%for every 10˚C rise in case temperature.
Figure 6
shows the total power dissipation of the LM2403 vs. Frequency when all three channels of the device are driving an 8 pF load with a 40V active time (device operating at the specified frequency) which is typical in a monitor application. The other 28%of the time the device is assumed to be sitting at the black level (65V in this case). This graph gives the designer the informa­tion needed to determine the heat sink requirement for his application. The designer should note that if the load capaci­tance is increased the AC component of the total power dis­sipation will also increase.
The LM2403 case temperature must be maintained below 100˚C. If the maximum expected ambient temperature is 50˚C and the maximum power dissipation is 12W, then a maximum heat sink thermal resistance can be calculated:
This example assumes a capacitive load of 8 pF and no re­sistive load.
TYPICAL APPLICATION
A typical application of the LM2403 is shown in Used in conjunction with an LM1283, a complete video chan­nel from monitor input to CRT cathode can be achieved. Per­formance is satisfactory for resolutions up to 1600 x 1200 and pixel clock frequencies up to 160 MHz. schematic for the NSC demonstration board that can be used to evaluate the LM1283/2403 combination in a monitor.
PC Board Layout Considerations
For optimum performance, an adequate ground plane, isola­tion between channels, good supply bypassing and minimiz­ing unwanted feedback are necessary.Also,the length of the signal traces from the preamplifier to the LM2403 and from the LM2403 to the CRT cathode should be as short as pos­sible. The following references are recommended:
Rise Time Fall Time
Figure 2
as a function of case temperature.
signal. The graph assumes a 72
p-p
Figure 11
Figure 11
is the
Ott, Henry W., “Noise Reduction Techniques in Electronic Systems”, John Wiley & Sons, New York, 1976.
“Guide to CRT VideoDesign”, National SemiconductorAppli­cation Note 861.
“Video Amplifier Design for Computer Monitors”, National Semiconductor Application Note 1013.
Pease, Robert A., “Troubleshooting Analog Circuits”, Butterworth-Heinemann, 1991.
Because of its high small signal bandwidth, the part may os­cillate in a monitor if feedback occurs around the video chan­nel through the chassis wiring. To prevent this, leads to the video amplifier input circuit should be shielded, and input cir­cuit wiring should be spaced as far as possible from output circuit wiring.
NSC Demonstration Board
Figures 12, 13
show routing and component placement on
the NSC LM1283/2403 demonstration board. The schematic
%
of the board is shown in good example of a layout that can be used as a guide for fu-
Figure 11
. This board provides a
ture layouts. Note the location of the following components:
C79—VCCbypass capacitor, located very close to pin 6
and ground pins C55—VBBbypass capacitor,located close to pin 10 and
ground C75–C77 — VCCbypass capacitors, near LM2403 and
V
clamp diodes. Very important for arc protection
CC
The routing of the LM2403 outputs to the CRT is very critical to achieving optimum performance.
Figure 14
shows the routing and component placement from pin 1 to the blue cathode. Note that the components are placed so that they almost line up from the output pin of the LM2403 to the blue cathode pin of the CRT connector. This is done to minimize the length of the video path between these two components. Note also that D7, D8, R32 and D3 are placed to minimize the size of the video nodes that they are attached to. This minimizes parasitic capacitance in the video path and also enhances the effectiveness of the protection diodes. The an­ode of protection diode D8 is connected directly to a section
.
of the the ground plane that has a short and direct path to the LM2403 ground pins. The cathode of D7 is connected to V very close to decoupling capacitor C77 (see
Figure 14
CC
) which is connected to the same section of the ground plane as D8. The diode placement and routing is very important for minimizing the voltage stress on the LM2403 during an arc over event. Lastly, notice that S1 is placed very close to the blue cathode and is tied directly to CRT ground.
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Application Hints (Continued)
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Diodes FDH400
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PNP transistors MPSA92
NPN transistors 2N2369A
FIGURE 11. LM1283/2403 Demonstration Board Schematic
Unmarked capacitors 0.1 µF
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Application Hints (Continued)
FIGURE 12. Trace Side of NSC LM1283/2403 Demonstration Board
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Application Hints (Continued)
FIGURE 13. Silk Screen and Trace of the LM1283/2403 Demonstration Board
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Application Hints (Continued)
FIGURE 14. Blue Channel Component Placement and Trace Routing
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Physical Dimensions inches (millimeters) unless otherwise noted
NS Package Number TA11B
Order Number LM2403T
LM2403 Monolithic Triple 4.5 nS CRT Driver
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