The LM2202 is a very high frequency video amplifier system
intended for use in high resolution monochrome or RGB
color monitor applications. In addition to the wideband video
amplifier theLM2202contains a gated differential input black
level clamp comparator for brightness control, a DC controlled attenuator for contrast control and a DC controlled
sub contrast attenuator for drive control. The DC control for
the contrast attenuator is pinned out separately to provide a
more accurate control system for RGB color monitor applications. All DC controls offer a high input impedance and operate over a 0V to 4V range for easy interface to bus controlled
alignment systems. The LM2202 operates from a nominal
12V supply but can be operated with supply voltages down
to 8V for applications that require reduced IC package power
dissipation characteristics.
Features
n Wideband video amplifier
(f
−3dB
=
230 MHz at V
LM2202 230 MHz Video Amplifier System
April 1999
=
n t
1.5 ns at V
r,tf
n Externally gated comparator for brightness control
n 0V to 4V high input impedance DC contrast control
>
(
40 dB range)
n 0V to 4V high input impedance DC drive control
±
(
3 dB range)
n Easy to parallel three LM2202s for optimum color
tracking in RGB systems
n Output stage clamps to 0.65V and provides up to 9V
output voltage swing
n Output stage directly drives most hybrid or discrete CRT
amplifier stages
n Replacement for the LM1202
Applications
n High resolution CRT monitors
n Video switches
n Video AGC amplifier
=
)
4V
O
PP
n Wideband amplifier with gain and DC offset control
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage V
Ground Pins 5, 13, 1513.5V
Voltage at Any Input Pin (V
Video Output Current (I
Package Power Dissipation at
=
25˚C1.56W
T
A
(Above 25˚C Derate Based θ
Pins 4, 7, 16 to
CC
)V
IN
)28mA
17
and TJ)
JA
≥ VIN≥ GND
CC
Package Thermal Resistance (θ
N20A68˚C/W
M20B90˚C/W
Junction Temperature (T
Storage Temperature Range (T
Lead Temperature
N Package (Soldering, 10 sec.)265˚C
ESD Susceptibility
Human Body Model: 100 pF
Discharged through a 1.5k
Resistor1.5 kV
Operating Ratings (Note 2)
Temperature Range−20˚C to +80˚C
Supply Voltage (V
DC Electrical Characteristics
See Test Circuit (
wise noted.
Figure 1
SymbolParameterConditions
4, 7, 16 Total Supply CurrentR
I
S
V
6
V
14L
V
14H
I
14L
I
14H
I
12+
I
12−
V
17L
V
17H
V
OS
Video Input Bias Voltage2.42V (min)
Clamp Gate Low Input VoltageClamp Comparator On0.8V (max)
Clamp Gate High Input VoltageClamp Comparator Off2V (min)
Clamp Gate Low Input CurrentV
Clamp Gate High Input CurrentV
Clamp Cap Charge CurrentV
Clamp Cap Discharge CurrentV
Video Output Low VoltageV
Video Output High VoltageV
Comparator Input Offset VoltageV18−V
0.5VAttentuation at 0.5VRef: AVmax, V
∆ Drive∆ Gain RangeV
THDVideo Amplifier DistortionV
f
−3 dB
t
r
t
f
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional but do not guarantee specific performance limits. For guaranteed specifications and
test conditions see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 3: Typical specifications are specified at +25˚C and represent the most likely parametric norm.
Note 4: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 5: The supply current specified is the quiescent current for V
pends on the output load, R
bient temperature.
Note 6: When measuring video amplifier bandwidth or pulse rise and fall times, a double sided full ground plane printed circuit board is recommended. The measured
rise and fall times are effective rise and fall times, taking into account the rise and fall times of the generator and the oscilloscope.
www.national.com2
Video Amplifier Bandwidth (Note 6)V
Output Rise Time (Note 6)V
Output Fall Time (Note 6)V
. The increase in device power dissipation due to R
Load
CC1,VCC2
Typical
(Note 3)
=
12 kHz20kΩ
IN
=
8
=
9
O
O
O
O
=
4V, V
4V2016V/V (min)
9
=
2V−6dB
8
=
0.5V−38−23dB (min)
8
0V to 4V65dB (min)
=
=
=
=
and V
4V
4V
4V
4V
=
12 kHz0.51
PP,fIN
PP
PP
PP
=
Load
∞
, see
with R
CC3
must be taken into account when operating the device at the maximum am-
Load
230MHz
1.52ns (max)
1.52ns (max)
Figure 1’s
test circuit. The total supply current also de-
Limit (Note
4)
Units
%
(max)
Page 3
Test Circuit
FIGURE 1. LM2202 Test Circuit
DS012591-2
www.national.com3
Page 4
Typical Performance Characteristics (V
Quiescent Supply Current
vs Supply Voltage
DS012591-3
=
CC
12V, T
=
25˚C unless otherwise specified)
A
Attenuation vs Drive Voltage
DS012591-4
Contrast vs Frequency
Attenuation vs
Contrast Voltage
DS012591-7
DS012591-5
Drive vs Frequency
DS012591-6
Circuit Description
Figure 2
shows a block diagram of the LM2202 video amplifier along with contrast and brightness (black level) control.
Contrast control is a DC-operated attenuator which varies
the AC gain of the amplifier. Signal attenuation (contrast) is
achieved by varying the base drive to a differential pair and
thereby unbalancing the current through the differential pair.
As shown in
www.national.com4
Figure 2
, pin 20 provides a 5.3V bias voltage for
the positive input of the attenuator (pin 1). Pin 3 provides a
control voltage for the negative input (pin 2) of the attenuator.
The voltage at pin 3 varies as the voltage at the contrast control input (pin 8) varies thus providing signal attenuation. The
gain is maximum (0 dB attenuation) if the voltage at pin 8 is
4V and is minimum (maximum attenuation) if the voltage at
pin 8 is 0V. The 0V to 4V DC-operated drive control at pin 9
Page 5
Circuit Description (Continued)
providesa6dBgain adjustment range. This feature is necessary for RGB applications where independent gain adjustment of each channel is required.
The brightness or black level clamping requires a “sample
and hold” circuit which holds the DC bias of the video amplifier constant during the black level reference portion of the
video waveform. Black level clamping, often referred to as
DC restoration, is accomplished by applying a back porch
clamp signal to the clamp gate input pin (pin 14). The clamp
comparator is enabled when the clamp signal goes low during the black level reference period (see
clamp comparator is enabled, the clamp capacitor connected to pin 12 is either charged or discharged until the voltage at the minus input of the comparator matches the voltage set at the plus input of the comparator. During the video
portion of the signal, the clamp comparator is disabled and
the clamp capacitor holds the proper DC bias. In a DC
coupled cathode drive application, picture brightness function can be achieved by varying the voltage at the comparator’s plus input. Note that the back porch clamp pulse width
(t
in
Figure 2
W
eration.
) must be greater than 100 ns for proper op-
VIDEO AMPLIFIER SECTION (Input Stage)
A simplified schematic of LM2202’s video amplifier input
stage is shown in
Figure 3
. The 5.4V zener diode, Q1, Q6
and R2 bias the base of Q7 at 2.6V. The AC coupled video
Figure 2
). When the
signal applied to pin 6 is referenced to the 2.6V bias voltage.
Transistor Q7 buffers the video signal, V
the voltage to current. The AC collector current through Q8 is
=
I
/R9. Under maximum gain condition, transistors Q9
V
C8
IN
and Q11 are off and all of I
R10 and R11. The maximum signal gain at the base of Q13
=
is, A
achieved by varying the base drive to the differential pairs
−(R10 + R11)/R9=−2. Signal attenuation is
V1
flows through the load resistors
C8
, and Q8 converts
IN
Q9, Q10 and Q11, Q12 thereby unbalancing the collector
currents through the transistor pairs. Base of Q10 is biased
at 5.3V by externally connecting pin 1 to pin 20 through a
100Ω resistor. Pin 2 is connected to pin 3 through a 100Ω resistor.Adjustingthe contrast voltage at pin 8 produces a control voltage at pin 3 which drives the base of Q9. By varying
the voltage at the base of Q9, Q8’s collector current (I
diverted away from the load resistors R10 and R11, thereby
)is
C8
providing signal attenuation. Maximum attenuation is
achieved when all of I
flows through the load resistors.
flows through Q9 and no current
C8
The differential pair Q11 and Q12 provide drive control.
Q12’s base is internally biased at 7.3V.Adjusting the voltage
at the drive control input (pin 9) produces a control voltage at
the base of Q11. With Q9 off and Q12 off, all of I
through R10, thus providing a gain of A
=
−1. Drive control thus provides a 6 dB attenuation range.
=
−(R10/R9) x V
V1
flows
C8
IN
FIGURE 2. Block Diagram of the LM2202 Video Amplifier
with Contrast and Brightness (Black Level) Control
DS012591-8
www.national.com5
Page 6
Circuit Description (Continued)
FIGURE 3. Simplified Schematic of the LM2202 Video Amplifier Input Stage
VIDEO AMPLIFIER SECTION (Output Stage)
A simplified schematic of LM2202’s video amplifier output
Figure 4
stage is shown in
gain stage. Ideally the gain of the second gain stage would
=
be A
low open loop gain, the gain is approximately A
Thus the maximum gain of the video amplifier is A
A
to the load. The output voltage can swing from 0.2V to 10V.
−R21/R18=−16. Because of the output stage’s
V2
=
20. Transistors Q23 and Q24 provide a push-pull drive
V2
. The output stage is the second
=
−10.
V2
=
A
V
V1
x
CONTRAST CONTROL SECTION
A simplified schematic of LM2202’s contrast control section
is shown in
Figure 5
. A 0V to 4V DC voltage is applied at the
contrast input (pin 8). Transistors Q29, Q30 and Q34 buffer
and level shift the contrast voltage to the base of Q36. The
voltage at the emitter of Q36 equals the contrast voltage
(V
) and the current through Q36’s collector is given by
cont
=
I
C36
/R28.
V
cont
Transistor Q36’s collector current is used to unbalance the
current through the differential pair comprised of Q38 and
Q40. Q40’s base is internally biased at 5.3V and made avail-
www.national.com6
DS012591-9
able at pin 20. Pin 20 is externally connected to pin 1 through
a 100Ω resistor (see
Q38 (pin 3) is externally connected to pin 2 through a 100Ω
resistor (see
ferential pair (Q38, Q40) is balanced and the voltage at pins
Figure 2
Figure 2
and
Figure 3
and
). With V
Figure 3
). The base of
=
2V,the dif-
cont
1 and 2 is 5.3V. Under this condition, Q8’s collector current is
equally split between Q9 and Q10 (see
Figure 3
) and the
amplifier’s gain is half the maximum gain. If contrast voltage
at pin 8 is greater than 2V then Q36’s collector current increases, thus pulling Q38’s collector node lower and consequently moving Q38’s base below 5.3V.With pin 2 at a lower
voltage than pin 1, current through Q10 (see
creases and the amplifier’s gain increases. With V
the amplifier’s gain is maximum.
Figure 3
cont
=
) in-
4V,
If the contrast voltage at pin 8 is less than 2V then Q36’s collector current decreases and Q38’s base is pulled above
5.3V.With pin 2 voltage greater than pin 1 voltage, less current flows through Q10 (see
plifier’s gain decreases. With V
is minimum (i.e., maximum attenuation).
Figure 3
), consequently the am-
=
0V,the amplifier’s gain
cont
Page 7
Circuit Description (Continued)
FIGURE 4. Simplified Schematic of LM2202 Video Amplifier Output Stage
DS012591-10
www.national.com7
Page 8
Circuit Description (Continued)
DS012591-11
www.national.com8
FIGURE 5. Simplified Schematic of LM2202 Contrast Control
Page 9
Circuit Description (Continued)
DRIVE CONTROL SECTION
A simplified schematic of the LM2202’s drive control section
is shown in
drive control input (pin 9). Transistors Q49, Q50 and Q54
buffer and level shift the contrast voltage to the base of Q56.
The voltage at the emitter of Q56 equals the drive voltage,
V
drive
I
C56
Transistor Q56’s collector current is used to unbalance the
current through the differential pair comprised of Q58 and
Q60. Q60’s base is internally biased at 7.3V and connected
to the base of Q12 (see
connected to the base of Q11 (see
2V, the differential pair (Q58, Q60) is balanced and the voltage at the bases of Q11 and Q12 is 7.3V. Under this condition, Q10’s collector current is equally split between Q11 and
Q12 (see
than 2V then Q56’s collector current increases, thus pulling
Q58’s collector node lower and consequently moving Q58’s
base below 7.3V. With base of Q11 below 7.3V, current
through Q12 (see
gain increases. With V
mum under maximum contrast condition (i.e., V
If the drive voltage at pin 8 is less than 2V then Q56’s collector current decreases and Q58’s base is pulled above 7.3V.
With base of Q11 greater than 7.3V, less current flows
through Q12 (see
gain decreases. With V
less than the maximum gain.
Figure 6
. A 0V to 4V DC voltage is applied at the
and the current through Q56’s collector is given by
=
/R43.
V
drive
Figure 3
). Q58’s base is internally
Figure 3
). With V
Figure 3
). If the drive voltage at pin 9 is greater
Figure 3
) increases and the amplifier’s
=
4V,the amplifier’s gain is maxi-
drive
Figure 3
), consequently the amplifier’s
=
0V,the amplifier’s gain is 6 dB
drive
cont
=
cont
4V).
CLAMP GATE AND CLAMP COMPARATOR SECTION
Figure 7
and
Figure 8
show simplified schematics of the
clamp gate and clamp comparator circuits. The clamp gate
circuit (
Figure 7
) consists of a PNP input buffer transistor
(Q82), a PNP emitter coupled pair (Q85 and Q86) referenced on one side to 2.1V and an output switch transistor
Q89. When the clamp gate input at pin 14 is high (
the Q89 switch is on and shunts the 200 µAcurrent from current source Q90 to ground. When pin 14 is low (
Q89 switch is off and the 200 µA current is mirrored by the
current mirror comprised of Q91 and Q75 (see
Consequently the clamp comparator comprised of the differential pair Q74 and Q77 is enabled. The input of the clamp
comparator is similar to the clamp gate except that an NPN
emitter coupled pair is used to control the current that will
=
charge or discharge the clamp capacitor externally connected from pin 12 to ground. PNP transistors are used at
the inputs because they offer a number of advantages over
NPNs. PNPs will operate with base voltages at or near
ground and will usually have a greater emitter base breakdown voltage (BVebo). Because the differential input voltage
to the clamp comparator during the video scan period could
be greater than the BVebo of NPN transistors, a resistor
(R63) with a value one half that of R60 or R68 is connected
between the bases of Q71 and Q79. The clamp comparator’s common mode range is from ground to approximately
9V and the maximum differential input voltage is V
>
<
1.3V) the
Figure 8
CC
1.5V)
).
.
www.national.com9
Page 10
Circuit Description (Continued)
DS012591-12
www.national.com10
FIGURE 6. Simplified Schematic of the LM2202 Drive Control
Page 11
Circuit Description (Continued)
FIGURE 7. Simplified Schematic of the LM2202 Clamp Gate Circuit
DS012591-13
www.national.com11
Page 12
Circuit Description (Continued)
FIGURE 8. Simplified Schematic of the LM2202 Clamp Comparator Circuit
Applications
SINGLE VIDEO CHANNEL
A typical application for a single video channel is shown in
Figure 9
. The video signal is AC coupled to pin 6. The
LM2202 internally biases the video signal to 2.6 V
trast control is achieved by applying a 0V to 4V DC voltage
at pin 8. The amplifier’s gain is minimum (i.e., maximum signal attenuation) if pin 8 is at 0V and is maximum if pin 8 is at
4V.With pin 9 (drive control) at 0V, the amplifier has a maximum gain of 10.
For DC restoration, a clamp signal must be applied to the
clamp gate input (pin 14). The clamp signal should be logic
low (less than 0.8V) only during the back porch (black level
reference period) interval (see
put is TTL compatible. Brightness control is provided by applying a 0V to 4V DC voltage at pin 19. For example, if pin 19
is biased at 1V then the video signal’s black level will be
clamped at 1V. A 510Ω load resistor is connected from the
video output pin (pin 17) to ground. This resistor biases the
output stage of the amplifier. For power dissipation considerations, the load resistor should not be much less than 510Ω.
www.national.com12
Figure 2
). The clamp gate in-
DC
. Con-
DS012591-14
RGB VIDEO PREAMPLIFIER
Figure 10
three LM2202s. Note that pins 1 and 2 of IC1 are connected
to pins 1 and 2 of IC2 and IC3 respectively.This allows IC1
to provide a master contrast control and optimum contrast
tracking. Adjusting the contrast voltage at pin 8 of IC1 will
vary the gain of all three video channels. Drive control input
(pin 9) of each LM2202 allows individual gain adjustment for
achieving white balance.
The black level of each video channel can be individually adjusted to the desired voltage by adjusting the voltage at pin
19. In a DC-coupled cathode drive application, adjusting the
voltage at pin 19 of each IC will provide cutoff adjustment. In
an AC-coupled cathode drive application, the video signal is
AC coupled and DC restored at the cathode. In such an application, the video signal’s black level may be clamped to
the desired level by simply biasing pin 19 to the black level
voltage by using a voltage divider at pin 19.
shows an RGB video preamplifier circuit using
Page 13
Applications (Continued)
FIGURE 9. Typical LM2202 Application (Single Video Channel)
DS012591-15
www.national.com13
Page 14
Applications (Continued)
FIGURE 10. Typical RGB Application with Contrast, Drive and Black Level (Cutoff) Control
www.national.com14
DS012591-16
Page 15
Power Down Characteristics
The LM2202 includes a built-in power down spot killer to prevent a flash on the screen upon power down. The LM2202’s
output voltage decreases as the device is being powered
down, thus preventing a flash on the screen. In some preamplifiers, the video output signal may go high as the device is
being powered down. This may cause a whiter-than-white
level at the output of the CRT driver, thus causing a flash on
the screen.
PC Board Layout Considerations
For optimum performance and stable operation, a
double-sided printed circuit board with adequate ground
plane and power supply decoupling as close to the V
as possible is recommended. For suggestions on optimum
PC board layout, please see the reference section below.
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant
into the body, or (b) support or sustain life, and
whose failure to perform when properly used in
accordance with instructions for use provided in the
2. A critical component is any component of a life
support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
labeling, can be reasonably expected to result in a
significant injury to the user.
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.