Page 1
LM1281
85 MHz RGB Video Amplifier System with On Screen
Display (OSD)
General Description
The LM1281 is a full feature video amplifier with OSD inputs,
all within a 28-pin package. This part is intended for use in
monitors with resolutions up to 1024 x 768. The video section of the LM1281 features three matched video amplifiers
with blanking. All of the video amplifier adjustments feature
high input impedance 0V to 4V DC controls, providing easy
interfacing to bus controlled alignment systems. The OSD
section features three TTL inputs and a DC contrast control.
The switching between the OSD and video section is controlled by a single TTL input. Although the OSD signals are
TTL inputs, these signals are internally processed to match
the OSD logic low level to the video black level. When adjusting the drive controls for color balance of the video signal, the color balance of the OSD display will track these
color adjustments. The LM1281 also features an internal
spot killer circuit to protect the CRT when the monitor is
turned off. For applications without OSD insertion please refer to the LM1205 or LM1208 data sheets.
Features
n Three wideband video amplifiers 85 MHz@−3 dB
(4 V
output)
PP
n TTL OSD inputs, 50 MHz bandwidth
n On chip blanking, outputs under 0.1 V when blanked
n High speed Video/OSD switch
n Independent drive control for each channel for color
balance
n 0V to 4V, high impedance DC contrast control with over
40 dB range
n 0V to 4V, high impedance DC drive control (0 dB to
−12 dB range)
n 0V to 4V, high impedance DC OSD contrast control with
over 40 dB range
n Capable of 7 V
bandwidth)
n Output stage directly drives most hybrid or discrete CRT
drivers
output swing (slight reduction in
PP
Applications
n High resolution RGB CRT monitors requiring OSD
capability
LM1281 85 MHz RGB Video Amplifier System with On Screen Display (OSD)
April 1999
Block and Connection Diagram
DS012355-1
FIGURE 1. Order Number LM1281N
See NS Package Number N28B
© 1999 National Semiconductor Corporation DS012355 www.national.com
Page 2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Pins 6, 9, and 22 15V
Peak Video Output Source Current
(Any One Amp) Pins 18, 20, and 23 28 mA
Voltage at Any Input Pin (V
Power Dissipation (P
(Above 25˚C Derate based on
and TJ) 2.5W
θ
JA
)V
IN
)
D
≥ VIN≥ GND
CC
Thermal Resistance (θ
Junction Temperature (T
) 50˚C/W
JA
) 150˚C
J
ESD Susceptibility (Note 4) 2 kV
Storage Temperature −65˚C to +150˚C
Lead Temperature
(Soldering, 10 sec.) 265˚C
Operating Rating (Note 2)
Temperature Range: −20˚C to +70˚C
Supply Voltage (V
) 11.4V ≤ VCC≤ 12.6V
CC
DC Electrical Characteristics
See DC Test Circuit (
=
0V; V
1V unless otherwise stated
25
Figure 5
), T
A
=
25˚C; V
Symbol Parameter Conditions
I
S
R
IN
V
15l
V
15h
I
15l
I
15h
V
16l
V
16h
I
16l
I
16h
V
12
I
vid-clamp
I
vid-bias
I
out-clamp
I
out-bias
V
OL
V
OH
V
O(1V)
∆V
O(1V)
(blanked) Video Output Blanked Voltage Blank Gate On 100 500 mV (max)
V
OL
I
13,14, 26, 27, or
28
I
25
V
spot
Supply Current V
Video Input Resistance Any One Amplifier 100 kΩ
Clamp Gate Low Input Voltage Clamp Comparators On 1.2 0.8 V (max)
Clamp Gate High Input Voltage Clamp Comparators Off 1.6 2.0 V (min)
Clamp Gate Low Input Current V
Clamp Gate High Input Current V
Blank Gate Low Input Voltage Blank Gate On 1.2 0.8 V (max)
Blank Gate High Input Voltage Blank Gate Off 1.6 2.0 V (min)
Blank Gate Low Input Current V
Blank Gate High Input Current V
Reference Voltage 2.0 V
Video Input Cap Charge Current Clamp Comparators On
Video Input Cap Bias Discharge
Current
Output Clamp Cap Charge Current Clamp Comparators On
Output Clamp Cap Bias Discharge
Current
Video Output Low Voltage V
Video Output High Voltage V
Video Black Level Output Voltage V
Video ∆Black Level Output
Voltage
Contrast/Drive Control Input
Current
Cut-Off Control Input Current V
Spot Killer Voltage VCCAdjusted to Activate 10.6 11.2 V
=
=
V
CC1
12V; V
CC2
CC1+VCC2,RL
=
0V −1.5 −5.0 µA (max)
15
=
12V 0.01 1.0 µA (max)
15
=
0V −8 −11 µA (max)
16
=
12V 0.01 1.0 µA (max)
16
Clamp Comparators Off
Clamp Comparators Off
=
0V 50 100 mV (max)
25
=
10V 7.5 7 V (min)
25
=
1V 1.2 V (Note 8)
25
Between Any Two Amplifiers,
=
1V
V
25
=
V
contrast
=
0V to 4V −1.0 1.5 µA (max)
25
=
13
=
=
4V; V
14
∞
(Note 7) 95 120 mA (max)
4V; V
=
4V; V
16
Typical
(Note 5)
±
750
±
750 nA
±
750
drive
=
=
4V; V
4
Limit
(Note 6)
±
450 µA (min)
±
450 µA (min)
0V; V
750 nA
±
20
=
V
0V to 4V
Drive
−125 −500 nA (max)
±
250 mV (max)
15
Units
=
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Page 3
AC Electrical Characteristics
See AC Test Circuit (
4V DC for the AC test unless otherwise stated (Note 15)
Figure 6
), T
A
=
25˚C, V
Symbol Parameter Conditions
A
V max
∆A
V2V
∆A
V 0.25V
∆Drive
∆Drive
A
V match
A
V track
2V
0.25V
Video Amplifier Gain V
Contrast Attenuation@2V Ref: AVmax, V
Contrast Attenuation@0.25V Ref: AVmax, V
Drive Attenuation@2V Ref: AVmax, V
Drive Attenuation@0.25V Ref: AVmax, V
Absolute Gain Match@AVmax V
Gain Change between Amplifiers V
THD Video Amplifier Distortion V
f(−3 dB) Video Amplifier Bandwidth (Notes
11, 12)
(Video) Video Output Rise Time (Note 11) V
t
r
t
(Video) Video Output Fall Time (Note 11) V
f
V
10 kHz Video Amplifier 10 kHz Isolation V
sep
V
10 MHz Video Amplifier 10 MHz Isolation V
sep
t
(Blank) Blank Output Rise Time (Note 11) Blank Output=1V
r
t
(Blank) Blank Output Fall Time (Note 11) Blank Output=1V
f
t
(Blank) End of Blanking Propagation Delay Blank Output=1V
r-prop
t
(Blank) Start of Blanking Propagation Delay Blank Output=1V
f-prop
T
(Clamp) Back Porch Clamp Pulse Width (Note 14) 200 ns (min)
pw
CC1
=
=
V
CC2
13
V
drive
13
9)
13
O
V
13
V
O
O
O
13
13
=
12V; V
=
=
=
=
=
=
=
=
=
=
0V. Manually adjust Video Output pins 18, 20, and 23 to
4
Typical
(Note 5)
=
4V, V
=
4V, V
400 mV
IN
PP
4V 20.0 16.9 dB (min)
=
2V −6 dB
13
=
0.25V −40 dB
13
=
2V −4.5 dB
drive
=
0.25V −11 dB
drive
=
4V (Note
drive
4V to 2V (Notes 9, 10)
,f=10 kHz 1
1V
PP
4V, V
4V
4V
4V
=
3V,
drive
PP
PP
PP
10.0 7.0 V/V (min)
±
0.3 dB
±
0.2 dB
85 MHz
3.5 ns
4.5 ns
Limit
(Note 6)
4V (Note 13) −70 dB
4V (Notes 11, 13) −50 dB
PP
PP
PP
PP
8ns
14 ns
23 ns
20 ns
Units
%
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Page 4
OSD Electrical Characteristics
See DC Test Circuit (
=
0V; V
1V unless otherwise stated
25
Figure 5
), T
A
=
25˚C; V
Symbol Parameter Conditions
V
OSDI
V
OSDh
V
4l
V
4h
I
4l
I
4h
∆V
O-OSD(1V)
V
OSD-out
∆V
OSD-out
∆V
OSD-out match
V
OSD-out track
t
(OSD S) Video to OSD Switch Time (Note
r
(OSD S) OSD to Video Switch Time (Note
t
f
(OSD S) Video to OSD Propagation Delay V
t
r-prop
t
(OSD S) OSD to Video Propagation Delay V
f-prop
t
(OSD) OSD Rise Time at VO(Note 11) V
r
t
(OSD) OSD Fall Time at VO(Note 11) V
f
t
(OSD) Starting OSD Propagation Delay V
r-prop
t
(OSD) Ending OSD Propagation Delay V
f-prop
V
10 kHz Video Feedthrough into OSD V
feed
V
10 MHz Video Feedthrough into OSD V
feed
Note 1: Absolute Maximum Rating indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditons.
Note 3: V
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Typical specifications are specified at +25˚C and represent the most likely parametric norm.
Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 7: The supply current specified is the quiescent current for V
depends on the output load. With video output at 1V DC, the additional current through V
Note 8: Output voltage is dependent on load resistor. Test circuit uses R
Note 9: Measure gain difference between any two amplifiers. V
Note 10: ∆A
gain change between any two amplifiers with the contrast voltage (V
max the three amplifiers’ gains might be 17.1 dB, 16.9 dB, and 16.8 dB and change to 11.2 dB, 10.9 dB and 10.7 dB respectively for V
sured typical
Note 11: When measuring video amplifier bandwidth or pulse rise and fall times, a double sided full ground plane printed circuit board without socket is recommended. Video amplifier 10 MHz isolation test also requires this printed circuit board. The reason for a double sided full ground plane PCB is that large measurement
variations occur in single sided PCBs.
Note 12: Adjust input frequency from 10 MHz (A
Note 13: Measure output levels of the other two undriven amplifiers relative to the driven amplifier to determine channel separation. Terminate the undriven amplifier
inputs to simulate generator loading. Repeat test at f
Note 14: A minimum pulse width of 200 ns is guaranteed for a horizontal line of 15 kHz. This limit is guaranteed by design. If a lower line rate is used a longer clamp
pulse may be required.
Note 15: During the AC test the 4V DC level is the center voltage of the AC output signal. For example, if the output is 4 V
and 6V DC.
Note 16: When V
shown in
OSD Input Low Input Voltage 1.2 0.4 V (max)
OSD Input High Input Voltage 1.6 2.0 V (min)
OSD Select Low Input Voltage Video Inputs are Selected 1.2 0.8 V (max)
OSD Select High Input Voltage OSD Inputs are Selected 1.6 2.0 V (min)
OSD Select Low Input Current V
OSD Select High Input Current V
OSD ∆Black Level Output Voltage,
Difference from Video Output
OSD Output Voltage V
PP
OSD Output VPPAttenuation V
Output Match between Channels V
Output Variation between Channels V
11)
11)
supply pins 6, 9, and 22 must be externally wired together to prevent internal damage during VCCpower on/off cycles.
CC
track is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three attenuators. It is the difference in
V
±
0.1 dB channel tracking.
V
=
=
=
V
V
1
Figure 3
. Thus tr(OSD) is actually a fall time and tf(OSD) is actually a rise time in this condition.
0V and the video input is 0.7V, then t
2
3
=
=
V
CC1
max reference level) to the −3 dB corner frequency (f
=
10 MHz for V
IN
12V; V
CC2
=
4
=
4
=
V
25
=
V
14
=
14
=
14
=
14
=
V
1
=
V
1
=
1
=
1
=
14
=
14
=
14
=
14
=
14
=
V
1
=
14
=
V
1
and V
CC1
=
L
=
400 mV
IN
) at either 4V or 2V measured relative to an AVmax condition, V
13
sep 10 MHz
(OSD)=11ns and tf(OSD)=4 ns. The Video Output waveform will be inverted from the one
r
=
13
4V; V
=
14
0V −3.0 −5.0 µA (max)
12V 0.01 2.0 µA (min)
1V
4V, V
2V, V
4V, V
4V to 2V, V
V
2
V
2
V
2
V
2
4V; V
4V; V
4V; V
4V; V
4V; V
V
2
4V; V
V
2
CC2
390Ω.
PP
=
2V 4.5 V
Drive
=
2V 50 30
Drive
=
2V
.
=
=
=
=
=
=
with R
.
Drive
V
3
V
3
V
3
V
3
25
25
25
25
25
V
3
25
V
3
=
Drive
=
4V (Note 16)
=
4V (Note 16)
=
=
V
V
13
=
=
=
L
14
=
V
V
13
14
=
1V 4 ns
=
1V 10 ns
=
1V 6.5 ns
=
1V 9 ns
=
1V;
0V
=
1V;
0V
=
∞
, see
Figure 5’s
is 8 mA for
CC2
4V; V
2V
16
=
4V; V
Typical
(Note 5)
=
=
4V; V
Drive
±
85
±
2.0
±
3.5
4V; V
4
Limit
(Note 6)
±
175 mV (max)
4ns
11 ns
=
4V 11 ns
=
4V 12 ns
−70 dB
−60 dB
test circuit. The supply current for V
Figure 5
’s test circuit.
).
−3 dB
the signal will swing between 2V DC
PP
CC2
=
4V. For example, at A
13
=
2V.This yields the mea-
13
15
%
(pin 22) also
=
Units
PP
(min)
%
%
V
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Page 5
Typical Performance Characteristics V
Attenuation vs Contrast Voltage
=
CC
12V, T
=
25˚C unless otherwise specified
A
Attenuation vs Drive Voltage
LM1281 Crosstalk vs Frequency
LM1281 Contrast vs Frequency
DS012355-2
DS012355-4
DS012355-5
DS012355-3
LM1281 Drive vs Frequency
DS012355-6
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Page 6
Timing Diagrams
DS012355-7
FIGURE 2. Blanking Propagation Delay and Rise/Fall Time
FIGURE 3. Video to OSD, OSD to Video Propagation Delay and Switching Time
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DS012355-8
Page 7
Timing Diagrams (Continued)
FIGURE 4. OSD Propagation Delay and Rise/Fall Times
Test Circuits
DS012355-9
FIGURE 5. LM1281 OSD Video Preamp DC Test Circuit
DS012355-10
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Page 8
Test Circuits (Continued)
FIGURE 6. LM1281 OSD Video Preamp AC Test Circuit
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DS012355-11
Page 9
Test Circuits (Continued)
FIGURE 7. LM1281 OSD Video Preamp Demonstration Board Schematic
DS012355-12
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Page 10
Pin Descriptions
Pin No. Pin Name Schematic Description
1
2
3
Red OSD Input
Green OSD Input
Blue OSD Input
These inputs accept standard TTL inputs. Each
color is either fully on (logic high) or fully off
(logic low). Connect unused pins to ground
with a 47k resistor.
4 Video/OSD Switch
This input accepts a standard TTL input.
H=OSD
L=Video
Connect to ground with a 47k resistor when
not using OSD.
5
8
11
Red Video In
Green Video In
Blue Video In
Video inputs. These inputs must be AC
Coupled with a minimum ofa1µFcap, 10 µF
is preferred. DC restoration is done at these
inputs. A series resistor of about 33Ω should
also be used.
6
V
9
7
CC1
Ground Ground pins. All grounds are internally
10
21
12 V
REF
Power supply pins (excluding output stage)
connected and must also be connected on the
PCB.
Pin used for additional filter capacitor to
internal reference. The voltage at this pin is
2.0V.
13
14
26
27
28
Video Contrast
OSD Constrast
Blue Drive
Green Drive
Red Drive
Contrast control pins:
4V— no attenuation
0V— over 60 dB attenuation
Drive control pins:
4V— no attenuation
0V— 12 dB attenuation
15
Clamp Gate
16
Blank Gate
17
Blue Clamp Cap
19
Green Clamp Cap
24
Red Clamp Cap
www.national.com 10
Both pins accept TTL inputs and are active
low. The clamp gate provides DC restoration of
the video signal. The blank gate forces the
video outputs to below 200 mV.
The external clamp cap is charged and
discharged to the correction voltage needed for
DC restoration. 0.1 µF is the recommended
value.
Page 11
Pin Descriptions (Continued)
Pin No. Pin Name Schematic Description
18
20
23
Blue Video Out
Green Video Out
Red Video Out
Video output. For proper black level the output
must drive 390Ω impedance.
22 V
25 RGB Cutoff Adjust Sets the black level of the video outputs to all
CC2
Power supply pin for the output stage. There
are no internal connections to V
three channels. Range is 0V to 4V. Minimum
black level is limited to about 300 mV.
CC1
Functional Description
Figure 1
on the front page shows the block diagram of the
LM1281 along with the pinout of the IC. Each channel receives both a video signal and an OSD signal at its input amplifier (−A1). The Video/OSD Switch signal also goes to the
input amplifiers, controlling whether the video or the OSD
signal passes through the LM1281. Both the OSD inputs and
the Video/OSD Switch accept standard TTL signals. If video
is selected then a TTL low is applied to pin 4, for OSD a TTL
high needs to be applied. When the OSD feature is not used,
then pin 4 needs to be connected to ground via a 47k resistor.Although the OSD input signal is a TTL signal, the input
amplifier processes this signal to match the video levels. A
TTL high signal will be at the video white level and a TTL low
signal will typically be within 100 mV of the video black level.
Note that by using the LM1281 the monitor designer connects the OSD input signals directly to the IC with NO signal
processing.
DC restoration is performed on the video inputs to the
LM1281. Remember video inputs are always AC coupled to
the video pre-amp. There is no DC standard for the video input, therefore AC coupling the video inputs is necessary for
proper operation of the monitor. A minimum capacitance of
1 µF is recommended at the video input pins. The preferred
value is 10 µF. Part of the signal processing of the TTL OSD
inputs is matching the black level of the OSD signal (TTL
low) to the black level of the video signal. With AC coupling
of the video inputs, DC restoration must be done at the input
to perform the black level matching.
The next stage in the LM1281 is the Contrast Attenuation.
Both the video and OSD contrast controls go to this stage.
For easy interfacing to 5V DACs all control inputs, including
these two controls, use a 0V to 4V range. Both contrast controls give no attenuation at 4V and full attenuation (over
−50 dB) at 0V. The video and OSD contrast adjustments are
completely independent of each other, allowing the user to
set the desired contrast of the OSD window without affecting
the video portion of the display.There is only one output from
this section, any adjustments on the signal path beyond the
contrast stage affects both the video signal and the OSD signal.
Following the Contrast Attenuation block is the Drive Attenuation. By having the Drive Attenuation past the contrast
stage, any adjustment made on the video signal will equally
affect the OSD signal. This configuration simplifies the white
level adjustment. When the white level of the video is adjusted then the OSD white level is automatically set. The
only OSD adjustment necessary when using the LM1281 is
the OSD contrast. Note that when performing the white level
adjustments the video portion of the display must be used,
because there are minor variations between the OSD levels
and the video levels.
The output stage is the −A2 amplifier.This stage is similar to
the LM1205 output stage, where the video output can be
blanked to a level below the video black level. A blacker than
black output during blanking provides the capability to blank
at the cathodes of the CRT.This eliminates the need for using high voltage transistors at G1 of the CRT to perform the
blanking function. When the outputs are blanked the
LM1281 can still DC restore the video output signal by using
the Clamp Gate. There is an internal feedback stage that
does the DC restoration. In order to maintain the correct
video levels based on this feedback loop, the video output of
the LM1281 must be terminated with a 390Ω impedance.
The required correction voltage for DC restoration is stored
on the clamp cap. A value of 0.1 µF is recommended for the
clamp cap. If the cap value is too small then there will be a tilt
(shift) in the DC level of the video output during the horizontal scan. If the cap value is too large, then the DC restoration
circuit may not be able to maintain the proper DC level of the
video signal. Since DC restoration is also done at the video
inputs, larger clamp cap values will be less of a problem with
the LM1281 than with most other video preamps. The reference level for the DC restoration circuit is set at the RGB
Cutoff Adjust pin (pin 25). Most monitor applications AC
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Page 12
Functional Description (Continued)
couple the preamp output to the cathode drivers. Therefore
only one cutoff adjustment is provided, this is used primarily
to optimize the operation of the cathode drivers.
Note that the Blank and Clamp Gates are active low. These
pins are normally controlled by standard TTL signals. For
video applications the Clamp Gate must be used. There are
designs where the blank function may not be required. When
the Blank Gate is not used, it must be tied high by a pullup
resistor.A resistor value of 47k is acceptable, going to either
4V or 12V.
Gain of −A2 is controlled by the Drive Adjust pins. These are
also 0V to 4V control voltages. 4V results in no attenuation at
−A2, and 0V results in a −12 dB attenuation. The 12 dB adjustment range should provide more than enough adjustment for setting the white level. Note that a 12 dB range
givesa4to1range in the output levels between the three
channels.
Applications of the LM1281
A schematic for a demonstration board is shown in
This board was used for the characterization of the LM1281.
Note that a 33Ω resistor is in series with all inputs to the IC
that receive external signals. These resistors are recommended to protect the IC from any sudden voltage surges
that may result during the power up and power down modes,
or when connecting the monitor to other equipment. The
monitor designer should include these resistors in his design. If additional protection against ESD at the video inputs
is necessary, then adding clamp diodes on the IC side of the
33Ω resistor is recommended; one to V
ground. Normally a designer may want to increase the value
of the 33Ω resistor at pins 5, 8, and 11 for additional ESD
protection at the video inputs. Remember that the input capacitor to the video inputs is also part of the DC restoration
circuit. This circuit is depending on a maximum circuit resistance of about 110Ω. The 33Ω resistors should not be increased in value. The internal ESD protection and the external clamp diodes, one to +12V and the other to ground, will
provide excellent ESD protection.
Interfacing to the OSD inputs is quite easy since the signal
processing necessary to match the OSD signals to the video
levels is done internally by the LM1281. However, proper design techniques must be followed in assuring that a good
TTL signal is received at the LM1281. Ground bounce in the
TTL signal can cause improper switching times, possibly
with multiple switching. Such affects will result in degradation
in the quality of the displayed OSD window. The final TTL
stage needs to be located near the LM1281 to assure clean
TTL signals. Propagation delay is another source capable of
degrading the OSD display. The optimum condition is to
have all OSD signals originate from one register, keeping the
variation in the propagation delays under 5 ns. If the OSD
feature is not used, or the lines may be disconnected for
some testing operations, then the Video/OSD Switch pin (pin
4) must have a pull down resistor to ground to insure operation in the video mode. Using a 47k pull down resistor will
keep this pin low, and provide enough resistance to where
the pin can still be driven directly by a TTL signal. Pins 1
through 3 should also be terminated the same way, eliminating the potential to switch logic levels just from the noise at
the open pins.
Figure 2
through
Figure 4
show the timing diagrams for the
LM1281. When measuring propagation delays all TTL signals are measured at the time they cross 1.3V. The video
CC1
Figure 7
and one to
output is set to 4 V
the output is half way in its transition (changed by 2V). Rise
. Propagation delay is measured when
PP
and fall times of the video output are measured between the
10%and 90%points of the transitions.
Board layout is always critical in a high frequency application
such as using the LM1281. Apoor layout can result in ringing
of the video waveform after sudden transitions, or the part
could actually oscillate. A good ground plane and proper
routing of the +12V are important steps to a good PCB layout. The LM1281 can operate on a single sided board with a
good layout.Aground plane is recommended and it is best to
isolate the output stage grounds from the rest of the circuit.
Also the two grounds should be connected together only at
one point, ideally where the ground cable is connected to the
board ground. Yes, all grounds are connected internally, but
trace resistance can still allow for ground bounce, giving
enough feedback for oscillations. The output stage power
supply pin, pin 22, does not have an internal connection to
the other power supply pins. This pin must be connected to
the +12V supply, preferably with high frequency isolation.
This is easily done with a ferrite bead between pin 22 and the
+12V supply. Figures
.
form obtained with the LM1281 using the single sided demo
Figure 8
and
Figure 9
board designed for this part.
FIGURE 8. LM1281 Rise Time
FIGURE 9. LM1281 Fall Time
show the wave-
DS012355-22
DS012355-23
www.national.com 12
Page 13
References
Zahid Rahim, “Guide to CRT Video Design,” Application
Note 861, National Semiconductor Corp., Jan. 1993
Ott, Henry W.
tems
Noise Reduction Techniquesin Electronic sys-
, John Wiley & Sons, New York, 1976
www.national.com13
Page 14
Physical Dimensions inches (millimeters) unless otherwise noted
28-Lead (0.600" Wide) Molded Dual-In-Line Package
NS Package Number N28B
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL
LM1281 85 MHz RGB Video Amplifier System with On Screen Display (OSD)
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