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LM1279
110 MHz RGB Video Amplifier System with OSD
General Description
The LM1279 is a full featured and low cost video amplifier
with OSD (On Screen Display). 8V operation for low power
and increased reliability. Supplied in a 20-pin DIP package,
accommodating very compact designs of the video channel
requiring OSD. All video functions controlled by 0V to 4V
high impedance DC inputs. This provides easy interfacing to
5V DACs used in computer controlled systems and digital
alignment systems. Unique OSD switching, no OSD switching signalrequired.An OSDsignal at any OSD inputtypically
switches the LM1279 to the OSD mode within 5 ns. Ideal
video amplifier for the low cost OSD monitor with resolutions
up to 1280 x1024. The LM1279 provides superior protection
against ESD. Excellent alternative for the MC13282 in new
designs.
Features
n Three wideband video amplifiers 110 MHz@−3dB (4
V
PP
output)
n OSD signal to any OSD input pin automatically switches
all 3 outputs to the OSD mode
n Fast OSD switching time, typically 5 ns
n 3.5 kV ESD protection
n Fixed cutoff level typically set to 1.35V
n 0V to 4V, high impedance DC contrast control with over
40 dB range
n 0V to 4V, high impedance DC drive control (0 dB to
−12 dB range)
n Matched (
±
0.3 dB or 3.5%) attenuators for contrast
control
n Output stage directly drives CRT drivers
n Ideal combination with LM2407 CRT driver
Applications
n High resolution RGB CRT monitors
n Video AGC amplifiers
n Wideband amplifiers with contrast and drive controls
n Interface amplifiers for LCD or CCD systems
Block and Connection Diagram
DS100091-1
FIGURE 1. Order Number LM1279N
See NS Package Number N20A
September 1998
LM1279 110 MHz RGB Video Amplifier System with OSD
© 1998 National Semiconductor Corporation DS100091 www.national.com
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
Pins 2 and 16 (Note 3) 10V
Peak Video Output Source Current
(Any One Amp) Pins 13, 15, or 18 28 mA
Voltage at Any Input Pin (V
IN
)V
CC
≥ VIN≥ GND
Power Dissipation (P
D
)
(Above 25˚C Derate Based on θ
JA
and TJ) 2.1W
Thermal Resistance to Ambient (θ
JA
) 60˚C/W
Thermal Resistance to Case (θ
JA
) 37˚C/W
Junction Temperature (T
J
) 150˚C
ESD Susceptibility (Note 4) 3.5 kV
ESD Machine Model (Note 16) 300V
Storage Temperature −65˚C to 150˚C
Lead Temperature
(Soldering, 10 sec.) 265˚C
Operating Ratings (Note 2)
Temperature Range 0˚C to 70˚C
Supply Voltage (V
CC
)
7.5V ≤ V
CC
≤
8.5V
DC Electrical Characteristics
TA= 25˚C; V
CC1=VCC2
= 8V; V10= 4V; V
Drive
= 4V; V11= 7V; V
OSD
= 0V; RL= 390Ω unless otherwise stated.
Symbol Parameter Condition
Typical
(Note 5)
Limit
(Note 6)
Units
I
S
Supply Current I
CC1+ICC2−ILoad
(Note 7) 80 90 mA(max)
V
3, 5, 8
Video Amplifier Input Bias Voltage 2.5 V
R
IN
Video Input Resistance Any One Amplifier 20 kΩ
V
11off
Sandcastle Off Voltage 1.4 1.2 V (max)
V
11blank
Sandcastle Blank Voltage Start of Blank Region 1.4 1.7 V (min)
V
11blank
Sandcastle Blank Voltage End of Blank Region 2.8 3.2 V (max)
V
11clamp &
Blank
Sandcastle Clamp and Blank On
Voltage
Start of Clamp and Blank
Region
3.2 3.6 V (min)
V
11clamp &
Blank
Sandcastle Clamp and Blank On
Voltage
End of Clamp and Blank
Region
6.2 5.8 V (max)
V
11clamp
Sandcastle Clamp On/Blank Off
Voltage
Clamp Only Region, Max =
V
CC
6.2 6.5 V (min)
I
11off
Sandcastle Off Current V11= 0V −5.0 −8.0 µA(max)
I
11test
Sandcastle Clamp On/Blank Off
Curr
V11= 6.5V
−100 −500 nA(max)
I
clamp
Clamp Cap Charge Current Clamp Comparators On
±
750
±
500 µA(min)
I
bias
Clamp Cap Bias Discharge
Current
Clamp Comparators Off
50 200 nA (max)
V
OL
Video Black Level V
Video in
= 0V, V11= 6.5V 1.35 1.55 V (max)
∆V
OL
Video ∆Black Level Output
Voltage
Between Any Two Amplifiers
±
50
±
200 mV (max)
V
OH
Video Output High Voltage V
11
<
1.2V 5.0 4.6 V (min)
I
10, 12, 14, 17
Contrast/Drive Control Input
Current
V
Contrast=VDrive
=0Vto4V
−0.25 −1.5 µA (max)
I
1l, 19l, 20l
OSD Low Input Current (each) V
OSD in
= 0V −2.5 −10.0 µA(max)
I
1h, 19h, 20h
OSD High Input Current (each) V
OSD in
= 5V 100 130 µA(max)
V
OL
(Blank) Video Output during Blanking V11= 1.7V 0.1 0.5 V (max)
AC Electical Characteristics
TA= 25˚C; V
CC1=VCC2
= 8V. Manually adjust Video Output pins 13, 15, and 18 to 4V DC for the AC test unless otherwise
stated. (Note 15)
Symbol Parameter Conditions
Typical
(Note 5)
Limit
(Note 6)
Units
A
Vmax
Video Amplifier Gain V10= 4V, VIN= 635 mV
PP
6.8 5.9 V/V (min)
V
drive
= 4V 16.7 15.4 dB (min)
∆A
V2V
Contrast Attenuation@2V Ref: AVmax, V10=2V −6 dB
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AC Electical Characteristics (Continued)
TA= 25˚C; V
CC1=VCC2
= 8V. Manually adjust Video Output pins 13, 15, and 18 to 4V DC for the AC test unless otherwise
stated. (Note 15)
Symbol Parameter Conditions
Typical
(Note 5)
Limit
(Note 6)
Units
∆A
V 0.25V
Contrast Attenuation@0V Ref: AVmax, V10= 0V −35 dB
∆Drive Drive Control Range V
drive
=0Vto4V,V10=4V 12 dB
A
V match
Absolute Gain Match@AVmax V10= 4V, V
drive
= 4V (Note 9)
±
0.3 dB
A
V track
Gain Change Between Amplifiers V10= 4V to 2V (Notes 9, 10)
±
0.3 dB
f(−3 dB) Video Amplifier Bandwidth V
10
= 4V, V
drive
= 4V,
110 MHz
(Notes 11, 12)) V
O
= 3.5 V
P-P
tr(Video) Video Output Rise Time VO= 3.5 V
P-P
(Note 11) 3.6 ns
t
f
(Video) Video Output Fall Time VO= 3.5 V
P-P
(Note 11) 3.2 ns
V
sep
10 kHz Video Amplifier 10 kHz Isolation V10= 4V (Note 13) −70 dB
V
sep
10 MHz Video Amplifier 10 MHz Isolation V10= 4V (Notes 11, 13) −50 dB
∆V
OL
(OSD) OSD Black Level, Difference from
Video Black Level
V
OSD in
= 0.8V, OSD Mode
−0.4 −0.7 V (max)
V
OH
(OSD) OSD Output High Voltage (above
measured video black level)
V
OSD in
= 2.5V, OSD Mode
2.1 2.4 V (max)
t
r
(OSD) Going into OSD Mode OSD Mode (
Figure 2
) 5.0 ns
t
f
(OSD) Going out of OSD Mode OSD Mode (
Figure 2
) 10.0 ns
t
r-prop
(OSD) Starting OSD Propagation Delay Switching to OSD Mode (
Figure 3
) 13.0 ns
t
f-prop
(OSD) Ending OSD Propagation Delay Switching to Vid. Mode (
Figure 3
) 14.0 ns
T
pw
(Clamp) Input Clamp Pulse Width (Part of
Sandcastle Sync)
(Note 14)
200 ns (min)
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2: Operating Ratings indicate conditionsfor which the device is functional, butdo not guarantee specific performance limits. Forguaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 3: V
CC
supply pins 2 and 16 must be externally wired together to prevent internal damage during VCCpower on/off cycles.
Note 4: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 5: Typical specifications are specified at +25˚C and represent the most likely parametric norm.
Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 7: The supply current specified is the current for V
CC1
and V
CC2
minus the current through RL(I
supply=ICC1+ICC2−IL
). The supply current for V
CC2
(pin 16)
does depend on the output load. With video output at 1V DC, the additional current through V
CC2
is 7.7 mA with RL= 390Ω.
Note 8: Output voltage is dependent on load resistor. Test circuit uses R
L
= 390Ω.
Note 9: Measure gain difference between any two amplifiers. V
IN
= 635 mVPP.
Note 10: ∆A
V
track is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three attenuators. It is the difference in
gain change between any two amplifiers with the contrast voltage (V
10
) at either 4V or 2V measured relative to an AVmax condition, V10= 4V. For example, at A
V
max the three amplifiers’ gains might be 17.1 dB, 16.9 dB, and 16.8 dB and change to 11.2 dB, 10.9 dB and 10.7 dB respectively for V10= 2V. This yields the measured typical
±
0.1 dB channel tracking.
Note 11: When measuring video amplifier bandwidth or pulse rise and fall times, a double sided full ground plane printed circuit board without socked is recommended. Video amplifier 10 MHz isolation test alsorequires this printed circuit board. The reason for a double sided full groundplane PCBis that large measurement
variations occur in single sided PCBs.
Note 12: Adjust input frequency from 10 MHz (A
V
max reference level) to the −3 dB corner frequency (f
−3 dB
).
Note 13: Measure output levels of the othertwo undriven amplifiers relative to the driven amplifier to determine channelseparation. Terminate the undriven amplifier
inputs to simulate generator loading. Repeat test at f
IN
= 10 MHz for V
sep
10 MHz.
Note 14: A minimum pulse width of 200 ns is guaranteed for a horizontal line of 15 kHz. This limit is guaranteed by design. If a lower line rate is used then a longer
clamp pulse may be required.
Note 15: During theAC test the 4V DC level is the center voltage of the AC output signal. For example, if the output is 4 V
PP
the signal will swing between 2V DC
and 6V DC.
Note 16: Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200 pF cap is charged to the specified voltage, then discharged directly into the
IC with no external series resistor (resistance of discharge path must be under 50Ω).
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Timing Diagrams
DS100091-2
FIGURE 2. OSD Rise and Fall Times
DS100091-3
FIGURE 3. OSD Propagation Delays
DS100091-4
FIGURE 4. Sandcastle Sync Pulse
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Test Circuits
DS100091-5
**Note: All video inputs
must
have a series 30Ω resistor for protection against EOS (Electrical Over Stress). If the OSD signals are external to the monitor, or
these signals are present any time when +8V is not fully powered up, then the OSD inputs also
require
a series 30Ω resistor.
FIGURE 5. LM1279 OSD Video Pre-amp Demonstration Board Schematic
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Pin Descriptions
Pin
No.
Pin
Name
Schematic Description
1 Red OSD Input
These are standard TTL inputs. An OSD
signal at any of the three pins will
automatically switch the pre-amp into the
OSD mode. 7 colors, including white, are
available.
19 Blue OSD Input
20 Green OSD Input
2V
CC1
Power supply pin (excluding output stage)
3 Red Video In
Video inputs. These inputs
must
be AC
Coupled with a minimum ofa1µFcap, 10
µF is preferred. A series resistor of about
33Ω must be used for ESD protection.
5 Green Video In
8 Blue Video In
4 Red Clamp Cap
The external clamp cap is charged and
discharged to the correction voltage
needed for DC restoration. 0.1 µF is the
recommended value.
7 Green Clamp Cap
9 Blue Clamp Cap
6 Ground Ground pin.
10 Contrast
Contrast control pin:
4V - no attenuation
0V - over 40 dB attenuation
Drive control pins:
4V - no attenuation
0V - 20 dB attenuation
12 Blue Drive
14 Green Drive
17 Red Drive
11 Sandcastle Input
The sandcastle input allows for blanking
only, or blanking with DC restoration.
Blanking requires a 2V input. Clamping
with blanking requires a 4V input.
13 Blue Video Out
Video output. For proper black level the
output must drive 390Ω impedance.
15 Green Video Out
18 Red Video Out
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Pin Descriptions (Continued)
Pin
No.
Pin
Name
Schematic Description
16 V
CC2
Power supply pin for the output stage.
There are no internal connections to V
CC1
.
ESD and Arc-Over Protection
The ESD cells of the LM1279 are improved over the ESD
cells used in typical video pre-amps. The monitor designer
must still use good PC board layout techniques when designing with the LM1279. The human body model ESD susceptibility of these parts is rated at 3 kV (Note 4). However,
many monitor manufacturers are now testing their monitors
to thelevel 4 of the IEC801-2 specification. This requiresthe
inputs to the monitor to survive an 8 kV discharge. If the
monitor designer expects to survive such levels he MUST
provide external ESDprotection to the video pre-amp inputs!
PC board layout is very important with LM1279 as with other
video pre-amps. The LM1279 provides excellent protection
against ESDand arc-over, butthe LM1279 is not asubstitute
for good PCB layout.
Figure 6
shows the recommended input protection for a
video pre-amp. The two diodes at the video pre-amp input
and after the 30Ω series resistor offers the best protection
against ESD. When this protection is combined with a good
PCB layout, the video pre-amp will easily survive the IEC
801-2 level 4 (8 kV ESD) testing commonly done by monitor
manufacturers. If the protection diodes are moved to the
video input side of the 30Ω resistor, then the ESD protection
will be less effective. There is also the risk of damaging the
diodes since there is no resistor for current limiting. In such
a design a heavier duty diode, such as the FDH400, should
be used. It is strongly recommended that the protection diodes be added as shownin
Figure 6
. The 1N4148 diode has
a maximum capacitance of 4 pF.This would have little affect
on the response of the video system due to the low impedance of the input video.
Many monitor designers prefer to use a single zener diode
instead of the recommended two diodes at the video preamp input. The required location of the zener diode is shown
in
Figure 6
. It is shown as a dashed line, indicating an alternative to the two diode solution. The zener diode does give
the savings of onecomponent, but now the protection is less
effective. To minimize capacitance, the zener diode needs to
have a zener voltage of 24V or higher. This is well above the
V
CC
voltage of the LM1279. The zener diode must be located at the video input for protection against a low voltage
surge. The 30Ωresistor is needed to limit the current of such
a voltage surge, protecting the video pre-amp. Protection
against ESD by using a zener diode is about as effective as
having the two diodes at the video input (same location as
the zener diode). A higher series resistor may be necessary
for protection against the zener voltage, but the higher resistor value will impair the performance of the LM1279; resulting in a lower bandwidth and a less stable black level. For
maximum reliabilitythe monitor designer should notconsider
the zener diode solution for ESD protection of the LM1279.
The ESD cells of the LM1279 also gives good tolerance
against arc-over. Once again the monitor designer must be
careful in his PCB layout for good arc-over protection. In the
video chain only the outputs of the CRT driver are directly
exposed to the voltages that may occur during arc-over. A
good PCB layout isthe best protection for the video pre-amp
against arc-over.The pre-amp vulnerability is mainlythrough
the ground traces on the PCB. For proper operation all
ground connections associated with the video pre-amp, including the grounds to the bypass capacitors, must have
short returns to the ground pins. A significant ground plane
should be used to connect all the pre-amp grounds.
Figure
16
, the demo board layout, is an excellent example on an effective ground plane, yet using only a single sided PCB layout. Here is a check list to make sure a PC board layout has
good grounding:
•
All associated grounds with the video pre-amp are connected together through a large ground plane.
•
CRT driver ground is connected to the video pre-amp
ground at one point.
•
CRTand arc protection grounds are connecteddirectly to
chassis, or the main ground. There is no arc-over current
flow from these grounds through the pre-amp or CRT
driver grounds.
If any one of the above suggestions are not followed, then
the LM1279 may become vulnerable to arc-over. Improper
grounding is by far the most common cause of a video preamp failure during arc-over.
Functional Description
Figure 1
on the front page shows the block diagram of the
LM1279 along with the pinout of the IC. Each channel receives a video input signal at its input amplifier (-A1). The
output of the input amplifier goes to the contrast attenuator
stage. Foreasy interfacing to 5V DACsall controls inputs, including the contrast control, use a 0V to 4V range. The contrast control has no attenuation with an input of 4V, and has
full attenuation (over −40 dB) with a 0V input.All three channels will accurately track the contrast control setting at pin
10. Each channel will have the same amount of attenuation
for a given input voltage typically to within
±
0.3 dB.All channels will track because the contrast control is the first stage
of attenuation and the internal control voltage generated
from the input voltage is common to all three channels.
The output of the contrast attenuator goes to the drive attenuator.This stage has a 12 dB control range. This stage is
used for color balance, so the adjustment range has been
limited to 12 dB for a more accurate color balance. Each
DS100091-12
FIGURE 6. Recommended Video Input ESD Protection
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Functional Description (Continued)
channel has its own independent control pin with the 0V to
4V control range. An input of 4V give no attenuation, and an
input of 0V gives the full 12 dB attenuation.
The output of thedrive attenuator stage goes to the inverting
input ofA2. Since this is the second inversion stage, the output of A2 will be the non-inverted video signal. Note that the
output ofgm1 goes to thenon-inverting input ofA2. Also note
that the output of A2 goes to the inverting input of gm1. This
is thefeedback for the clampcircuitry. Theoutput stage ofA2
is an exact duplicate of the video output through A3. If a
390Ω load impedance is used at the video output, then the
black level at the output stage will accuratelytrack the output
ofA2. The otherinput to gm1 isthe desired black leveloutput
of theLM1279. Since the LM1279has a fixed blacklevel output, the non-inverting inputs to gm1 in all three channels go
to a fixed 1.35V internal reference. This sets the black level
output to a nominal 1.35V. gm1 acts like a sample and hold
amplifier.Once the sandcastle syncexceeds 3.6V gm1 isactivated, driving the input ofA2 to a level where the video output will be 1.35V. For proper DC restoration it is important
that gm1 be activated only during the horizontal flyback time
when the video is at the black level. gm1 also charges the
clamp cap to the correct voltage to maintain a 1.35V black
level at the video output. When gm1 is turned off the voltage
stored on the clamp cap will maintain the correct black level
during the active video, thus restoring the DC level for a
1.35V black level.
The input ofA3 receives the outputfrom A2. The video chan-
nel of A3 is a duplication of the output stage to A2. As mentioned in the previous paragraph this is done so that the DC
restoration can be done at theA2 stage. A3also receives the
OSD input and a sandcastle input for blanking. By doing DC
restoration at the A2 stage, OSD or blanking can be activated at the output stage during the time DC restoration is
being done at A2. There is an interface circuit between the
sandcastle input and theA3 output stages. This interfacecircuit will activate the blanking if the sandcastle sync input is
between 1.7V and 6.0V. The blanking mode will force the
output down to a level of about 0.1V. This is a blacker-thanblack level and can be used for blanking at the cathodes of
the CRT.
Once the sandcastle exceeds 6.5V, then the output will no
longer be in the blanked mode, but DC restoration is still being done on the video signal.
The OSD signalgoes into a special interface circuit.The output of this circuit will drive the output of A3 to either an OSD
black level or to about 2.4V above the video black level
(OSD white level). The OSD black level is about 300 mV below the video black level. This guarantees that if the OSD
signal is notactivated for a particular channel, then itsoutput
will be slightly below the cutoff level. If an OSD input is received ina particular channel, then the video output will beat
the OSD white level. The OSD mode is automatically activated if there is only one OSD signal to any of the video
channels. This OSD control circuit will allow any color, except black, during the OSD mode. This also saves the need
for a special signal to switchinto the OSD mode. Remember
that at least one OSD input must be high to enable the OSD
mode, therefore black can’t be used in the OSD window.
Sandcastle Sync
This special sync signal is used to allow for a 20-pin OSD
video pre-amp with all the desiredcontrols. By using a sandcastle sync, both clamping and blanking can be activated
from the same pin.
Figure 4
shows the sandcastle sync signal. There are four possible modes of operation with the
Sandcastle pulse. These modes are:
1. Inactive Region
2. Blanking and no Clamping
3. Blanking and Clamping
4. Clamping and no Blanking
Figure 4
also shows the voltage levels where the LM1279
switches from one mode to the other mode. As an example
the LM1279 will switch from the inactive mode to the blanking and no clamping mode between 1.2V and 1.7V. For
proper operation the inactive input must be safely below the
1.2V level. The blanking with no clamping pulse must be
safely above 1.7V and below 2.8V. Blanking and clamping
must be between 3.6V and 5.8V. Clamping and no blanking
must be above 6.5V with the maximum voltage being limited
by V
CC
.
If the monitor designer desires to blank at the cathode, then
he would go into the blanking and no clamping mode for
most of the flyback period. During this period it is also necessary to do DC restoration. During this time the LM1279
should be operated in the blanking and clamping mode. In
this mode DC restoration is done without interfering with
blanking.
In some designs the horizontal phase shift capability of the
monitor is very large. In these designs the video can be
moved so the flyback period can be displayed during the active trace period for the video. Now the clamping could be
done during the normal video sweep time. During this period
clamping with blanking will give a black bar on the CRT
screen. This is not a normal operating mode of the monitor,
but the monitor designer still may prefer not to display this
black bar. Under this condition the clamp pulse must be
above 6.5V.
A simple two transistor sandcastle generator is covered in
separate application note. This circuit will generate all four
states for the sandcastle sync, including the clamp with no
blanking when the clamping function occurs during the period for active video. The switching timebetween the inactive
region and the clamp only region must be less than 30 ns if
complete elimination of any blanking pulse is required in an
application.
Applications of the LM1279
Two demonstration boards are available to evaluate the
LM1279. One board is the pre-amp demonstration board.
This board was used for testing and characterizing the
LM1279. The schematic for this board is shown in
Figure 5
and the printed circuit layout for this board is shown in
Figure
7
. The other board is a complete video channel neck board
that can be directly plugged into the CRT socket. The schematic for this boardis shown in
Figure 10
and the printed cir-
cuit layout is shown in
Figure 11
. The CRT driver used on
this board is the LM2407. Any of National’s monolithic CRT
drivers can be used in this board, but the LM2407 is considered the best match to the LM1279 based on cost and performance.
Some important notes on
Figure 5
. All three video inputs
have a 75Ω terminating resistor for a 75Ωvideo system. This
is the normal video impedance of the video from a computer
system. It is possible to also have a 50Ω system, then R1,
R3, and R5would be changed to 50Ω. R2, R4, and R6 are in
series with the video inputs of theLM1279. These three 30Ω
resistors are required to protect theIC from any sudden volt-
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Applications of the LM1279 (Continued)
age surges that may result during the power up and power
down modes, or when connecting the monitorto other equipment. The monitor designer must include these resistors in
his design for good monitor reliability. If additional protection
against ESD at the video inputs is necessary, then adding
clamp diodes on the IC side of the 30Ω resistors is recommended, one to V
CC1
and one to ground (see
Figure 6
).
Sometimes a designer maywant to increase the value of the
30Ω resistors at the video inputs, for additional ESD protection. Thisis not recommended with the LM1279.C5, C7, and
C9 are part of the DC restoration circuit. This circuit is depending on a total maximum circuit resistance of about
110Ω;30Ωinput series resistor plus 75Ω for the video termi-
nation resistor. Increasing the value of the 30Ω resistors will
exceed the 110Ωlimit. The excellent internal ESD protection
and the external clamp diodes (if needed) will provide excellent ESD protection.
The 30Ω resistors in series with the OSD inputs are also
necessary if the OSD signals are external to the monitor, or
if these signals are present any time when the +8V is not
fully powered up. Interfacing to the OSD inputs is quite easy
since thesignal processing necessary tomatch the OSD signals to the video levels is done internal by the LM1279.
There is also no need for an OSD window signal. Any time
there is a highTTL signal at any of the three OSD inputs, the
LM1279 will automatically switch to the OSD mode. A high
TTL OSD signal will give a high video output for that color.
The OSD level is fixed, typically 2.3V above the video black
level. This will give a fixed brightness to the OSD window,
but not at maximum video brightness which could be unpleasant to the user.
Figure 2
and
Figure 3
show the timing
diagrams of the OSD signals for the LM1279.
The recommended load impedance forthe LM1279 is 390Ω.
However, some changes in the load impedance can be
made. If the load impedance is reduced, the monitor designer mustconfirm that the part isstill operating in itsproper
die temperature range, never exceeding a die temperature
of 150˚C. When changing the load impedance, the black
level shift is shown in the chart below. The measured V
P-P
output with under 1%distortion is also listed.
Load V
P-P
Blk. Level Shift
430Ω 3.62V +15 mV
390Ω 3.62V 0 mV
330Ω 3.58V −25 mV
270Ω 3.51V −45 mV
When using a lower load impedance, the LM1279 does go
into hard clipping more quickly. This does reduce the headroom of the video output.
Board layout isalways critical in a high frequencyapplication
such as using the LM1279. Apoor layout canresult in ringing
of the video waveform after sudden transitions, or the part
could actually oscillate. A good ground plane and proper
routing of the +8V areimportant steps to a good PCB layout.
The LM1279 does require very good coupling between V
CC1
and V
CC2
(pins 2 and 16). This is clearly shown in
Figure 7
and
Figure 11
with the short and large trace between pins 2
and 16. Both demonstration boards offer the monitor designer an excellent example of good ground plane being
used withthe LM1279. These boardsare single sided, yetallow the LM1279 to operate at its peak performance. The
neck board also shows a good example of interfacing to a
CRT driver and to the CRT. The video signal path is kept as
short as possible between the LM1279 and the CRT driver,
and alsobetween the CRT driverand the CRT socket.Actual
performance of the LM1279 in the video pre-amp demonstration board is shown in
Figure 8
and
Figure 9
.
References
Ott, Henry W.
Noise Reduction Techniques in Electronic
Systems
, John Wiley & Sons, New York, 1976
Zahid Rahim, “Guide to CRT Video Design,” Application
Note 861, National Semiconductor Corp., Jan. 1993
www.national.com9
Page 10
Applications of the LM1279
DS100091-13
FIGURE 7. LM1279 OSD Video Pre-Åmp Demontration Board Layout
DS100091-16
FIGURE 8. LM1279 Rise Time
DS100091-17
FIGURE 9. LM1279 Fall Time
www.national.com 10
Page 11
Applications of the LM1279 (Continued)
DS100091-14
FIGURE 10. LM1279/LM2407 Demonstration Neck Board Schematic
www.national.com11
Page 12
Applications of the LM1279 (Continued)
DS100091-15
FIGURE 11. LM1279/LM2407 Demonstration Neck Board Layout
www.national.com 12
Page 13
13
Page 14
Physical Dimensions inches (millimeters) unless otherwise noted
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NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
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Order Number LM1279N
NS Package Number N20A
LM1279 110 MHz RGB Video Amplifier System with OSD
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