Datasheet LM1203N Datasheet (NSC)

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LM1203 RGB Video Amplifier System
LM1203 RGB Video Amplifier System
January 1996
General Description
The LM1203 is a wideband video amplifier system intended for high resolution RGB color monitor applications. In addi­tion to three matched video amplifiers, the LM1203 contains three gated differential input black level clamp comparators for brightness control and three matched attenuator circuits for contrast control. Each video amplifier contains a gain set or ‘‘Drive’’ node for setting maximum system gain (Av
e
to 10) as well as providing trim capability. The LM1203 also contains a voltage reference for the video inputs. For high resolution monochrome monitor applications see the LM1201 Video Amplifier System datasheet.
Block and Connection Diagram
Features
Y
Three wideband video amplifiers (70 MHz
Y
Inherently matched (g0.1 dB or 1.2%) attenuators for contrast control
Y
Three externally gated comparators for brightness con­trol
Y
Provisions for independent gain control (Drive) of each
4
video amplifier
Y
Video input voltage reference
Y
Low impedance output driver
@
b
3dB)
FIGURE 1
Order Number LM1203N
See NS Package Number NA28F
C
1996 National Semiconductor Corporation RRD-B30M56/Printed in U. S. A.
TL/H/9178
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Absolute Maximum Ratings
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
Supply Voltage, V
(Note 1) 13.5V
Voltage at Any Input Pin, V
Video Output Current, I16, 20 or 25 28 mA
Power Dissipation, P
(Above 25 Thermal Resistance, i Junction Temperature, T
Pins 1, 13, 23, 28
CC
IN
D
C) Derate Based on iJAand T
§
JA
J
t
V
CC
t
V
GND
IN
2.5W
J
50§C/W
150§C
Storage Temperature Range, T
STG
b
65§Ctoa150§C
Lead Temperature, (Soldering, 10 sec.) 265§C
ESD susceptibility 1 kV
Human body model: 100 pF discharged through a 1.5 kX
resistor
Operating Ratings (Note 9)
Temperature Range 0
Supply Voltage (VCC) 10.8VsV
Cto70§C
§
s
CC
13.2V
Electrical Characteristics See Test Circuit
DC Static Tests S17, 21, 26 Open; V12
e
6V; V14e0V; V15e2.0V unless otherwise stated
(Figure 2)
,T
A
e
25§C; V
Label Parameter Conditions Typ
e
e
V
CC2
12V
CC1
Tested Design Units
Limit (Note 2) Limit (Note 3) (Limits)
Is Supply Current VCC1 only 73 90.0 mA(max)
V11 Video Input Reference Voltage
2.4
2.2 V(min)
2.6 V(max)
lb Video Input Bias Current Any One Amplifier 5.0 20 mA(max)
V14 l Clamp Gate Low Input Voltage Clamp Comparators On 1.2 0.8 V(max)
V14 h Clamp Gate High Input Voltage Clamp Comparators Off 1.6 2.0 V(min)
I14 l Clamp Gate Low Input Current V14e0V
b
0.5
b
5.0 mA(max)
I14 h Clamp Gate High Input Current V14e12V 0.005 1 mA(max)
lclampaClamp Cap Charge Current V5, 8 or 10e0V 850 500 mA(min)
lclampbClamp Cap Discharge Current V5, 8 or 10e5V
b
850
b
500 mA(min)
Vol Video Output Low Voltage V5, 8 or 10e0V 0.9 1.25 V(max)
Voh Video Output High Voltage V5, 8 or 10e5V 8.9 8.2 V(min)
DVo(2V) Video Output Offset Voltage Between Any Two Amplifiers
e
2V
V15
DVo(4V) Video Output Offset Voltage Between Any Two Amplifiers
V15e4V
AC Dynamic Tests S17, 21, 26 Closed; V14
e
0V; V15e4V; unless otherwise stated
Symbol Parameter Conditions Typ
Av max Video Amplifier Gain V12e12V, V
e
560 mVp-p 6.0 4.5 V/V(min)
IN
DAv 5V Attenuation@5V Ref: Av max, V12e5V
DAv 2V Attenuation@2V Ref: Av max, V12e2V
Av match Absolute gain match@Av max V12e12V (Note 5)
DAv track1 Gain change between amplifiers V12e5V (Notes 5, 8)
DAv track2 Gain change between amplifiers V12e2V (Notes 5, 8)
THD Video Amplifier Distortion V12e3V, V
e
1 Vp-p 0.5 %
O
f(b3 dB) Video Amplifier Bandwidth V12e12V,
e
(Notes 4, 6) V
t
r
t
f
Output Rise Time (Note 4) V
Output Fall Time (Note 4) V
100 mV
O
e
O
e
O
rms
4 Vp-p 5 ns
4 Vp-p 7 ns
g
0.5
g
0.5
g
50 mV(max)
g
50 mV(max)
Tested Design Units
Limit (Note 2) Limit (Note 3) (Limits)
b
10 dB
b
40 dB
g
0.5 dB
g
0.1
g
0.3
g
0.5 dB(max)
g
0.7 dB(max)
70 MHz
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AC Dynamic Tests S17, 21, 26 Closed; V14
Symbol Parameter Conditions Typ
Vsep Video Amplifier 10 kHz Isolation V12e12V (Note 7) 10 kHz
Vsep Video Amplifier 10 MHz Isolation V12e12V (Notes 4, 7) 10 MHz
Note 1: VCCsupply pins 1, 13, 23, 28 must be externally wired together to prevent internal damage during VCCpower on/off cycles.
Note 2: These parameters are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not 100% production tested). These limits are not used to calculate outgoing quality levels.
Note 4: When measuring video amplifier bandwidth or pulse rise and fall times, a double sided full ground plane printed circuit board without socket is recommend-
ed. Video Amplifier 10 MHz isolation test also requires this printed circuit board.
Note 5: Measure gain difference between any two amplifiers. V
Note 6: Adjust input frequency from 10 kHz (Av
Note 7: Measure output levels of the other two undriven amplifiers relative to driven amplifier to determine channel separation. Terminate the undriven amplifier
inputs to simulate generator loading. Repeat test at f
Note 8: DAv track is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three attenuators. It is the difference in gain change between any two amplifiers with the Contrast Voltage V12 at either 5V or 2V measured relative to an Av max condition V12 Av max the three amplifiers gains might be 17.4 dB, 16.9 dB, and 16.4 dB and change to 7.3 dB, 6.9 dB, and 6.5 dB respectively for V12 measured typical
Note 9: Operating Ratings indicate conditions for which the device is functional. See Electrical Specifications for guaranteed performance limits.
g
0.1 dB channel tracking.
ref level) to theb3 dB corner frequency (fb3 dB).
max
e
10 MHz for Vsepe10 MHz.
IN
e
0V; V15e4V; unless otherwise stated (Continued)
Tested Design
Limit (Note 2) Limit (Note 3)
b
65 dB
b
46 dB
e
1 Vp-p.
IN
e
12V. For example, at
e
5V. This yields the
Units
*Peaking capacitors. See Frequency Response using various peaking cups graph on next page.
FIGURE 2. LM1203 Test Circuit
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Typical Performance Characteristics
Contrast vs Frequency
Frequency Response Using Various Peaking Caps
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Crosstalk vs Frequency
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Attenuation vs Contrast Voltage
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Pulse Response
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Rise & Fall Times
e
Vert.
e
Horiz.
– – GND
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1V/Div.
10 ns/Div.
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FIGURE 3. LM1203 Typical Application
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* 30X resistors are added to the input pins for protection against current surges coming through the 10 mF input capacitors. By increasing these resistors to well over 100X the rise and fall times of the LM1203 can be increased for EMI considerations.
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Applications Information
Figure 4
shows the block diagram of a typical analog RGB color monitor. The RGB monitor is used with CAD/CAM work stations, PC’s, arcade games and in a wide range of other applications that benefit from the use of color display terminals. The RGB color monitor characteristics may differ in such ways as sweep rates, screen size, CRT color trio spacing (dot pitch), or in video amplifier bandwidths but will still be generally configured as shown in horizontal and vertical sync signals may be required or they may be contained in the green video input signal. The video input signals are usually supplied by coax cable which is terminated in 75X at the monitor input and internally ac cou-
Figure 4
. Separate
pled to the video amplifiers. These input signals are approxi­mately 1 volt peak to peak in amplitude and at the input of the high voltage video section, approximately 6V peak to peak. At the cathode of the CRT the video signals can be as high as 60V peak to peak. One important requirement of the three video amplifiers is that they match and track each other over the contrast and brightness control range. The
Figure 4
GAIN AND DC CONTROL’’ describes the function of the LM1203 which contains the three matched video amplifiers, contrast control and brightness control.
block labeled ‘‘VIDEO AMPLIFICATION WITH
FIGURE 4. Typical RGB Color Monitor Block Diagram
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Circuit Description
Figure 5
is a block diagram of one of the video amplifiers along with the contrast and brightness controls. The con­trast control is a dc-operated attenuator which varies the ac gain of all three amplifiers simultaneously while not introduc­ing any signal distortions or tracking errors. The brightness control function requires a ‘‘sample and hold’’ circuit (black level clamp) which holds the dc bias of the video amplifiers and CRT cathodes constant during the black level reference portion of the video waveform. The clamp comparator, when gated on during this reference period, will charge or discharge the clamp capacitor until the plus input of the clamp comparator matches that of the minus input voltage which was set by the brightness control.
Figure 6
is a simplified schematic of one of the three video amplifiers along with the recommended external compo­nents. The IC pin numbers are circled with all external com­ponents shown outside of the dashed line. The video input is applied to pin 6 via the 10 mF coupling capacitor. DC bias
to the video input is through the 10 kX resistor which is connected to the 2.4V reference at pin 11. The low frequen­cy roll-off of the amplifier is set by these two components. Transistor Q1 buffers the video signal to the base of Q2. The Q2 collector current is then directed to the V ply directly or through the 1k load resistor depending upon the differential DC voltage at the bases of Q3 and Q4. The Q3 and Q4 differential base voltage is determined by the contrast control circuit which is described below. RF decou­pling capacitors are required at pins 2 and 3 to insure high frequency isolation between the three video amplifiers which share these common connections. The black level dc voltage at the collector of Q4 is maintained by Q5 and Q6 which are part of the black level clamp circuit also described below. The video signal appearing at the collector of Q4 is then buffered by Q7 and level shifted down by Z1 and Q8 to the base of Q9 which will then provide additional system gain.
CC
1 sup-
FIGURE 5. Block Diagram of LM1203 Video Amplifier with Contrast and Black Level Control
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Circuit Description (Continued)
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FIGURE 6. Simplified LM1203 Video Amplifier Section with Recommended External Components
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Circuit Description (Continued)
The ‘‘Drive’’ pin will allow the user to trim the Q9 gain of each amplifier to correct for differences in the CRT and high voltage cathode driver gain stages. A small capacitor (33 pF) at this pin will extend the high frequency gain of the video amplifier by compensating for some of the internal high frequency roll off. To use this capacitor and still provide variable gain adjustment, the 51X and series 100X pot should be used with the red and green drive pins. The 91X resistor used with the blue drive pin will set the system gain to approximately 6.2 and allow adjustment of the red and green gains to 6.2 plus or minus 25%. The video signal at the collector of Q9 is buffered and level shifted down by Q10 and Q11 to the base of the output emitter follower Q12. Between the emitter of Q12 and the video output pin is a 40X resistor which was included to prevent spurious oscilla­tions when driving capacitive loads. An external emitter re­sistor must be added between the video output pin and ground. The value of this resistor should not be less than 390X or package power limitations may be exceeded when worst case (high supply, max supply current, max temp) cal­culations are made. If negative going pulse slewing is a problem because of high capacitive loads ( efficient method of emitter pull down would be to connect a suitable resistor to a negative supply voltage. This has the effect of a current source pull down when the minus supply voltage is
b
12V and the emitter current is approximately
l
10 pF), a more
10 mA. The system gain will also increase slightly because less signal will be lost across the internal 40X resistor. Pre­cautions must be taken to prevent the video output pin from going below ground because IC substrate currents may cause erratic operation. The collector currents from the vid­eo output transistors are returned to the power supply at V
2 pin 23. When making power dissipation calculations
CC
note that the data sheet specifies only the V current at 12V. The IC power dissipation contribution of V
2 is dependent upon the video output emitter pull down
CC
load.
CC
1 supply
In applications that require video amplifier shut down be­cause of fault conditions detected by monitor protection cir­cuits, pin 11 and the wiper arms of the contrast and bright­ness controls can be grounded without harming the IC. This assumes some series resistance between the top of the control pots and V
Figure 7
shows the internal construction of the pin 11 2.4V
CC
.
reference circuit which is used to provide temperature and supply voltage tracking compensation for the video amplifier inputs. The value of the external DC biasing resistors should not be larger than 10 kX because minor differences in input bias currents to the individual video amplifiers may cause offsets in gain.
FIGURE 7. LM1203 Video Input Voltage Reference and Contrast Control Circuits
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Circuit Description (Continued)
Figure 7
also shows how the contrast control circuit is con-
figured. Resistors R23, 24, diodes D3, 4 and transistor Q13 are used to establish a low impedance zero TC half supply voltage reference at the base of Q14. The differential ampli­fier formed by Q15, 16 and feedback transistor Q17 along with resistors R27, 28 establish a diferential base voltage for Q3 and Q4 in tracting current from the collector of Q16, a new differential voltage is generated that reflects the change in the ratio of currents in Q15 and Q16. To provide voltage control of the Q16 current, resistor R29 is added between the Q16 collec­tor and pin 12. A capacitor should be added from pin 12 to ground to prevent noise from the contrast control pot from entering the IC.
Figure 8
clamp comparator sections of the LM1203. The clamp gate circuit consists of a PNP input buffer transistor (Q18), a PNP emitter coupled pair referenced on one side to 2.1V (Q19,
20) and an output switch (Q21). When the clamp gate input at pin 14 is high (
Figure 6
. When externally adding or sub-
is a simplified schematic of the clamp gate and
l
1.5V) the Q21 switch is on and shunts
the I1 850 mA current to ground. When pin 14 is low (
k
1.3V) the Q21 switch is off and the I1 850 mA current source is mirrored or ‘‘turned around’’ by reference diode D5 and Q26 to provide a 850 mA current source for the clamp compara­tor(s). The inputs to the comparator are similar to the clamp gate input except that an NPN emitter coupled pair is used to control the current which will charge or discharge the clamp capacitors at pins 5, 8, or 10. PNP transistors are used at the inputs because they offer a number of advan­tages over NPNs. PNPs will operate with base voltages at or near ground and will usually have a greater reverse emitter base breakdown voltage (BVebo). Because the differential input voltage to the clamp comparator during the video scan period could be greater than the BVebo of NPN transistors a resistor (R34) with a value one half that of R33 or R35 is connected between the bases of Q23 and Q27. This resis­tor will limit the maximum differential input to Q24, 25 to approximately 350 mV. The clamp comparator common mode range is from ground to approximately 9V and the maximum differential input voltage is V
and ground.
CC
FIGURE 8. Simplified Schematic of LM1203 Clamp Gate and Clamp Comparator Circuits
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Additional Applications of the LM1203
Figure 9
shows how the LM1203 can be set up as a video buffer which could be used in low cost video switcher appli­cations. Pin 14 is tied high to turn off the clamp compara­tors. The comparator input pins should be grounded as shown. Sync tip (black level if sync is not included) clamping is provided by diodes at the amplifier inputs. Note that the clamp cap pins are tied to the Pin 11 2.4V reference. This was done, along with the choice of 200X for the drive pin resistor, to establish an optimum DC output voltage. The
contrast control (Pin 12) will provide the necessary gain or attenuation required for channel balancing. Changing the contrast control setting will cause minor DC shifts at the amplifier output which will not be objectionable as the out­put is AC coupled to the load. The dual NPN/PNP emitter follower will provide a low impedance output drive to the AC coupled 75X output impedance setting resistor. The dual 500 mF capacitors will set the low frequency response to approximately 4 Hz.
FIGURE 9. RGB Video Buffer with Diode Sync Tip Clamps and 75X Cable Driver
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Additional Applications of the LM1203 (Continued)
When diode D4 at Pin 11 is switched to ground the input video signals will be DC shifted down and clamped at a voltage near ground (approximately 250 mV). This will dis­able the video amplifiers and force the output DC level low. The DC outputs from other similarly configured LM1203s could overide this lower DC level and provide the output signals to the 75 X cable drivers. In this case any additional LM1203s would share the same 390X output resistor. The maximum DC plus peak white output voltage should not be allowed to exceed 7V because the ‘‘off’’ amplifier output stage could suffer internal zener damage. See text for a description of the internal configuration of the vid­eo amplifier.
Figure 3
and
Figure 10
frequency amplifier with non gated DC feedback. Pin 14 is tied low to turn on the clamp comparators (feedback amplifi­ers). The inverting inputs (Pins 17, 21, 26) are connected to the amplifier outputs from a low pass filter. Additional low frequency filtering is provided by the clamp caps. The drive resistors can be made variable or fixed at values between 0 and 300X. Maximum output swings are achieved when the DC output is set to approximately 4V. The high frequency response will be dependent upon external peaking at the drive pins.
shows the configuration for a three channel high
FIGURE 10. Three Channel High Frequency Amplifier with Non-gated DC Feedback (Non-video Applications)
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FIGURE 11. LM1203/LM1881 Application Circuit for PC Board
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PC Board with Components
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Physical Dimensions inches (millimeters) unless otherwise noted Lit.
LM1203 RGB Video Amplifier System
28-Lead Molded Dual-In-Line Package (N)
Order Number LM1203N
NS Package Number NA28F
Ý
107315
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