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2Axis - 2g/6g LINEAR ACCELEROMETER
■ 3V TO 5.25V SINGLE SUPPLY OPERATION
■ THE SENSITIVITY IS ADJUSTED WITH A
TOTAL ACCURACY OF ±10%
■ THE OUTPUT VOLTAGE, OFFSET,
SENSITIVITY AND TEST VOLTAGE ARE
RATIOMETRIC TO THE SUPPLY VOLTAGE
■ DEVICE SENSITI VITY IS ON-CHI P FACTORY
TRIMMED
■ EMBEDDED SELF TEST
■ HIGH SHOCK SURVIVABILITY
DESCRIPTION
The LIS2L02AS is a dual-axis linear accelerometer
that includes a sensing element and an IC interface
able to take the information from the sensing el ement
and to provide an analog signal to the exter nal wor ld.
The sensing element, capable to detect the acceleration, is manufactured using a dedicated process
called THELMA (Thick Epi-Poly Layer for Microactuators and Accelerometers) developed by ST to produce inertial sensors and actuators in silicon.
The IC interface instead is manufactured using a
CMOS process that allow s high l evel o f integration to
design a dedicated circuit which is trimmed to better
match the sensing element characteristics.
The LIS2L02AS has a user s electable full scale of 2g,
6g and it is capable of measuring accelerations over
LIS2L02AS
INERTIAL SENSOR:
PRODUCT PREVIEW
SO-24
ORDERING NUMB ER: LIS2L 02AS
a maximum bandwidth of 4.0 KHz for both the X and
Y axis. The device bandwidth may be reduced by using external capacitances. A self-test capability allows the user to check the functioning of the system.
The LIS2L02AS is available in plastic SMD package
and it is specified over a temperature range extending from -40°C to +85°C.
The LIS2L02AS belongs to a family of products suitable for a variety of applications:
– Antitheft systems
– Inertial navigation
– Virtual reality input devices
– Vibration Monitoring, recording and com pen-
sation
– Appliance control
– Robotics
BLOCK DIAGRAM
S1X
S1Y
rot
S2Y
S2X
VOLTAGE & CURRENT
REFERENCE
December 2002
This is preliminary information on a new product now in development. Details are subject to change without notice.
MUX
TRIMMING CIRCUIT
TEST INTERFACE
AMPLIFIE R
DEMUX
CLOCK
&
PHASE GENERATOR
S/HCHARGE
S/H
&
Routx
Routy
Voutx
Vouty
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LIS2L02AS
PIN DESCRIPTION
N° Pin Function
1 to 6 NC Internally not connected
7 Reserved Leave unconnected or connect to ground
8 Reserved Leave unconnected or connect to Vdd
9 Reserved Connect to Vdd or ground
10-11 Reserved Leave unconnected or connect to Vdd
12 FS Full Scale selection (Logic 0: 2g Full-scale; Logic 1: 6g Full-scale)
13 NC Internally not connected
14 PD Power Down (Logic 0: normal mode; Logic 1: Power-Down mode)
15 Voutx Output Voltage
16 ST Self Test (Logic 0: normal mode; Logic 1: Self-test)
17 Vouty Output Voltage
18 Vdd Power supply
19 GND 0V supply
20 to 24 NC Internally not connected
PIN CONNECTION
(Top view)
X
13
Y
1
Reserved
DIRECTION OF THE
DETECTABLE
ACCELERATIONS
Reserved
Reserved
Reserved
Reserved
NC
NC
NC
NC
NC
NC
FS
NC
NC
NC
NC
NC
GND
Vdd
Vouty
ST
Voutx
PD
NC
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LIS2L02AS
ELECTRICAL CHARACTERISTCS
(Temperature range -40°C to +85°C)
Symbol Parameter Test Condition Min. Typ. Max. Unit
V
V
Supply voltage 3 5.25 V
dd
Supply current 1.0 mA
I
dd
Zero-g level T
off
amb
= 25°C
Vdd/2-10% Vdd/2 Vdd/2+10% V
ratiometric to Vdd
A
Acceleration range 0V on FS pin ±1.8 ±2.0 ±2.2 g
r
V
on FS pin ±±6.0 g
dd
Sensitivity ratiometric to
S
o
V
dd
T
= 25°C
amb
Full-scale = 2g
= 25°C
T
amb
Vdd/5–10% Vdd/5 Vdd/5+10% V/g
Vdd/15–10% Vdd/15 Vdd/15+10% V/g
Full-scale = 6g
N
Non Linearity Best fit straight line
L
±0.3 %
X, Y axis
Full-scale = 2g
Sensing Element Resonant
f
uc
X, Y axis 4.0 KHz
Frequency
a
Acceleration noise density Vdd = 5V
n
V
Self test output voltage
t
Ratiometric to V
dd
Full-scale = 2g
T
= 25°C
amb
@ 5V
100 mV
50
µg/
Hz
V
Self test input Logic 0 level 0 0.8 V
st
Logic 1 level 2.8 V
R
C
Output impedance 100 kΩ
out
Capacitive load drive 320 pF
load
dd
V
1 FUNCTIONALITY
1.1 Sensing element
The THELMA process is utilized to create a surface micro-machined accelerometer. The technology allows to
carry out suspended silicon structures which are attached to the substrate in a few points called anchors and
free to move on a plane parallel to the substrate itself. To be compatible with the traditional packaging techniques a cap is placed on top of the sensing element to avoid blocking the moving parts during the molding
phase.
The equivalent circui t for the sensing element is s hown in the below figure; when a l inear acc eleration is appl ied,
the proof mass displaces from its nominal pos ition, causi ng an imbalance in the capacitiv e half- bridge. This imbalance is measured using charge integration in response to a voltage pulse applied to the sense capacitor.
The nominal value of the capacitors, at steady state, is few pF and when an acceleration is applied the maximum
variation of the capacitive load is few tenth of pF.
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LIS2L02AS
Figure 1. Equivalent electrical circuit
C
ps1
C
pr
C
ps2
C
ps1
C
pr
C
ps2
R
s1
S1x
C
s1x
R
r
C
s2x
S2x
R
s2
R
s1
S1y
C
s1y
R
r
C
s2y
S2y
R
s2
rot
1.2 IC Interface
The complete signal processing uses a fully differential structure, while the final stage converts the differential
signal into a single-ended one to be compatible with the external world.
The first stage is a low-noise capacitive amplifier that implements a Correlated Double Sampling (CDS) at its
output to cancel the offset and the 1/f noise. The produced signal is then sent to two different S&Hs, one for
each channel, and made available to the outside.
The low noise input amplifier operates at 200 kHz while the two S&Hs operate at a sampling frequency of 66
kHz. This allows a large oversampling ratio, which leads to in-band noise reduction and to an accurate output
wavefor m .
All the analog par ameters (output offs et vol tage and sensitivity) are ratiometr ic to the v oltage supply . Increas ing
or decreasing the voltage supply, the sensitivity and the offset will increase or decrease linearly. The feature
provides the cancellation of the error related to the voltage supply along an analog to digital conversion chain.
1.3 Factory calibration
The IC interface is factory calibrated to provide to the final user a device ready to operate. The parameters which
are trimmed are: gain, offset, common mode and internal clock frequency.
The trimming values are stored inside the device by a poly-fuse structur e. Any time the device is turned on, the
memorized bits are downloaded into the registers to be employed during the normal operation. The poly-fuse
approach allows the final user to utilize the device without any need for further calibration
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LIS2L02AS
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.35 2.65 0.093 0.104
A1 0.10 0.30 0.004 0.012
B 0.33 0.51 0.013 0.200
C 0.23 0.32 0.009 0.013
(1)
15.20 15.6 0 0.598 0.614
D
E 7.40 7.60 0.291 0.299
e 1.27 0.050
H 10.0 10.65 0.394 0.4 19
h 0.25 0;75 0.010 0.030
L 0.40 1.27 0.016 0.050
k 0˚ (min.), 8˚ (max.)
ddd 0.10 0.004
(1) “ D” dimension does not incl u de mold flas h, prot usion s or ga t e
burrs. Mo ld f las h, p rotus ion s or g at e bur rs sh all not exce ed
0.15mm per side.
mm inch
OUTLINE AND
MECH AN ICAL DAT A
Weight: 0.60gr
SO24
0070769 C
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LIS2L02AS
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent r i ght s of STMi croelectr oni cs. Spec i fications mentioned i n this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics product s are not
authorized for use as cri tical comp onents in lif e support devi ces or systems without express written approva l of STMicroel ectronics.
The ST logo is a registered trademark of STMicroelectronics
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