
LH534B00
CMOS 4M (512K × 8) MROM
FEATURES
•• 524,288 w ords × 8 b it organ izatio n
•• Access time: 120 ns (MAX.)
•• Power consu mption :
Operating : 33 0 mW (MAX.)
Standby: 550 µW (MAX.)
•• Static operation
•• TTL compatib le I/O
•• Three-state outputs
•• Singl e +5 V po we r su ppl y
•• Packa ge:
40-pi n , 1 0 × 20 mm
2
TSOP (Type I)
DESCRIPTION
The LH534B00 is a 4M-bit mask-programmable ROM
organized as 524,288 × 8 bits. It is fabricate d using
silicon-gate CMOS process technology.
PIN CONNECTIONS
534B00-1
TOP VIEW
2
3
4
5
8
9
A
8
A
12
37
36
35
34
33
32
29
26
A
14
A
13
6
7
A
9
A
11
31
30
NC
A
10
D
6
D
4
NC
D
1
10
11
12
39
38
NC
NC
13
28
D
3
27
D
2
NC
NC
D
7
40-PIN TSOP (Type I)
14
15
16
17
18
19
20
23
25
24
22
21
OE
GND
CE
A
0
A
3
A
2
A
4
NC
A
6
A
5
A
7
A
1
GND
D
5
V
CC
D
0
40
1
A
15
A
16
A
17
V
CC
A
18
Figure 1. Pin Connections for TSOP P ackage
1

534B00-2
A
3
A
2
A
1
A
12
A
11
A
10
A
9
A
8
30
5
6
36
7
15
18
19
20
A
7
A
6
V
CC
A
4
32
33
34
25
35
D
0
MEMORY
MATRIX
(524,288 x 8)
SENSE AMPLIFIER
OUTPUT BUFFER
39
14
GND D
1D2D3D4D5D6D7
28
26
27
17
8
A
5
16
A
13
4
ADDRESS BUFFER
CE
A
0
21
ADDRESS DECODER
COLUMN SELECTOR
CE
BUFFER
OE
BUFFER
A
14
3
A
15
2
22
TIMING
GENERATOR
A
16
1
24
OE
A
17
40
A
18
13
31
23
Figure 2 . LH534 B00 Block Diagram
PIN DESCRIPTION
SIGNAL PI N N AM E
A0 – A
18
Addres s i npu t
D
0
– D
7
Data o utp ut
CE Chip e nab le inp ut
OE Output en abl e i npu t
SIGNAL PIN NAME
V
CC
Power sup ply (+5 V)
GND Ground
NC No con nec tio n
LH534B0 0 CMOS 4M MROM
2

TRUTH TABLE
CE OE DATA OUTP UT SUPPLY CURRENT
H X High-Z Standby
L
H High-Z Operating
L Output Operating
NOTE:
X = H or L, High-Z = High-impedance
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT
Suppl y v olt age
V
CC
–0.3 to +7.0 V
Input vol tage V
IN
–0.3 to VCC + 0.3 V
Output vo lta ge V
OUT
–0.3 to VCC + 0.3 V
Operat ing te mpe ratu re Topr –20 to +70
°C
Storag e t emp era ture
Tstg –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS (TA = –20°C to +70°C)
P AR AMETER SYMBOL MIN. TYP. MAX. UNIT
Supply voltage V
CC
4.5 5.0 5.5 V
DC CHARACTERISTICS (VCC = 5 V ±10%, TA = –20°C to +70°C)
PARAMETER SYMBOL CONDI TIONS MI N. MAX. UNIT NOTE
Input ‘Hi gh’ voltage V
IH
2.2 VCC + 0.3 V
Input ‘Lo w’ voltage V
IL
– 0.3 0.8 V
Output ‘H igh ’ vol tag e
V
OH
IOH = –4 00 µA 2.4 V
Output ‘L ow’ v olt age V
OL
IOL = 2. 0 m A 0.4 V
Input lea kag e c urr ent
| I
Ll
|
V
IN
= 0 V to V
CC
10 µA
Output le aka ge cur ren t | I
LO
|V
OUT
= 0 V to V
CC
10
µA
1
Operat ing cu rre nt
I
CC1
tRC = 120 ns
60 mA 2
I
CC2
tRC = 1 µs
50 mA 2
I
CC3
tRC = 120 ns 55 mA 3
I
CC4
tRC = 1 µs
45 mA 3
Standb y c urr ent
I
SB1
CE = V
IH
3 mA
I
SB2
CE = VCC – 0.2 V 100
µA
Input cap acitan ce C
IN f = 1 M Hz
T
A
= 25°C
10 pF
Output ca pac ita nce
C
OUT
10 pF
NOTES:
1. CE/OE = V
IH
2. VIN = VIH or VIL, CE = VIL, outputs open
3. V
IN
= ( VCC – 0.2 V) or 0.2 V, CE = 0.2 V, outputs open
CMOS 4M MROM LH534B00
3

AC CHARACTERISTICS (VCC = 5 V ±10%, TA = –20°C to +70°C)
PARAMETER SYMBOL MIN. MAX. UNIT NOTE
Read c yc le t ime t
RC
120 ns
Addres s a cc ess ti me t
AA
120 ns
Chip e nab le acc es s ti me t
ACE
120 ns
Output en abl e d ela y t ime t
OE
60 ns
Output ho ld time t
OH
0ns
CE to out put in Hig h-Z t
CHZ
60 ns 1
OE to out put in Hig h-Z t
OHZ
NOTE:
1. Th is is the time required for the outputs to become high-impedance.
AC TEST CONDITIONS
PA RAMETER RATING
Input vol tage ampl itude
0.4 to 2.6 V
Input rise/fall time 10 ns
Input/ out put ref ere nce le vel
1.5 V
Output load condition 1 TTL + 100 pF
CAUTION
To stabili ze the pow er suppl y, it is recommended that a high-frequency bypass capacitor be connected between
the VCC pin and the GND pin.
A0 - A
18
t
OHZ
t
CHZ
534B00-3
t
RC
CE
OE
t
OH
DATA VALID
NOTE: The output data becomes valid when the last
intervals, t
AA
, t
ACE
, or tOE, have concluded.
t
OE
t
ACE
t
AA
D0 - D
7
(NOTE)
(NOTE)
(NOTE)
Figure 3. Timing Diagram
LH534B0 0 CMOS 4M MROM
4

PACKAGE DIAGRAM
ORDERING INFORMATION
DIMENSIONS IN MM [INCHES]
MAXIMUM LIMIT
MINIMUM LIMIT
40TSOP (TSOP040-P-1020)
40TSOP
DETAIL
SEE DETAIL
1.19
[0.047]
MAX.
0 - 10°
0.22 [0.009]
0.02 [0.001]
1.10 [0.043]
0.90 [0.035]
0.49 [0.019]
0.39 [0.015]
0.49 [0.019]
0.39 [0.015]
0.125 [0.005]
10.20 [0.402]
9.80 [0.386]
0.50 [0.020]
TYP.
0.25 [0.010]
0.15 [0.006]
18.60 [0.732]
18.20 [0.717]
19.30 [0.760]
18.70 [0.736]
20.30 [0.799]
19.70 [0.776]
0.18 [0.007]
0.08 [0.003]
1
20 21
40
40-pin, 10 × 20 mm2 TSOP (Type I)
40-pin, 10 x 12 mm2 TSOP (Type I) (TSOP040-P-1020)
LH534B00
Device Type
T
Package
534B00-4
Example: LH534B00T (CMOS 4M (512K x 8) Mask-Programmable ROM, 40-pin, 10 x 12 mm2 TSOP (Type I))
CMOS 4M (512K x 8) Mask-Programmable ROM
CMOS 4M MROM LH534B00
5