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LH534A00
CMOS 4M (512K × 8) MROM
FEATURES
•• 524,288 w ords × 8 b it organ izatio n
•• Access time: 120 ns (MAX.)
•• Static operation
•• TTL compatib le I/O
•• Three-state outputs
•• Singl e +5 V po we r su ppl y
•• Powe r consu mption :
Operating : 357.5 mW (MAX.)
Standby: 550 µW (MAX.)
•• Package:
32-pi n , 8 × 20 mm
2
TSOP (Typ e I)
DESCRIPTION
The LH534A00 is a 4M-bit mask-programmable ROM
organized as 524,288 × 8 bits. It is fabricated using
silicon-gate CMOS process technology.
PIN CONNECTIONS
534A00-1
TOP VIEW
1
2
3
4
5
6
9
10A
16
NC
OE
28
27
26
25
24
23
20
17
A
14
A
17
7
8
A
18
V
CC
22
21
A
8
A
13
D
6
D
5
D
3
D
2
D
0
A
0
A
3
11
12
13
32
31
30
29 D
7
A
15
14
15
16
19 A
1
18 A
2
A
6
A
5
A
12
A
7
D
4
A
9
GND
32-PIN TSOP (Type I)
A
10
CE
A
11
A
4
D
1
Figure 1. Pin Connections for TSOP Package
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534A00-2
A
3
A
2
A
1
A
12
A
11
A
10
A
9
A
8
12
1
31
2
14
17
18
19
A
7
A
6
V
CC
A
4
26
27
28
21
29
D
0
MEMORY
MATRIX
(524,288 x 8)
SENSE AMPLIFIER
OUTPUT BUFFER
24
13
GND
D
1D2D3D4D5D6D7
25
22
23
16
3
A
5
15
A
13
4
ADDRESS BUFFER
CE
A
0
20
ADDRESS DECODER
COLUMN SELECTOR
CE
BUFFER
OE
BUFFER
A
14
5
A
15
11
30
TIMING
GENERATOR
A
16
10
32
OE
A
17
6
A
18
9
8
Figure 2 . LH534 A00 Block Diagram
PIN DESCRIPTION
SIGNAL PI N N AM E
A0 – A
18
Addres s i npu t
D
0
– D
7
Data o utp ut
CE Chip e nab le inp ut
SIGNAL PIN NAME
OE Output ena ble input
V
CC
Power sup ply (+5 V)
GND Ground
LH534A0 0 CMOS 4M MROM
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TRUTH TABLE
CE OE DATA OUTPU T SUPPLY CURRENT
H X High-Z Standby
L
H High-Z Operating
L Output Operating
NOTE:
X = H or L, High-Z = High-impedance
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT
Suppl y v olt age
V
CC
–0.3 to +7.0 V
Input vol tage V
IN
–0.3 to VCC + 0.3 V
Output vo lta ge V
OUT
–0.3 to VCC + 0.3 V
Operat ing te mpe ratu re Topr –20 to +70
°C
Storag e t emp era ture
Tstg –65 to +150 °C
RECOMMENDED OPERATING CON DITIONS (TA = –20°C to +70°C)
P AR AMETER SYMBOL MIN. TYP. MAX. UNIT
Supply voltage V
CC
4.5 5.0 5.5 V
DC CHARACTERISTICS (VCC = 5 V ±10%, TA = –20°C to +70°C)
PARAMETER SYMBOL CONDITIONS MIN. MAX. UNIT NOTE
Input ‘Hi gh’ voltage V
IH
2.2 VCC + 0.3 V
Input ‘Lo w’ voltage V
IL
– 0.3 0.8 V
Output ‘H igh ’ vol tag e
V
OH
IOH = –4 00 µA 2.4 V
Output ‘L ow’ v olt age V
OL
IOL = 2 .0 m A 0.4 V
Input lea kag e c urr ent
| I
Ll
|
V
IN
= 0 V to V
CC
10 µA
Output le aka ge cur ren t | I
LO
|V
OUT
= 0 V to V
CC
10
µA
1
Operat ing cu rre nt
I
CC1
tRC = 12 0 n s
65 mA 2
I
CC2
tRC = 1 µs
50 mA 2
I
CC3
tRC = 12 0 n s 60 mA 3
I
CC4
tRC = 1 µs
45 mA 3
Standb y c urr ent
I
SB1
CE = V
IH
3 mA
I
SB2
CE = VCC – 0.2 V 100
µA
Input cap acitan ce C
IN f = 1 MHz
T
A
= 25° C
10 pF
Output ca pac ita nce
C
OUT
10 pF
NOTES:
1. CE/OE = V
IH
2. VIN = VIH or VIL, CE = VIL, outputs open
3. V
IN
= ( VCC – 0.2 V) or 0.2 V, CE = 0.2 V, outputs open
CMOS 4M MROM LH534A00
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AC CHARACTERISTICS (VCC = 5 V ±10%, TA = –20°C to +70°C)
PA RAMETER SYMBOL MIN. MAX. UNIT NOTE
Read c yc le t ime t
RC
120 ns
Addres s a cc ess ti me t
AA
120 ns
Chip e nab le acc es s ti me t
ACE
120 ns
Output en abl e d ela y t ime t
OE
60 ns
Output ho ld time t
OH
0ns
CE to out put in Hig h-Z t
CHZ
60 ns 1
OE to out put in Hig h-Z t
OHZ
NOTE:
1. Th is is the time required for the outputs to become high-impedance.
AC TEST CONDITIONS
PA RAMETER RATING
Input vol tage ampl itude
0.4 to 2.6 V
Input rise/fall time 10 ns
Input/ out put ref ere nce le vel
1.5 V
Output load condition 1 TTL + 100 pF
CAUTION
To stabili ze the pow er suppl y, it is recommended that a high-frequency bypass capacitor be connected between
the VCC pin and the GND pin.
A0 - A
18
t
OHZ
t
CHZ
534A00-3
t
RC
CE
OE
t
OH
DATA VALID
t
OE
t
ACE
t
AA
D0 - D
7
(NOTE)
(NOTE)
(NOTE)
NOTE: The output data becomes valid when the last
intervals, t
AA
, t
ACE
, or tOE, have concluded.
Figure 3. Timing Diagram
LH534A0 0 CMOS 4M MROM
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PAGKAGE DIAGRAM
ORDERING INFORMATION
DIMENSIONS IN MM [INCHES]
MAXIMUM LIMIT
MINIMUM LIMIT
32TSOP (Type I) (TSOP032-P-0820)
20.30 [0.799]
19.70 [0.776]
18.60 [0.732]
18.20 [0.717]
19.00 [0.748]
8.20 [0.323]
7.80 [0.307]
0.15 [0.006]
0.20 [0.008]
0.00 [0.000]
1.20 [0.047] MAX.
0.20 [0.008]
0.10 [0.004]
0.30 [0.012]
0.10 [0.004]
0.50 [0.020]
TYP.
32
1
32TSOP
16
1.10 [0.043]
0.90 [0.035]
17
0.425 [0.017]
32-pin, 8 × 20 mm2 TSOP (Type I)
32-pin, 8 x 20 mm2 TSOP (Type I) (TSOP032-P-0820)
LH534A00
Device Type
T
Package
534A00-4
Example: LH534A00T (CMOS 4M (512K x 8) Mask-Programmable ROM, 32-pin, 8 x 20 mm2 TSOP (Type I))
CMOS 4M (512K x 8) Mask-Programmable ROM
CMOS 4M MROM LH534A00
5
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