Page 1
LH531000B-S
FEATURES
•• 131,072 words × 8 b it organ izatio n
•• Access time: 500 ns (MAX.)
•• Power consu mption :
Operating : 64 .8 mW (MAX.)
Standb y: 108 µW (MAX.)
•• Mask-programmable c ontrol pin:
Pin 20 =
CE/OE/OE
•• Static operation
•• Three-state outputs
•• Low pow er supp ly: 2.6 V to 3.6 V
•• Packa ge: 28-pi n, 450 -mil SOP
DESCRIPTION
The LH531000B-S is a mask-programmable ROM
organized as 131,072 × 8 b its. It is fabricated usi ng
silicon-gate CMOS process technology.
PIN CONNECTIONS
531000BS-1
TOP VIEW28-PIN SOP
1
2
3
4
7
8
A
2
A
5
26
25
24
23
22
21
18
15
A
7
A
6
5
6
A
3
A
4
20
19
A
15
A
12
GND
A
13
A
8
A
11
A
10
D
7
D
6
D
3
9
10
11
28
27
A
14
A
1
V
CC
12
17
D
5
16
D
4
D
1
D
2
A
0
D
0
A
9
CE/OE/OE
13
14
A
16
Figure 1. Pin Connections for DIP Package
CMOS 1M (128K × 8) 3 V-Drive MROM
1
Page 2
NOTE:
1. Active level of CE/OE/OE is mask-programmable.
531000BS-2
A
3
A
2
A
1
A
12
A
11
A
10
A
9
A
8
28
2
23
21
24
4
7
8
9
A
7
A
6
V
CC
A
4
16
17
18
11
19
D
0
MEMORY
MATRIX
(131,072 x 8)
SENSE AMPLIFIER
OUTPUT BUFFER
14
3
GND
D
1D2D3D4D5D6D7
15
12
13
6
25
A
5
5
A
13
26
ADDRESS BUFFER
A
0
10
ADDRESS DECODER
COLUMN SELECTOR
CE
BUFFER
A
14
27
A
15
1
20
TIMING
GENERATOR
A
16
22
CE/OE/OE
OE
BUFFER
Figure 2. LH531000B-S Block Diagram
PIN DESCRIPTI ON
SIGNAL PIN NAME NOTE
A0 – A
16
Addres s i npu t
D
0
– D
7
Data o utp ut
CE/OE/OE
Chip Enab le input or
Output En abl e i npu t
1
SIGNAL PIN NAME NOTE
V
CC
Power s up ply
(2.6 V to 3.6 V)
GND Ground
LH531000B -S CMOS 1M MROM
2
Page 3
TRUTH TABLE
CE OE/OE MODE SUPPLY CURRENT
H – High-Z Standby
L – Output Operating
– L/H High-Z
Operating
– H/L Output
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT
Suppl y v olt age V
CC
–0.3 to +7.0 V
Input vol tage V
IN
–0.3 to VCC + 0.3 V
Output vo lta ge V
OUT
–0.3 to VCC + 0.3 V
Operat ing te mpe ratu re
Topr 0 to +70 °C
Storag e t emp era ture Tstg –65 to +150
°C
RECOMMENDED OPERATING CON DITIONS (TA = 0°C to +70°C)
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
Suppl y v olt age V
CC
2.6 3.6 V
DC CHARACTERISTICS (VCC = 2.6 V to 3.6 V, TA = 0°C to +70°C)
PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT NOTE
Input ‘Lo w’ voltage V
IL
–0.3 0.4 V
Input ‘Hi gh’ voltage V
IH
0.8 × V
CC
VCC + 0.3 V
Output ‘L ow’ v olt age V
OL
IOL = 4 00 µA
0.4 V
Output ‘H igh ’ vol tag e V
OH
IOH = –100 µA 0.8 × V
CC
V
Input lea kag e c urr ent
| I
LI
|
V
IN
= 0 V to V
CC
10 µA
Output le aka ge cur ren t
| I
LO
|
V
OUT
= 0 V to V
CC
10 µA1
Operat ing cu rre nt I
CC
tRC = 50 0 n s 18 mA 2
Standb y c urr ent I
SB
CE = VCC – 0.2 V 30
µA
Input cap acitan ce C
IN f = 1 MHz
T
A
= 25° C
10 pF
Output ca pac ita nce C
OUT
10 pF
NOTE:
1. CE/OE = VIH, OE = V
IL
2. O utputs open
AC CHARACTERISTICS (V
CC
= 2.6 V to 3.6 V, TA = 0°C to +70°C)
PARAMETER SYMBOL MIN. MA X. UNIT NOTE
Read c yc le t ime t
RC
500 ns
Addres s a cc ess ti me t
AA
500 ns
Chip e nab le acc es s ti me t
ACE
500 ns
Output en abl e d ela y t ime t
OE
200 ns
Output ho ld time
t
OH
10 ns
CE to out put in Hig h-Z
t
CHZ
150
ns
1
OE to out put in Hig h-Z t
OHZ
ns
NOTE:
1. Th is is the time required for th e output to become high-impedance.
CMOS 1M MROM LH531000B -S
3
Page 4
AC TEST CON DITIONS
PARAMETER RATING
Input vol tage ampl itude
0.4 V to (0.8 × V
CC
) V
Input rise/fall time 10 ns
Input/ out put ref ere nce le vel 1.5 V
Output load condition 1TTL + 100 pF
CAUTION
To s tabiliz e the pow er suppl y, it is recommended that a high-frequency bypass capacitor be connected between
the VCC pin and the GND pin.
t
OE
t
AA
A0 - A
16
t
OHZ
t
CHZ
D0 - D
7
531000BS-3
t
RC
t
ACE
CE
OE
OE
t
OH
DATA VALID
(NOTE)
(NOTE)
NOTE: The output data becomes valid when the last
intervals, tAA, t
ACE
, or tOE, have concluded.
(NOTE)
Figure 3. Timin g Diagram
LH531000B-S CMOS 1M MROM
4
Page 5
PACKAGE DIAGRAM
DIMENSIONS IN MM [INCHES]
MAXIMUM LIMIT
MINIMUM LIMIT
28SOP (SOP028-P-0450)
12.40 [0.488]
11.60 [0.457]
8.80 [0.346]
8.40 [0.331]
10.60 [0.417]
18.20 [0.717]
17.80 [0.701]
0.15 [0.006]
1.025 [0.040]
0.20 [0.008]
0.00 [0.000]
1.025 [0.040]
2.40 [0.094]
2.00 [0.079]
0.20 [0.008]
0.10 [0.004]
0.50 [0.020]
0.30 [0.012]
1.27 [0.050]
TYP.
28 15
141
1.70 [0.067]
1.70 [0.067]
28SOP
28-pin, 450-mil SOP
28-pin, 450-mil SOP (SOP028-P-0450)
LH531000B
Device Type
N
Package
531000BS-4
Example: LH531000BN-S (CMOS 1M (128K x 8) Mask-Programmable ROM, Low-Voltage Operation,
28-pin, 450-mil SOP)
CMOS 1M (128K x 8) Mask-Programmable ROM
- S
Low-Voltage Operation
ORDERING INFORMATION
CMOS 1M MROM LH531000B -S
5
Loading...