Page 1
Ordering number : EN5835
N3098RM (OT) No. 5835-1/17
Overview
The LC75374E is an electronic volume and tone control
circuit that provides volume, balance, fader, bass and
treble, super bass, input switching, and input and output
level controls and requires a minimal number of external
components to implement these functions.
Functions
• Volume: 0dB to –79dB (in 1-dB steps) and –∞dB for a
total of 81 positions.
A balance function can be implemented by
controlling the left and right channels
independently.
• Fader: Allows either the rear or the front channel outputs
to be attenuated over 16 positions.
(0 to –20dB in 2dB steps, –20 to –25dB in a 5dB
step, –25 to –45dB in 10dB steps, –60dB, and
–∞dB for a total of 16 positions.)
• Bass and treble: NF-type tone control circuits are form–
ed using external CR circuits. The bass
and treble can be controlled from 0dB
to +11.9dB (in 1.7dB steps) for a total
of 15 positions.
• Input gain: The input signal can be amplified by 0dB to
+18.75dB (in 1.25dB steps).
• Output gain: The fader output can be set to one of three
settings: 0dB, +6.5dB, or +8.5dB.
• Input switching: Both the left and right channels can be
selected from one of four inputs.
• Super bass: This circuit provides peaking characteristics
(T type characteristics) and 11 position sett–
ings.
Features
• On-chip buffer amplifiers minimizes the number of
external components.
• Built-in reference voltage generator for the analog
ground.
• All controls can be set using the serial data input circuit
(CCB).
Package Dimensions
unit: mm
3148-QIP44MA
SANYO: QIP44MA
[LC75374E]
LC75374E
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Electronic Volume and Tone Control for Car Stereos
CMOS IC
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Page 2
No. 5835-2/17
LC75374E
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
DD
max V
DD
11 V
Maximum input voltage V
IN
max CL, DI, CE VSS– 0.3 to VDD+ 0.3 V
Allowable power dissipation Pd max When Ta ≤ 85°C and mounted on a printed circuit board 720 mW
Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –50 to +125 °C
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS= 0 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Supply voltage V
DDVDD
7.5 9.7 V
High-level input voltage V
IH
CL, DI, CE 4.0 V
DD
V
Low-level input voltage V
IL
CL, DI, CE V
SS
1.0 V
Input voltage amplitude V
IN
CL, DI, CE, LVRIN, RVRIN, L1 to L4, R1 to R4, LFIN,
V
SS
V
DD
Vp-p
RFIN, LSIN, RSIN
Input pulse width t
φ
W CL 1 µs
Setup time t
setup
CL, DI, CE 1 µs
Hold time t
hold
CL, DI, CE 1 µs
Operating frequency fopg CL 500 kHz
Allowable Operating Ranges at Ta = –40 to +85°C, VSS= 0 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
[Input Block]
Maximum input gain Gin max +18.75 dB
Step resolution Gstep +1.25 dB
Output load resistance R
L
10 kΩ
Output impedance R
O
LSEL0, RSEL0 : RL= 10 kΩ, f = 1 kHz, VIN= 1 Vrms 46 Ω
[Output Block]
Maximum output gain Gout max +8.5 dB
Output load resistance R
L
10 kΩ
Output impedance R
O
LFOUT, LROUT, RFOUT, RROUT : RL= 10 kΩ,
35 Ω
f = 1 kHz, V
IN
= 1 Vrms
[Volume Control Block]
Step resolution ATstep 1 dB
Step error ATerr
STEP = 0 dB to –20 dB –1 0 +1 dB
STEP = –20 dB to –50 dB –3 0 +3 dB
Output load resistance R
L
10 kΩ
Output impedance R
O
LTOUT, RTOUT : RL= 10 kΩ, f = 1 kHz, VIN= 1 Vrms 46 Ω
[Fader Volume Control Block]
STEP = 0 dB to –20 dB 2 dB
Step resolution ATstep STEP = –20 dB to –25 dB 5 dB
STEP = –25 dB to –45 dB 10 dB
Step error ATerr
STEP = 0 dB to –45 dB –2 0 +2 dB
STEP = –45 dB to –60 dB –3 0 +3 dB
Output load resistance R
L
10 kΩ
Output impedance R
O
LFOUT, LROUT, RFOUT, RROUT : RL= 10 kΩ,
46 Ω
f = 1 kHz, V
IN
= 1 Vrms
[Bass and Treble Control Block]
Bass control range Gbass Max. Boost/Cut ±8 ±11.9 ±13 dB
Treble control range Gtre Max. Boost/Cut ±8 ±11.9 ±13 dB
Output load resistance R
L
10 kΩ
Output impedance R
O
LTOUT, RTOUT : RL= 10 kΩ, f =1 kΩ, VIN= 1 Vrms 46 Ω
Electrical Characteristics at Ta = 25°C, VDD= 8 V, VSS= 0 V
Continued on next page.
Page 3
No. 5835-3/17
LC75374E
Continued from preceding page.
Pin Assignment
Parameter Symbol Conditions
Ratings
Unit
min typ max
[Super-Bass Block] (T type)
Control range Crange Max. Boost +20 dB
Step resolution ATstep +2.0 dB
Output load resistance R
L
10 kΩ
Output impedance R
O
LSB2, RSB2 : RL= 10 kΩ, f = 1 kHz, VIN= 1 Vrms 70 Ω
[Overall]
Total harmonic distortion THD V
IN
= 1 Vrms, f = 1 kHz, All controls flat overall 0.003 0.01 %
Crosstalk CT V
IN
= 1 Vrms, f = 1 kHz, All controls flat overall, Rg = 1 kΩ 80.5 dB
Output at maximum attenuation Vo min V
IN
= 1 Vrms, f = 1 kHz, Main volume setting: –∞ –80 dB
Output noise voltage
V
N
1 All controls flat overall, (IHF-A), Rg = 1 kΩ 8 µV
V
N
2 All controls flat overall, (DIN-AUDIO), Rg = 1 kΩ 10 µV
High-level input voltage I
IH
CL, DI, CE, VIN= 8 V 10 µA
Low-level input voltage I
IL
CL, DI, CE, VIN= 0 V –10 µA
Electrical Characteristics at Ta = 25°C, VDD= 8 V, VSS= 0 V
Page 4
Equivalent Circuit
No. 5835-4/17
LC75374E
Page 5
Control System Timing and Data Format
Applications must input the stipulated serial data to the CE, CL, and DI pins to control the LC75374E. The data consists
of a total of 52 bits, of which 8 bits are address and 44 bits are data.
Note: Bits D36 to D38 and bits D40 to D43 are IC test
data. Applications must set all these bits to 0.
No. 5835-5/17
LC75374E
Address code
Fader step control
Bass control
1dB step control
Fader rear/front
control
Input switching control
Input muting
control
Channel selection
Super bass/super treble control
Treble control
4dB step control
Input gain control
Output gain control
Rear
Front
Initial setting
Lch
Rch
Left and right at
the same time
Page 6
No. 5835-6/17
LC75374E
Pin Functions
Pin No. Pin Description Notes
• Supply voltage generator (0.525 × VDD) used for the analog ground. A
capacitor must be connected between Vref and V
SS
to remove power
supply ripple.
19 Vref
• Fader outputs. The front and rear outputs can be attenuated
independently.
20
21
14
13
LROUT
LFOUT
RROUT
RFOUT
• Fader inputs
• These inputs must be driven by low-impedance circuits.
22
12
LFIN
RFIN
• Left channel super bass compensation capacitor connection
• Left channel super bass output and compensation capacitor connection
• Right channel super bass compensation capacitor connection
• Right channel super bass output and compensation capacitor
connection
24
23
10
11
LSB1
LSB2
RSB1
RSB2
• Super bass input
• These inputs must be driven by low-impedance circuits.
22
7
LSIN
RSIN
• Tone control outputs
28
6
LTOUT
RTOUT
Continued on next page.
Page 7
No. 5835-7/17
LC75374E
Continued from preceding page.
Pin No. Pin Description Notes
• Tone control circuit bass and treble compensation capacitor
connections.
Connect the high band compensation capacitors between the pins T1
and T2.
Connect the low band compensation capacitors between the pins T2
and T3.
31
30
29
3
4
5
LT1
LT2
LT3
RT1
RT2
RT3
• 1dB volume control common connections
32
2
LCOM
RCOM
• 4dB volume control inputs
• These inputs must be driven by low-impedance circuits.
33
1
LVRIN
RVRIN
• Input selector outputs
34
44
LSEL0
RSEL0
• Signal inputs
38
37
36
35
40
41
42
43
L1
L2
L3
L4
R1
R2
R3
R4
• Power supply39
V
DD
• Ground15
V
SS
• Serial data and clock inputs used for transferring control data
16
17
CL
DI
• Chip enable input. Data is written into the internal latches and the
analog switches operate when this pin goes from high to low. Data
transfers are enabled when this pin is high.
18 CE
• Unused pins. These pins must be connected to VSS.
• Unused pins. These pins must be left open.
8, 26
9, 25
NC
Page 8
Input Block Equivalent Circuit
No. 5835-8/17
LC75374E
The right channel is identical.
Page 9
Main Volume Control Block Equivalent Circuit
No. 5835-9/17
LC75374E
Switch used for
initial settings
To the tone control block
The right channel is identical.
Switch used for
initial settings
Page 10
No. 5835-10/17
LC75374E
Tone Block Equivalent Circuit
From the main volume control block
The right channel is identical.
Page 11
No. 5835-11/17
LC75374E
Super Bass Block Equivalent Circuit
The right channel is identical.
Page 12
Sample external constant calculations for the super bass (T type) circuit when full boost is used
The external constants required when full boost is used with the super bass block (T type) are calculated as follows.
• Super bass (T type) equivalent circuit
Sample calculation
Assume:
R1 = 64.5 kΩ, and
G = 20.65 dB, and
f0 = 72.7 Hz.
• Calculation
(1) Center frequency
1
f0 = ————————————
2× π × R1 × R2 × C × C
(2) Gain
R1
G = 20log 1 + ———
2 × R2
(3) Q
C × C × R1 1
Q = ————— × ————————
2 × C R1 × R2 × C × C
• Determine R2
Determine R2 from formula (2).
64.5
R2 = ——————— ≈ 3.3 (kΩ)
2 × (10.78 – 1)
• Determine C
Determine C from formula (1).
1
C = ——————————————— ≈ 0.15 (µF)
R1 × R2 × (2 × π × f0) × (2 ×π × f0)
• Determine Q
Determine Q from formula (3).
Here, Q will be 2.21.
No. 5835-12/17
LC75374E
Fader Volume Control Block Equivalent Circuit
At the point that data corresponding to –∞ is transferred to the 1dB –step main volume control block, S1 and S2 will go to the open state. S3 and S4 will go to
the on state at the same time.
S2 and S3 will be on when FADER = 1.
S1 and S4 will be on when FADER = 0.
The right channel is identical.
Page 13
No. 5835-13/17
LC75374E
Sample Application Circuit
Usage Notes
• The internal analog switches are in undefined states when power is first applied. Applications must therefore use
external circuits to mute the output until control data has been transferred.
• When setting up the initial data after power is first applied, applications must first transfer a set of IC initialization data.
This initialization data consists of an address field of (10000001) and a data field of all zeros (D0 to D43 = 0).
Applications must only send the actual initial data after this initialization data has been sent.
• Applications must either cover the CL, DI, and CE lines with the ground pattern or use shielded cables for these lines to
prevent the high-frequency digital signals that are transmitted over these lines from entering the analog signal system.
Page 14
No. 5835-14/17
LC75374E
Main Volume Control Step Characteristics
Fader Volume Control Step Characteristics
Main volume attenuation — dB
Main volume attenuation — dB
Overall
Overall
Input Gain Control Step Characteristics
Output Gain Control Step Characteristics
Gain step output level — dB
Gain step output level — dB
Overall
Overall
Volume set level — dB
Volume set level — dB
Selector
+ gain
control
block
Main
volume
+ tone
control
block
Super
bass
block
Fader
volume
control
block
Selector
+ gain
control
block
Selector
+ gain
control
block
Selector
+ gain
control
block
Main
volume
+ tone
control
block
Main
volume
+ tone
control
block
Main
volume
+ tone
control
block
Super
bass
block
Super
bass
block
Super
bass
block
Fader
volume
control
block
Fader
volume
control
block
Fader
volume
control
block
Set level — dB Set level — dB
Page 15
No. 5835-15/17
LC75374E
Total Harmonic Distortion - Frequency Characteristics
Total Harmonic Distortion - Input Level Characteristics
Total Harmonic Distortion - Supply Voltage Characteristics (1)
Total Harmonic Distortion - Supply Voltage Characteristics (2)
Total harmonic distortion, THD
—
%
Total harmonic distortion, THD — %
Total harmonic distortion, THD — %
Total harmonic distortion, THD — %
Frequency, f — Hz
Input level, V
IN
— dBV
Supply voltage, V
DD
— V
Supply voltage, V
DD
— V
low-pass weighting
position
Selector
+ gain
control
block
Main
volume
+ tone
control
block
Main
volume
+ tone
control
block
Main
volume
+ tone
control
block
Super
bass
block
Super
bass
block
Super
bass
block
Fader
volume
control
block
Fader
volume
control
block
Fader
volume
control
block
Selector
+ gain
control
block
Selector
+ gain
control
block
Page 16
No. 5835-16/17
LC75374E
Total Harmonic Distortion – Main Volume Control Step Characteristics
Super Bass Characteristics
Bass Characteristics Treble Characteristics
Total harmonic distortion, THD — %
Output level — dB
Output level — dB
Output level — dB
Step — dB
Frequency, f — Hz
Frequency, f — Hz
Frequency, f — Hz
Overall
Overall
Selector
+ gain
control
block
Main
volume
+ tone
control
block
Super
bass
block
Fader
volume
control
block
Selector
+ gain
control
block
Main
volume
+ tone
control
block
Fader
volume
control
block
Selector
+ gain
control
block
Main
volume
+ tone
control
block
Super
bass
block
Fader
volume
control
block
Selector
+ gain
control
block
Main
volume
+ tone
control
block
Super
bass
block
Fader
volume
control
block
Page 17
PS No. 5835-17/17
LC75374E
This catalog provides information as of November, 1998. Specifications and information herein are
subject to change without notice.
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
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