The LB1820 is a three-phase brushless motor with a digital
speed control circuit built in.
The LB1820 is ideally suited for use in office automation
applications such as laser beam printers and drum motor
drivers.
Features
.
Three-phase brushless motor driver with digital speed control
function
.
30 V withstand voltage and 2.5 A output current
.
Current limiter built in
.
Low-voltage protection circuit built in
.
Thermal shutdown circuit built in
.
Hall amp with hysteresis
.
Start/stop pin built in
.
Crystal oscillator and divider built in
.
Digital speed control circuit built in
.
Lock detector built in
Specifications
Package Dimensions
unit : mm
3147-DIP28HS
[LB1820]
SANYO : DIP28HS
Absolute Maximum Ratings atTa=25°C
ParameterSymbolConditionsRatingsUnit
Maximum supply voltage 1V
Maximum supply voltage 2V
Output currentI
Allowable power dissipation 1Pd max 1Independent IC3W
Allowable power dissipation 2Pd max 2With arbitrarily large heat sink20W
Operating temperatureTopr–20 to +80
Storage temperatureTstg–55 to +150
CC
O
M
t % 100 ms2.5A
30V
30V
Allowable Operating Ranges atTa=25°C
ParameterSymbolConditionsRatingsUnit
Supply voltage range 1V
Supply voltage range 2V
Voltage regulator output currentI
Comparator output currentI
Lock detector output currentI
CC
M
VH
OSC
LD
9.5 to 28V
5to28V
0 to +20mA
0 to +30mA
0 to +20mA
C
°
C
°
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
43096HA(II)/3260TA, TS(GTPS) No.3302-1/7
Page 2
LB1820
Electrical Characteristics atTa=25°C, VCC=VM=24V
ParameterSymbol
Supply current 1I
Supply current 2I
Output saturation voltage
V
V
Output leak currentI
CC1
CC2
O (sat)
O(sat)
leak100µA
O
Stop mode35mA
1IO= 1 A2.13.0V
2IO= 2 A3.04.2V
Conditions
mintypmaxUnit
3350mA
Voltage regulator
Output voltageV
Voltage variation∆V
Load variation∆V
1OUT 3 → OUT 2HHL
2OUT 3 → OUT 1HLL
3OUT 2 → OUT 1HLH
4OUT 2 → OUT 3LLH
5OUT 1 → OUT 3LHH
6OUT 1 → OUT 2LHL
Input
IN1IN2IN3
Pin Assignment
Allowable power dissipation, Pd max – W
Top view
With arbitrarily large
heat sink
Without heat sink
Ambient temperature, Ta –°C
No.3302-3/7
Page 4
Internal Equivalent Circuit Block Diagram
LB1820
No.3302-4/7
Page 5
Pin Description
LB1820
Pin No.Pin NameFunctions
19, 20
17, 18
15, 16
6
8
10
2V
12V
11R
+
IN
+
IN
+
IN
OUT 1
OUT 2
OUT 3
1, IN–1
2, IN–2
3, IN–3
CC
M
f
OUT 1: Hall element input pins for Phase 1. ‘‘H’’ logic is the state when IN
OUT 2: Hall element input pins for Phase 2. ‘‘H’’ logic is the state when IN
OUT 3: Hall element input pins for Phase 3. ‘‘H’’ logic is the state when IN
Output pin 1.
Output pin 2.
Output pin 3.
Power supply for other than output blocks.
Power supply for output blocks.
Output current detection pin. Rfis connected across this pin and GND to detect the output current as
voltage.
14GNDGround for other than output blocks.
The lowest potential of output transistor is the voltage at R
f
pin.
3CRSets the oscillating frequency of the switching regulator.
1OSCOutputs duty-controlled pulses.
Open-collector output.
24INT
25INT
23D
OUT
Integrator output pin (speed control pin).
OUT
Varies the switching regulator output voltage.
Integrator input pin.
IN
Speed discriminator output pin.
Goes LOW when the specified speed is exceeded.
4CSuppresses ripples in the motor current during operation of current limiter 2.
22LDLock detection pin.
Goes HIGH when the motor rotation speed is within the locking range.
This IC uses a speed discrimination circuit to perform speed control. The rotation accuracy of the speed discrimination method
depends on the counter count. The counter count in this IC is 2046. On the FG1 cycle, a speed error signal with a resolution of
1/2046 is output from the D
The D
output shifts among three states: high, high impedance, and low:
OUT
High: Output S (acceleration signal)
High impedance: When neither output S nor output F is output
Low: Output F (deceleration signal)
The relationship between the FG frequency (f
f
FG=fOSC
÷ (ECL division ratio × count)
÷ (8 × 2046)
f
OSC
÷ 16368
f
OSC
PAM Drive System
This IC controls motor rotations by configuring an external switching regulator, and controlling the voltage (VM) of the regulator.
Select a switching regulator diode with a short reverse recovery time such as an FRD (First Recovery Diode). Because even a
smooth coil can become a noise source, attention must be paid to the arrangement of components on the board (especially
avoiding the effects of FG signal lines and integrated amplifiers).
Select a normal rectifier diode for the upper and lower motor drive pin section (OUT1 to 3).
pin (charge pump method).
OUT
FG
) and the quartz oscillation frequency (f
) can be calculated as follows:
OSC
Current Limiter Circuit
The current limiter circuit consists of two limiter circuits.
1 Limiter 1
Detection voltage V
1 = 0.5 V typ. Current is limited by putting the lower output transistor in the nonsaturated state and
Rf
then dropping the voltage applied to the motor.
2 Limiter 2
Detection voltage V
2 = 0.44 V typ. The VMvoltage is limited by limiting the OSC pin ‘‘on duty’’ ratio.
Rf
Normally, if an excessive load is put on the motor, limiter 1 operates first, and after a delay in the switching regulator, limiter 2
operates.
Sometimes, after startup, the ASO of the output transistor is very severe. In such a case, it is necessary to perform a soft start (in
which V
is increased gradually). When using soft starts, connect a capacitor between the pin (VM, 5 V, etc.) on which the
M
voltage is to be increased during startup and the C pin. If soft starts are not to be used, connect a capacitor between the C pin and
ground.
Speed Lock Range
The speed lock signal is output from the LD pin. The speed lock range is within ±3.13%; if the motor rotations fall within the
lock range the LD pin goes low (open collector output).
Start/stop Operation
The FG
−
pin also serves as the start/stop pin. When the FG
IN
or less, the stop state goes into effect. In the stopped state, in addition to the drive outputs being turned off, the FG
other regulator outputs are also turned off.
When it is necessary to drive the motor at high speed, improvement is possible by adding a resistor (of approximately 1 MΩ)
between FG
and VCC. (The time from when the transistor is turned off until FG
OUT
−
pin is connected to a transistor, etc., and the voltage is 0.5 V typ.
IN
−
goes to 0.5V is reduced.)
IN
+
, 5 V, and
IN
Initial Reset Operation
At startup, it is possible to apply an initial reset to the logic circuits by delaying the increase in voltage on FG
reset is not applied, the LD pin may go low from start until the FG pulse is input to the logic circuits (until output of
approximately 16 mVp-p is generated on FG
When an FG reset is applied, the capacitor between the FG
−
FG
). Caution is required, because if the FG amplifier input capacitor is too small and the feedback capacitor is too large, the
IN
OUT
).
+
and GND should be 4.7 µF or more (in order to delay the rise in
IN
reset time will be shorter. At start, a delay of about 5 µs or more from the rising edge of the 5 V regulator output until the FG
voltage goes to 1.2 V is desirable.
−
. If an initial
IN
No.3302-6/7
−
IN
Page 7
LB1820
PWM Frequency Setting
The PWM frequency is determined by the resistor and capacitor connected to the CR pin. When a resistor is connected to the
FG
pin, the PWM frequency can be roughly calculated by the following formula:
IN+
f
6 1 ÷ (1.2 × C × R)
PWM
The resistor must not be less than 30 kΩ. It is desirable for the PWM frequency to be about 15 kHz.
Quartz Oscillator
An oscillator, capacitor and resistor are to be connected to the quartz oscillator. When selecting the oscillator and the external
capacitor and resistor, always obtain approval from the manufacturer of the oscillator in order to avoid problems.
(Circuit with external quartz oscillator)
External constants (reference values)
Xtal (MHz)C1 (pF)C2 (pF)R (kΩ)
3 to 439820.82
4 to 539821.0
5 to 739471.5
7to1039272.0
However, use a crystal such that the base wave
impedance : 3fOimpedance=1:5ormore
f
O
When inputting external signals (of several MHz) to the quartz oscillator, connect external components as shown in the diagram
below.
5 V pin
=1to8MHz
f
IN
Input signal level High level voltage: 4.0 V min.
Low level voltage: 1.5 V max.
Ra=2kΩ,Rb=1kΩ(reference values)
Xtal pin
Input
No products described or contained herein areintendedforuse in surgical implants, life-support systems, aerospace equipment,
nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or
indirectly cause injury, death or property loss.
Anyone purchasing any products described or contained herein for an above-mentioned use shall:
1 Accept full responsibility and indemnify and defend SANYO ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors
and all their officers and employees, jointly and severally, against any and all claims and litigation and all damages, cost and
expenses associated with such use:
2 Not impose any responsibility for any fault or negligence which may be cited in any such claim or litigation on SANYO
ELECTRIC CO., LTD., its affiliates, subsidiaries and distributors or any of their officers and employees jointly or severally.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed for volume
production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use
or any infringements of intellectual property rights or other rights of third parties.
This catalog provides information as of April, 1996. Specifications and information herein are subject to change without notice.
No.3302-7/7
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