LOW CONSUMPTION IN STANDBY MODE
(<100µA AT ROM TEMP; < 150µA AT130°C)
TWOHALFBRIDGESFOR3ALOAD
(R
TWOHALFBRIDGESFOR0.5ALOAD
(R
HIGHSIDE DRIVER FOR 2.5ALOAD
(R
DIRECT CONTROLLED BYµC (MULTIPLEX
SYSTEM)
OUTPUTHIGH/LOW LEVELDIAGNOSTIC
OVERCURRENT SWITCH OFF AND DIAG-
NOSTIC
OVERTEMPERATUREDIAGNOSTICBE-
FORE SWITCH OFF
OPENLOAD DIAGNOSTIC
DESCRIPTION
The L9947 is a bus controlled power interface in-
=0.25Ω TYP;Tj=25°C)
DSON
=2.5Ω TYP;Tj=25°C)
DSON
=0.45Ω TYP; Tj=25°C)
DSON
L9947
Multiwatt 15
ORDERING NUMBER:
tended for automotive applications realized in
multipower BCD60II technology. Up to three DC
motors and one grounded resistive load can be
driven with its four half-bridge and one high-side
driverpower outputs. The microcomputer compatible bidirectional parallel bus allows several interfaces connected on the same bus (multiplex system). The full diagnosticinformation is available on
thebus.
L9947S
BLOCK DIAGRAM
April 1999
1/13
Page 2
L9947
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
S
I
S
V
CC
V
CSN,VR/WN
V
MODE
V
D0 -D3
I
OUT1 - OUT5
T
j
T
j-SD
T
j-HYS
PIN CONNECTION
DC Supply Voltage26V
Single Pulse t
< 400ms40V
max
Negative Supply Current-9A
Stabilized Supply Voltage-0.3 to 6VV
Digital Input Voltage-0.3 to VCC+0.3V
Digital Input/ Output Voltage-0.3 to VCC+0.3V
Output Current Powerinternal limited
Operating Junction Temperature-40 to 150
Thermal ShutdownJunction Temperaturemin 150
Thermal JunctionTemperature Hysteresis20K
Overcurrent Switch off Time50
Internal Oscillator Frequency250KHz
VS=8V; Tj= 125°C;
I
= ±0.5A
OUT
>10V; Tj =125°C;
V
S
I
=± 0.5A
OUT
VS=8V; Tj= 125°C;
I
= ±0.5A
OUT
> 10V; Tj=125°C;
V
S
I
=± 0.5A
OUT
VS=8V; Tj= 125°C;
I
= ±2.5A
OUT
> 10V; Tj=125°C;
V
S
I
=± 2.5A
OUT
VS=8V; Tj= 125°C;
I
= ±2.5A
OUT
>10V; Tj=125°C;
V
S
I
=± 2.5A
OUT
= -2A1.0Ω
OUT
> 10V; Tj=125°C;
V
S
I
= -2A
OUT
For the function of the short
0.672A
6Ω
3.95Ω
6Ω
3.95Ω
600mΩ
395mΩ
600mΩ
395mΩ
0.7Ω
circuit current limitation see the
functional description (pag....)
0.672A
412A
412A
=2.5V;(status 18)515mA
OUT1
=2.5V;(status 18)515mA
OUT2
=2.5V;(status 18)515mA
OUT3
=2.5V;(status 17)80500mA
OUT4
V
OUT4=VS
OUT5=VS
-2.5V;(status 16 or 18)-80-500mA
-2.5V;(status 18)-5-15mA
VS=13V; (status 11)
4.9
LOW
HIGH
HYSTERESIS
7.5
0.4 V
0.6 V
0.2 V
5.5
S
8.1
S
S
status 12 - 15130°C
steady state t >20ms125<T
JSD
°C
µ
V
V
V
s
4/13
Page 5
APPLICATIONCIRCUIT DIAGRAM
Fogure 1: RecommendedApplication Circuit.
L9947
FUNCTIONAL DESCRIPTION
The L9947 is a power interface circuit designed
for a multiplex system controlled by a parallel µC
bus. The bus consists of four bidirectional data
wires D0 - D3 and three control wires read/write
(R/WN), mode (MODE) and chip select (CSN).
The device needs two supply voltages. The first
voltage supplies the half bridges, high side driver
and its driving part. The second one is a 5V stabilizedsupply. The functionof thedevice in thetypical operating modes is described in the following
tables.
19_001111TTTTTClear
20 0 X X XXXX TTTTT Clear, Static CSN = 0 will
force clear status and
standby after 100µs
without respect of data
inputs
=0
Symbols:
1:
LogicHigh
0: Logic Low
T:Tristate
X:
Don’t care
6/13
AB: As before
_ Low pulse t < 100µs
SRC: Source
SNK: Sink
OT:
Overtemperature
OVC1: Overcurrent 1
OVC2:
Overcurrent 2
OVV: Overvoltage
OUTX:
- High if output voltage
was >0.6V
- Low if output voltage
was < 0.4V
during test
s
during test
s
Page 7
L9947
Figure 2:
SystemStartup Sequence
SYSTEM STARTUP
It is not mandatory that V
With the presence of the V
(figure2)
S is present before VCC.
CC
the internal logic
would be reseted and the system restarts under
control of the inputs. If CSN = 0 for more than
100µs after the presence of V
CC the standby
mode is activated.Standby is also activated when
the CSN and VCC would be high at the same
time. When CSN = 0 and V
CC goes up, the device
is not controlledby the bus. The outputs remain in
tristate but the currentconsumption is larger than
100µA. A high - low - signal at the CSN - wire is
mandatory to control the outputs. There is no undervoltage detection level for the supply voltage
VS implemented. The VCC should be supplied
from the same voltage supply as the driver of the
D0 -D3 pins (eg. µC).
7/13
Page 8
L9947
DATA TRANSFER AND OUTPUTS ACTIVATING(Figure 3)
The half bridges of OUT1, OUT2 and OUT3 can
be used with OUT4 to drive three bidirectional
motors in full bridge configuration as shown in
fig.1 Only one motor can be driven in the same
time. The µC writes the corresponding word
status 1 till 10 at the bus and latch it with a low
pulse in the L9947. So the motor is activated. To
stop the motor it is useful to insert a braking
phase (status 9). In the braking condition there
are all low side DMOS of the half bridges
switched-onin this case the flyback currents flows
throughthe low sideswitches instead of the intrinsic diodes of the half bridges. After that, the half
bridges could be switchedin tristate(T). The high
the half bridges are intristate status10.
The µC works always as master and the L9947
Power Interface as slave. That means: the µC
starts the communication between the Power Interface and itself with low transition at the CSN
line. CSN = 0, R/WN= 0 theL9947 reads the data
at the bus and executethe command as shown in
tables 1,3,4 (write mode). The high slope of the
CSN stores the last command and execute it further. All inputs are disabled if CSN= 1.
So the bus can be used for another device. With
CSN = 0 and R/WN = 1 the L9947 writes the
status of the diagnostic at the parallel bus until
CSN becomes high (table 2; statusµ+ 15) (read
mode). The power outputs maintain the same
statusas before.
side driver, OUT5 can be switched only when all
Figure 3: Signal sequencefor data transfer to switch M1 right, read theoutput status,brake the motor
and activate the standbymode.
8/13
Page 9
L9947
Bus Timing
The bus signal must be defined t
(figure4)
3
=1µs before
CSN goes low. It is allowed to changethe level of
R/WN during CSN = 0. Theother signalscould be
changed. To store a command it is mandatory to
9
fix the D0- D3and MODE signalst
=1µs before
the positive edge of CSN.
OVERCURRENT AT OUT1 - OUT5:
The output currents of OUT1 - OUT5 are internally limited. This is realizedin the followingway:
Figure 4:
Bus and Outputs Timing Diagram
When the output current reaches a certain level
(see pag...) the Gate - Source voltage will be
clamped to a lower level. The output current is
now limited and follows the output ID, UDS characteristic for this Gate - Source voltage. An internal timer starts when the output voltage drop
(Drain- Source)increases above 0.4V
S.
After 100µs typ. the output is switched OFF and
the corresponding overcurrent bit (OVC1 or
OVC2) will be set. The outputs can be activated
againwith the next input data word.
TIMING CHARACTERISTICS
SymbolParameterMin.Typ.Max.Unit
t
1
t
2
3Input Signals Before Negative Cdge of CSN1µs
t
t
4
t
5
t
6
t
7
8CSN = Low Duration (Pulse Length) for CLEAR of latched Data100µs
t
t
9
t1and t5are derived from the internal oscillator frequency
t
varies with the supply voltage VS, relatingto theoutput voltage slope limitation
7
(*) for t
1 > 100µs the latched data will be reseted due to CLEAR(status 20)
Width of CSN Low2090*µs
Width of CSN High10µs
Input Signals After Positive Edge of CSN1
Valid Diagnostic Data10
Valid Diagnostic Data10µs
Delay Time from Input to Power Output, VS = 13V300µs
Input Data BeforePositive Edge of CSN Which Should be Latched1
µ
µ
µ
s
s
s
9/13
Page 10
L9947
Diagnostic
(TABLE2; STATUS11 - 15):
The diagnosticdelivers the information of the output voltage status (high or low) at the outputs
OUT1 - OUT5,overcurrent,overvoltage shutdown
and over temperature. The output voltage detection is done by hysteresis comparators with
thresholds at 0.4VS and 0.6 VS. The overcurrent
(OVC) informationis latchedtill a newor repeated
write commandwas received. The OVC1 is set to
high with the overcurrent condition at any of the
half-bridge outputs. OVC2 error bit will be set with
the overcurrent condition at OUT5. The overvoltage (OVV) is high till the supply voltage V
S ex-
ceeds the overvoltage thresholdof 20V typ.
The overtemperature (OT) is high if the junction
temperature is less than typ. 30 Kevin below the
thermal shutdown junction temperature(T
JSD).
Detectionof Load Interruption
(TABLE 3):
The outputs OUT1 - OUT4 are connected by the
motors in the application. The output OUT4 can
be switched as current source or sink with typ.
140mA current capability (status 16 + 17). The
sum of current consumption is <1mA if the output
OUT4
current I
= 0 (status 17). The diagnostic of
the output voltage delivers the information if one
or more of the half bridges is shorted to V
S or
GND or the motor connections are interrupted. In
status 18 the outputs OUT1 - OUT3 are switched
as current sinks (typ. 10mA), OUt4 and OUt5 as
current sources (OUT4 140mA, OUT5 10mA).
With this current the influence of leakage currents
and oxidizedcontactsis eliminated.
Standby
(TABLE!;STATUS2):
The L9947 is set in standby mode with the positive edge of CSN when all other inputs are low.
All latched data will be cleared and the inputs and
outputs are in tristate.
The total current consumption is less than 100µA.
CSN=0 quits the standby. All latched data are
cleared.
Clear (TABLE 4: STATUS 20):
If the chip select is low for ore than T
CLR = 100µs,
the internal latched data will be cleared and the
outputs become tristate. Repetitive high low
edges activate the inputs again. Also a broken
CSN-wire activates this clear function due to the
internal pull down resistor at CSN input. After a
clear, the L9947 goes in standby and can be
wake up with a negativeedge of CSN.
ThermalShutdown:
When the junction temperature increases above
JSD the powerDMOS transistorsare switchedoff
T
until the junction temperature drops below the
value T
JSD-TJHYST
.
ClampCurrent of The Power Outputs:
For output voltages 10V and larger a clamp cur-
rent of appr. 50µA will flow in the power outputs
due to the internal gate-source voltage limitation,
when the device is not in standby.
OvervoltageShutdown:
When the supply voltage VS exceedsthe overvol-
tage threshold V
SQVT, typ. 20V,the outputs OUT1
- OUT5 go in tristate condition. If the supply voltage goes under the overvoltage shutdown treshold, the status is the same as before the overvoltagecondition occurred.
Undervoltage
In the voltage range 2V <V
:
CC
< 4V the internal
logic is reseted and all outputs go in tristate. Also
ground spikes on the V
CC reset the logic. After
an internal reset of the logic, the L9947 is controlled again by the inputs.
Ground Interrupt
:
The L9947 is protected against interruption. The
output OUt5 switches off at ground interruption.
The outputs OUT1 - OUt4 are driven in full bridge
configuration as shown in the application. There
is no path through the load or direct to another
ground.Thus, the deviceprotected.
CC Interruption
V
If the supply voltage V
S is present and VCC is in-
terrupted or not supplied, than two cases can be
distinguished:
1 The data pins D0 - D3 are not driven by the
µC or they are low. So the outputs OUT1 OUT5 and D0 - D3 are in tristate.
2 One of the pins D0 - D3 is driven high the
µ
C. This pin supplies the VCC pin by the
drain-bulk-diode of the p-channel mos (fig.5).
Depending of the CSN, R/WN and MODE inputs some undesiderablefunctionscan occur.
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
1999 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUPOF COMPANIES
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