The L9925 is a dual full bridge driver for stepper
motor applications. Realized in BCD (Bipolar,
CMOS & DOS) techology, logic circuits, precise
linear blocks and power transistors are combined
to optimize circuit performance and minimize off
chip components.Schmitttriggers are used for all
input stages and are fully compatible with 5V
CMOS logic levels. When both enable signalsare
low, the IC is commanded to a low quiescentcurrent state and will draw less than 200µA from the
battery.
BLOCK DIAGRAM
OUT1VS1OUT2
CHARGE
PUMP
IN1
EN1
7VT1
1st FULLBRIDGE
EN1
T1T2T2
ORDERING NUMBER: L9925
The charge pump is integrated on chip; no external componentsare required. Full performanceis
maintaned for 9V <V
6V <<V
S <9V and 16V <VS <40V yields full func-
S <16V. Extended ranges of
tionally but with relaxed performance. Over temperature protectionand ESD protectionto all pins
ensures relability and reduces system integration
failures.
1PGND1Ground for DMOS sources in bridge 1
2IN1Digital Input from motor controller for bridge 1
3EN1Logic enable/disable for bridge 1 (active high)
4, 5NCNo connect
6OUT1Output of one half of bridge1
7, 8GNDGround
9OUT3Output of one half of bridge2
10, 11NCNo connect
12EN2Logic enable/disable for bridge 2 (active high)
13IN3Digital Input from motor controller for bridge 2
14PGND2Ground for DMOS sources in bridge 2
15NCNo connect
16IN4Digital Input from motor controller for bridge 2
17OUT4Output of one half of bridge 2
18, 19NCNo connect
20VS2Supply Voltage for bridge 2
21, 22GNDGround
23VS1Supply Voltage for bridge 1
24, 25NCNo connect
26OUT2Output of one half of bridge 1
27IN2Digital Input from motor controller for bridge 1
28NCNo connect
L9925
ELECTRICALCHARACTERISTICS (VS = 9 to 16V; Tj =-40 to 150°C
(3)
, unlessotherwise specified.)
SymbolParameterTest ConditionMin.Typ.Max.Unit
T
T
T
I
R
d-on
d-SB
d-off
t
rise
t
fall
IL
S
ds
Quiescent CurrentEN1 = EN2 =0V; Tj=85°C200
EN1 = EN2 =5V; I
= 0A512mA
load
Switch on ResistanceTj=25°C; VS= 14V; Io=300mA0.750.8
= 125°C; VS= 6V; Io=300mA1.51.9
T
j
Turn-on delaySee Fig 11050
Standby setting timeSee Fig 150200
Turn-off delaySee Fig 11050
Output rise time (10 to 90%)See Fig 10.5520
Output fall time (90to 10%)See Fig 10.5520
oOutput leakage currentEN = 0V;Vo =VS or GND-1010mA
INx, ENxLogic Input Lowvoltage-0.31.5V
Logic Input High voltage3.56V
Hysteresis0.51.02.0V
IbiasInput bias current-50300µA
The voltage referedto GND and currents are assumed positive, when the current flows into thepin.
(3) Tested up to 125°C, parameter guaranted by correlation up to150°C
With the bridge enabled, each input INx, maps directly to thecorrespondingoutput OUTx.
The output voltage will be equal to the difference
between the supply rail and the product of the
load current ad the on resistance of the output
switch.V
out =Vsupply -(RDS,ON ⋅ ILOAD).
Sourcedload currentsare positive.
IN1 OUT1 IN2 OUT2 IN3 OUT3 IN4 OUT4
00000000
1V
1VS1VS1VS
S
IN2
OUT1
OUT2
Tristate
Tristate
t
t
dSB
dON
50%
10%
t
dSB
t
r
t
r
t
dOFF
90%
t
f
t
dOFF
Figure 2. Typical RON - Characteristicsof Source
and Sink Stage
RON
(Ω)
2
1
-20 020 40 60 80 100 120 140 160 T(°C)
-40
V
V
D99AT426
VS
VS
=6V
=12V
t
dSB
t
f
Tristate
t
dON
Tristate
D99AT425
Tristate
Tristate
t
dSB
Figure3. ON - Resistance vs SupplyVoltage
RON
(Ω)
1.9
1.5
0.9
0.75
6
I
OUT1/2
=±0.3A
1216.5V
max for TJ≤125°C
typ. for T
=25°C
J
(V)
VS
D99AT427
4/9
Figure 4. ApplicationDiagram
L9925
CEN
100nF
D
0
+5V
D
0
I/O
µP
10KΩ
I/O
I/O
EN1
O
GND
O
EN2O
OOIN3
D
R
IN1
IN4
0
1D
1st FULL BRIDGE
2nd FULL BRIDGE
CB
100nF
CB40V
100µF
EN1
T1T2T2
T1 T2
2
40V
7VT1
CHARGE
PUMP
REGULATOR
CEN
100nF
OUT1VS1 OUT2
TEMP
5V
R
0
10KΩ
EN1
EN2
A
CHARGE
PUMP
STEPPER MOTOR
B
IN2
7V7V
EN1
PGND1
VS2
40V
OUT3
CEX
100nF
OUT4
CEX
PGND2
100nF
D99AT423
Figure 4 shows a typical application diagram for
DC motordriving. To assure the safety of the circuit in the reverse battery conditiona reverse protetion diode D
tection diode D
supply voltage V
V
BAT line will be limited to a value lower than the
absolute maximu ratings for V
B are used to lower VS-EMR and its values de-
C
1 is necessary. The transient pro-
2 must assure that themaximum
S during the transients at the
VSP. The capacities
pend on the driving load.
The resistance feedback loop realized by R
o lim-
ited to theµP power supply line by the diode D
allows open load detection. To protect the device
at the outputsagainst EMI or ESD> 2KV external
capacitorsC
ex maybe used.
CIRCUIT DESCRIPTION
L9925 is a dual full bridge IC designed to drive
DC motors, stepper motors and other inductive
loads. Eah bridge has 4 power DMOS transistor
with R
DSon = 0.75Ω and the relative protection
and control circuitry (see fig. 5). Tthe 4 half
bridges can be controlled independently by
means of the 4 inputs IN1, IN3, IN4 and 2 enable
inputs ENABLE1and ENABLE2.
The device guaranteesthe absenceof cross-conduction by watching internal gate-source voltage
of the driving power DMOS.
TRANSISTOR OPERATION
ON STATE
When one of POWER DMOS transistors is ON it
can be consideredas a resistor R
DS(ON) = 0.75
at a junctiontemperatureof 25°C
Ω
5/9
L9925
In this conditionthe dissipated power is ginen by:
P
ON =RDS(ON) ⋅ IDS
2
The low RDS(ON) of the Multipower BCD process
can provide high currents with low power dissipation.
OFF STATE
When one of the POWER DMOS transistor is
OFF the V
age and only the leakage currentI
DS voltage is equal to the supply volt-
DSSflows.
The power dissipation during this period is given
by:
P
OFF =VS ⋅IDSS
Figure 5a. Two phasechopping
EN
IN1
IN1 =
IN2 =
EN1 = H
H
L
D99AT429
IN2
TRANSITIONS
Like all MOS power transistors the DMOS
POWER transistors have an intrinsic diode between their source and drain that can operate as
a fast freewheeling diode in switched mode applications. During recirculation with the ENABLE input is low, the POWER MOS is OFF and the diode voltage it is clamped to its characteristics.
When the ENABLE input is low, the POWER
MOS is OFF and the diode carries all of the recirculationcurrent. The power dissipatedin the transitional times in the cycle depends upon the voltage and current waveformsin theapplication.
trans =IDS(t)⋅ VDS(t)
P
EN
IN1
IN1 =
IN2 =
EN1 = H
L
H
D99AT430
IN2
Figure 5b. Onephase chopping
EN
IN1
IN1 =
H
IN2 =
L
EN1 = H
Figure 5c. Enable chopping
EN
IN1
IN1 =
H
IN2 =
L
EN1 = H
D99AT431
D99AT433
EN
IN2
IN1
IN1 =
H
IN2 =
H
EN1 = H
EN
IN2
IN1
IN1 =
X
IN2 =
X
EN1 = L
D99AT432
D99AT434
IN2
IN2
6/9
L9925
THERMAL PROTECTION
A thermalprotectioncircuit has been included that
will disable the device if the junction temperature
reaches 150°C. When the temperature has fallen
to a safe level the device restarts under the control of the input and enable signals.
APPLICATIONINFORMATION
RECIRCULATION
During recirculationwith the ENALBE input high,
the voltage drop across the transistor is R
DS(ON).
for voltages less than 0.6V and is clamped at a
voltages depending on the characteristics of the
source-drain diode for greater voltages. Although
the deviceis protectedagainstcross conduction.
POWERDISSIPATION each bridge
In order to achieve the high performanceprovided
by the L9925 some attention must be paid t ensure that it has an adequate PCB area to dissipate the heat. The forst stage of any thermal design is to calculate the dissipated power in the
application, for this example the half step operation shown in Fig. 6 is considered.
RISE TIMET
R
When an arm of the half bridge is turned on current begins to flow in the inductive load until the
maximum current I
The dissipatedenergy E
OFF/ON =[RDS(ON)
E
L is reached after a time TR,
OFF/ON.
2
I
L
⋅
2
T
R]
⋅
⋅
3
Figure 6.
commutationE
transistorsare ON E
COM. As two of the POWER DMOS
ON isgiven by:
2
ON =IL
E
⋅RDS(ON) ⋅ 2 ⋅ TON
In the commutationthe energy dissipatedis:
CON =VS ⋅IL ⋅TCOM ⋅ fSWITCH ⋅ TON
E
Where:
T
COM =CommunicationTimeandit isassumedthat:;
T
COM =trise =tfall
T
SWITCH=Chopperfrequency
FALL TIME T
F
≤20µ
s
For this example it is assumed that the energy
dissipated in this part of the cycle takes the same
form as that shown for therise time:
OFF/ON =[RDS(ON) ⋅ IL
E
2
⋅ TF] ⋅
2
3
QUIESCENTENERGY
The last contribution of the energy dissipation is
due to the quiescrent supply current and is given
by:
E
QUIESCENT =IQUIESCENT ⋅ VS ⋅ T
TOTALENERGY PER CYCLE
TOT =(2 ⋅EOFF/ON +EON +ECOM) bridge1+
E
+(2 ⋅E
OFF/ON +EON +ECOM) bridg2 +EQUIESCENT
T
switch
I
L
ON TIME T
TRT
ON
ON
T
T
OFF
F
D99AT435
During this time the energy dissipated is due to
the ON resistance of the transistors E
ON and the
The total power dissipationPDIS issimply:
E
tot
=
P
DIS
=Rise time
T
R
T
=ON time
ON
T
= Fall time
F
T
= OFF time
OFF
T
T =Period
T=T
R+TON +TF +TOFF
7/9
L9925
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
A2.650.104
a10.10.30.0040.012
b0.350.490.0140.019
b10.230.320.0090.013
C0.50.020
c145° (typ.)
D17.718.10.6970.713
E1010.65 0.3940.419
e1.270.050
e316.510.65
F7.47.60.2910.299
L0.41.270.0160.050
S8°(max.)
mminch
OUTLINE AND
MECHANICAL DATA
SO28
8/9
L9925
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