OPTIMIZED EMI BEHAVIOUR DUE TO LIMITED
AND SYMM ETRIC SLOPES OF CAN SIGNALS
■ AUTOMATIC SWITCHING TO SINGLE WIRE
MODE UPON BUS FAILURES
■ TWO-EDGE SENSITIVE WAKE-UP PIN
■ SUPPORTS TRANSMISS ION WITH G ROUND
SHIFT VOLTAGES:
SINGLE WIRE: 1.5V
DIFFERENTIAL WIRE: 3v
■ AN UNPOWERED NODE OR UNSUFFICIENT
µA) AND SLEEP MOD E (37 µ A)
L9669
SO14
ORDERING NUMBER: L9669
SUPPLIES DO NOT DISTURB THE BUS
LINES
DESCRIPTION
The L9669 is an integrated circuit which contains a
CAN physical line interface. It integrates all main local functions for automotive body electronic applications connected to a CAN bus.
Figure 1. Block Diagram
KL30
(+12V)
5Vint
75k
7
WAKE
VCC
12.5k
2
TXD
5
NSTB
6
EN
99AT0001
Wake-up
Control
Low
Power
Control
100k100k
INHVS
141
TXD
Control
Receiver
Error
Management
& Diagnosis
Voltage
Regulator
13
GND
CANH
Driver
CANH
Driver
+5V
VCC
10
Filter
CANH T ermination
CANL T ermination
CANH
11
12
CANL
R
RTH
3
RXD
8
RTH
9
RTL
4
NERR
R
RTL
CAN
BUSLINE
July 2003
1/13
Page 2
L9669
Figure 2. Pin Connection top view.
INH
TXD
RXD
NERR
NSTB
EN
WAKE
99AT0002
1
2
3
4
5
6
7
Table 1. Pin Functions
N°PinFunction
1INH
2TXD
3RXD
4NERR
5NSTB
Inhibit Output
Transmit Data Input
Receive Data Output
Error/Diagnostic Output
Not Standby Input
- for switching external 5V Regulator
- active LOW dominant Bit transmission
- active LOW dominant Bit reception
- Digital control signal for low power modes
- active LOW error/Wake-up and Diagnostic output
14
13
12
11
10
VS
GND
CANL
CANH
VCC
9
RTL
8
RTH
6EN
7WAKE
8RTH
9RTL
10VCC
11CANH
12CANL
13GNDGround
14VS
Enable Input/Diagnostic Clock
Digital control signal for low power modes/Diagnostic clock
Wake-Up Input
switching INH to VS
Termination Resistor for CANH
Termination Resistor for CANL
Supply Voltage Input
High Voltage Bus Line
Low Voltage Bus Line
Battery Voltage Input
- If level of V
- +5V
- High: dominant state
- Low: dominant state
- +12V
-
changes the device initiates a wake-up from sleep mode by
WAKE
- controlled by internal error management
- controlled by internal error management
Table 2. Thermal Data
SymbolParameterValueUnit
R
thj-amb
Thermal resistance junction to ambient120°C/W
2/13
Page 3
Table 3. Absolute Maximum Ratings
For externally applied voltages or currents exceeding these limits damage of the circuit may occur!
SymbolParameterValueUnit
L9669
V
S-DC
V
S-P
V
CC
V
CANH,L-DC
V
V
WAKE
T
STG
T
Notes: 1. All pins of t he IC are pr otected aga inst ESD. T he verifica tion is perfor med accord ing to MIL 883C, hu man body mo del with
2. Voltage forced means voltage l i m i ted to spec i fied values while current is not l i m i ted. Current force d m eans voltage unlimi t ed but
DC operating battery voltage-0.3 to +28V
Pulse operating battery voltage (t<400ms)-0.3 to +40V
Supply voltage-0.3 to +6V
DC voltage CANH, CANL-28 to +40V
Voltage TXD, RXD, NERR, NSTB, EN-0.3 to VCC+0.3V
X
Voltage WAKE-0.3 to VS+0.3V
Storage temperature-55 to +150
Operating junction temperature-40 to +150
j
R = 1.5kΩ, C = 100pF and discharge vol t age ±2kV, corresponding to a m aximum discharge energy of 0.2mJ.
current li m i ted to specified value.
o
C
o
C
Table 4. Electrical Characteristcs
VCC= 4.75V to 5.25V, VS= 6V to 28V, Tj=-40°C to 150°C unless otherwise specified.
Edge count difference between
CANH and CANL for detection
Edge count difference between
CANH and CANL for recovery
Normal/RXonly mode.
Error 1, 2, 5 or 9.
Normal/RXonly mode.
Error 1, 2, 5 or 9.
3Edges
3Edges
Diagnostic timeout1580µs
minimum hold time
80µs
go to sleep
Page 7
L9669
1.FUNCTIONAL DESCRIPTION
The L9669 is a monolithic integrated circuit which provides all main functions for an automotive body CAN system. The device guarantees a clearly defined behavior in case of failure to avoid permanent CAN bus errors. It
is primarily intended for low speed applications in passenger cars.
1.1 Transceiver
– Supports double wire unshielded busses
– Baud rates up to 125 kBaud
– Single wire operation possible (automatic switching to single wire upon bus failures)
– Bus not loaded in case of unpowered transceiver
The CAN transceiver st age is able to t ransfer ser ial data on two independ ent communi cation w ires e ither differentially (normal operation) or in case of a single wire fault on the remaining line. The physical bitcoding is done
using dominant (transmitter active) and overwritable recessive states. Too long dominant phases are detected
internally and further transmission is automatically disabled (malfunction of protocol unit does not affect communication on the bus (“fail safe mechanism”)).
1.2 Modes of Operation
Five different functional modes exist to enable or establish the usage of low power or receive only operation.
NSTBENModeINHNERRRXDRTL
00standbyVS
00sleep
01“go to sleep”
floating
active LOW wake-up interrupt signal
(if VCC is present)
switched to VS
(typ. 13kΩ)
11normal
RXonly
VS
10
Power on
Note: Wake-up interrupts are released when entering RXonly or normal mode.
active LOW
error flag
active LOW
VS power-on
flag if VCC is
present
HIGH=recessi ve
LOW=dominant
received data
active LOW
wake-up interrupt
signal if VCC is
present
switched to VCC
switched to VS
The following state diagr am sh ows these modes and the po ssibl e state i nter actions depending on the input signals NSTB and EN.
7/13
Page 8
L9669
Figure 3.
NSTB = 1
EN = 0
NSTB = 0
EN = 0
Standby Mode
NSTBENINH
00VS
NSTB = 0
EN = 1
NSTB = 1
EN = 0
NSTB = 0
EN = 0
NSTB = 1
EN = 1
Power on
Mode
RX only
Mode
NSTBENINH
10
99AT0003
VS
NSTB = 0
EN = 1
"Go to Sleep" Mode
NSTBENINH
01Float.
NSTB = 0
EN = 0
Sleep Mode
NSTBENINH
00Float.
NSTB = 0
EN = 1
Normal Mode
NSTBENINH
11VS
Wake-up
8/13
Page 9
L9669
1.3 Error Mana g em e nt
Ten different errors on the physical buslines can be distinguished:
NType of Errors
Errors caused by damage of the datalines or isolation
1CANH wire interrupted (floating or tied to termination) 0 0
2CANL wire interrupted (floating or tied to termination) 0 0
3CANH short circuit to VS (overvoltage condition) 1 1
4CANL short circuit to GND (permanently dominant)20
5CANH short circuit to GND (permanently recessive)02
6CANL short circuit to VS (overvoltage condition)1 1
7CANL shorted to CANH22
Errors caused by misbehaviour of transceiver stage
8CANH short circuit to VCC (permanently dominant)20
9CANL short circuit to VCC (permanently recessive)02
Errors caused by defective protocol unit
10CANH, CANL driven dominant for more than 1.3 ms22
Not all of these errors leads to a breakdown of the whole communication. S o the errors can be categorized into
“negligible” (severity 0), “problematic” (severity 1) and “severe” (severity 2).
Severity
RXTX
Negligible Errors
Transmitter
Error 1, 2, 4 or 8:In all cases data still can be transmitted in differential mode.
Receiver
Error 1, 2, 5 or 9:In all cases data still can be received in differential mode.
Prob le m a t ic Erro rs
Transmitter
Error 3 or 6: Data are transmitted using the remaining dataline (single wire).
Receiver
Error 3 or 6: Data are received using the remaining dataline (single wire).
Severe Errors
Transmitter
Error 5 or 9: Data are transmitted using the remaining dataline after short circuit detection.
Error 7:Data are transmitted on CANH or CANL after overcurrent was detected.
Error 10: Transmission is terminated (fail safe).
Receiver
Error 7:Data are received on CANH or CANL after detection of permanent dominant state.
Error 4 or 8:Data are received on CANH or CANL after short circuit was detected.
Error 10:Data are received normally, error is detected by protocol unit.
Upon any e rror i n nor mal or RXonly mode th e NERR output w ill be forced LOW and rel eased af ter erro r recover y.
9/13
Page 10
L9669
1.4 Diagn osis
A serial interface i s avai lable to retriev e diagnosti c informatio ns. Di agnostic data can be reques ted by usi ng EN
as serial clock and evaluating NERR.
Figure 4.
NSTB
EN
t
Dmax
No Bus Errors
99AT0004
Bus Error
NERR
Mode
(Example)
detected
E1
or E5E2or E9
NormalRXonlyStandby
Delay between falling slope at EN and reaction at NERR: 0.7µs...3.0µs
(NERR is synchronized with internal clock).
E3E4
Diagnosis
Readout is initialized by a negative edge on EN and acknowledged by NERR entering HIGH state. Following
the next negative edge the first error status bit is displayed on NERR according to the data table below. If no
edge on EN is detected fo r a time longer tha n t
diagnosis is disabled and oper ation c ontinuous in the mode
Dmax
given by NSTB and EN with NERR showing bus errors or wake-up correspondingly. If the clock continues, the
readout sequence starts over again with the initial bit set HIGH.
The following errors are displayable (sequence listed in chronological order):
– error status bit 1 (LSB): HIGH if Error 1 or 5
– error status bit 2: HIGH if Error 2 or 9
– error status bit 3: HIGH if Error 3
– error status bit 4: HIGH if Error 4
– error status bit 5: HIGH if Error 6
– error status bit 6: HIGH if Error 8
– error status bit 7: HIGH if Error 10
– error status bit 8:HIGH if Thermal shutdown of Transceiver
1.5 Protections
A current limiting circuit protects the transmitter outputs against short-circuit to battery, ground and shorted
wires.
If the junction temperature exceeds a maximum value, the transmitter output stages are disabled.
10/13
Page 11
2.APPLICATION CIRCUIT DIAGRAM
Figure 5.
CAN
BUS
LINE
7
L9669
KL30 (+12V)
WAKE
99AT0005
RTH
8
R
RTH
CANH
11
CANL
12
R
RTL
RTL
9
CAN
Transceiver
13
GND
14
1
10
2
3
4
5
6
3.TEST CIRCUIT FOR DYNAMIC CHARACTERISTICS
Figure 6.
+5V
+14V
VS
INH
VCC
TXD
RXD
NERR
NSTB
EN
+5V
CAN
Controller
Voltage
Regulator
99AT0006
NSTB
EN
WAKE
TXD
NERR
5
6
7
2
4
20pF
INHVS
1410
1
3
RXDGND
13
VCC
12
11
9
8
RTL
CANL
CANH
RTH
R
1
R
1
C
1
C
2
C
1
11/13
Page 12
L9669
DIM.
MIN..TYP. MAX.. MIN.. TYP.. MAX..
A1.750.069
a10.10.250.0040.009
a21.60.063
b0.350.460.0140.018
b10.190.250.0070.010
C0.50.020
c145˚ (typ.)
D (1)8.558.750.3360.344
E5.86.20.2280.244
e1.270.050
e37.620.300
F (1)3.840.1500.157
G4.65.30.1810.209
L0.41.270.0160.050
M0 .680.027
S8˚
(1) D and F do not include mold flash or protrusions. Mold flash or
potrusions shall not exceed 0.15mm (.006inch).
mminch
(max.)
OUTLINE AND
MECHANICAL DATA
SO14
12/13
Page 13
L9669
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise unde r any patent or patent rights of STMicroelectroni cs. Specifications me nt i oned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics produ ct s are not
authorized for use as crit i cal component s in l i fe support dev i ces or systems without express written approval of STMic roelectronics.
The ST logo is a registered trademark of STMicroelectronics
2003 STMicroelectroni cs - All Rights Reserved
Austra lia - Brazil - Can ada - China - Finl and - France - Germ any - Hong Kong - India - Israel - I taly - Japan -Malaysia - Mal ta - Morocco -
Singap ore - Spain - Sweden - Switzerl and - United Ki ngdom - United S tates.
STMicroelectronics GROUP OF COMPANIES
http://www.s t. com
13/13
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