Page 1
KS7221D VERTICAL DRIVER FOR CCD
GENERAL DESCRIPTION
The KS7221D is a Vertical CCD Driver LSI which is
fabricated by CMOS process for high voltage
20-SSOP-225
FEATURES
⋅ Include voltage source circuit for CCD image sensor.
⋅ Input voltage : 5V / 3.3V
⋅ Package : 20 SSOP
BLOCK DIAGRAM
GND
2
XSUB
3
XV2
4
XV1
5
XSG1
6
XV3
7
XSG3
8
XV4
9
VCP
10
DCIN
ORDERING INFORMATION
Device Package Operating Temperature
KS7221D 20-SSOP-225
+
-
201
VHH
19
VSUB
18
VEE
17
V2
Φ
16
ΦV1
15
VME
14
ΦV3
13
ΦV4
12
VHH
11
DCOUT
-20°C ~ + 85°C
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KS7221D VERTICAL DRIVER FOR CCD
OUT
OPR
STG
PIN DESCRIPTION
Pin Symbol I/O Description Remark
1 GND - Ground control
2 Xsub I Output Control (Vsub)
3 XV2 I
4 XV1 I
5 XSG1 I
6 XV3 I
7 XSG3 I
8 XV4 I
9 VCP I Power of amp
10 DCIN I OP-Amp input (internal pull-down resistor)
11 DCOUT O OP-Amp output
12 VHH - Power (15V)
13
14
15 VME - Power (0V)
16
17
18 VEE - Power (-8.5V)
19 Vsub O High Voltage Output ( 2 level : VEE, VHH)
20 VHH - Power (15V)
ΦV4
ΦV3
ΦV1
ΦV2
ABSOLUTE MAXIMUM RATINGS ( Ta = 25°C )
Characteristics Symbol Value Unit
Supply Voltage VHH -0.3 ~ VEE +35
Input Voltage
Output Voltage
OP-Amp output Current I
Operating Temperature T
Storage Temperature T
Output Control (ΦV2)
Output Control (ΦV1)
Output Control (ΦV1)
Output Control (ΦV3)
Output Control (ΦV3)
Output Control (ΦV4)
O High Voltage Output (2 level :VME, VEE)
O High Voltage Output ( 3 level : VME, VEE, VHH)
O High Voltage Output (3 level : VME, VEE, VHH)
O High Voltage Output (2 level : VME, VEE)
VEE 0 ~ -10
VME VEE -0.3 ~ 3.0 V
VI -0.3 ~ VHH +0.3
ΦV1, ΦV2, ΦV3, ΦV4, ΦVsub
VCP -0.3 ~ VEE+35
VEE -0.3 ~ VHH +0.3
±5
-25 ~ +85
-45 ~ +120
mA
°C
LOGIC FUNCTION TABLE
INPUT OUTPUT
XV1,3 XSG1,3 XV2,4 XSUB
L L - - VHH - H L - - Z - L H - - VME - H H - - VEE - -
- - L - - VME -
- - H - - VEE -
- - - L - - VHH
- - - H - - VEE
ΦV1, 3 ΦV2, 4
VSUB
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KS7221D VERTICAL DRIVER FOR CCD
AC CHARACTERISTICS
( VHH = 15V, VME = GND, VEE = - 8.5V ; Ta = 25°C )
Description Symbol Test Condition Min Typ Max Unit
TPLM NO LOAD (*1) 10 40 70
DELAY TIME TPLH NO LOAD (*1) 10 40 100
RISING TIME TTML
OUTPUT NOISE
VOLTAGE
(*1) REFER TIMING DIAGRAM
(*2) REFER NOISE DIAGRAM
DC CHARACTERISTICS
( VHH = 15V, VME = GND, VEE = -8.5, VCP = 22V ; Ta = 25°C )
Description Symbol Test Conditon Min Typ Max Unit
Supply Voltage
Input Voltage VCP When VCP is used VHH 22 23.5 V
High level input voltage VIH (*3) 2.3 - Low level input voltage VIL (*3) - - 1.2
Input Current
Operation Current IME (*1) - 4.5 5.0
Output Current IOM2
Op-Amp Gain G
Gain Variation
Operation Current IVCP
TPMH NO LOAD (*1) 10 30 70
TPML NO LOAD (*1) 10 100 200
TPHM NO LOAD (*1) 10 100 180
TPHL NO LOAD (*1) 10 60 100
TTLM
TTMH
TTLH
TTHM
TTHL
VCLH, VCLL
VCMH, VCML
VHH 14.5 15 15.5
VEE -9.5 -8.5 -7.5
II VIN = 0~5V (*3) -1.0 0.0 1.0
IDCIN VDCIN = 1.0V 80 100 140
IHH (*1) - 2.0 3.5
IEE (*1) -8.5 -6.5 IOL
IOM1
IOH
IOSL VSUB = -8.0V 12 18 IOSH VSUB = 14.5V - -10.5 -7
∆G
VEE → VME (*1)
VME → VHH (*1)
VEE → VHH (*1)
VME → VEE (*1)
VHH → VME (*1)
VHH → VME (*1)
(*2) - - 0.5 V
ΦV1~4 = -8.0V
ΦV1~4 = -0.5V
ΦV1.3 = 0.5V
ΦV1.3 = 14.5V
IOUT = -200µA
Ta=-20 ~ 75°C (*2),
Iout=-200µAVDCIN = 1.0
~ 4.5V
VDCIN = 1.0 ~ 4.5V
IOUT = 0µA
25 37 -
- -15 -10 mA
9 13.5 -
- -18 -12
x 4.0 x 4.2 x 4.7
-3 - +3 %
0.08 - 1.0 mA
400 700 930 ns
400 650 930
10 50 100
200 300 500
400 600 820
10 50 100
µA
( * 1 ) : Refer the test cirect. Shutter speed : 1/100000 SEC
( * 2 ) : Refer the characteristics of OP - AMP
( * 3 ) : XV1 ~ 4, XSG1, XSG3, XSUB PIN
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KS7221D VERTICAL DRIVER FOR CCD
TIMING DIAGRAM
XV1 ~ 4
XSG1,3
Φ V1,3
Φ V2,4
XSUB
VSUB
5V
GND
5V
GND
VHH
VME
VEE
VME
VEE
5V
GND
VHH
VEE
50%
50% 50%
T
PMH
T
TMH
T
T
PLM
T
PLM
T
PLH
T
TLH
TLM
90%
10%
T
TLM
90%
10%
50% 50%
T
PHL
90%
10%
10% 10%
90%
10%
90%
T
PHM
T
THM
T
THL
50%
T
TML
T
PML
90%
10%
T
T
PHL
THL
90%
10%
NOISE DIAGRAM
VM
VL
VCMH
VCML
VCLH
VCLL
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KS7221D VERTICAL DRIVER FOR CCD
TEST CIRCUIT
500pF
VDD2(15V)
20 19 18 17 16 15 14 13 12 11
1 2 4 5 6 7 8 9 103
OP- AMP Gain Characteristics
25.0 ( V )
OUTPUT VOLTAGE
R2
C1
R1
VEE(-8.5V)
R1
C1
C2
C2
C2
C2
C1
KS7221D
Timing Generator
lout = 0uA
Ta = - 20 ~ 75¡£C°C
R1
C1
R1
0V
VDD1(15V)
VCC(22V)
R1 : 27 Ω
R2 : 5 Ω
C1 : 1500pF
C2 : 3300pF
(2.5 / div)
INPUT VOLTAGE
5.0 ( v )
(0.5 / div)
Page 6
KS7221D VERTICAL DRIVER FOR CCD
APPLICATION CIRCUIT
0.1µF
/ 35V
+
VHH ( 15V )
VEE ( - 8.5 )
0.1µF
/ 35V
+
1
GND
2
XSUB
T
I
M
I
N
G
G
E
N
E
R
A
T
O
R
* In case of DCOUT ≤ VHH - 1.0V , VCP PIN connects with VHH.
XV2
XV1
XSG1
XV3
XSG3
XV4
47KΩ
0.1µF
3
4
5
6
7
8
VDD (5V)
2
XSUB
3
XV2
4
XV1
K
XSG1
XV3
XSG3
XV4
VCP
DCIN
S
7
2
2
1
D
5
6
7
8
9
10
VHH
VSUB
VEE
ΦV2
ΦV1
VME
ΦV3
ΦV4
VHH
DCOUT
20
19
18
17
16
15
14
13
12
11
0.1µF
0.1µF
100KΩ
Warning : When voltage is biased, You must keep this flow.
if you don`t this flow, Negative voltage is applied to CCD image sensor`s SUB.
t1
15V (VHH)
1µF
+
VSUB
ΦV2
ΦV1
C
C
D
ΦV3
ΦV4
1MΩ
20%
20%
t2
* t1 > t2 > 10ms
0V (VME)
- 8.5V (VME)
_ _
Page 7
KS7221D VERTICAL DRIVER FOR CCD
050 + 0.20
PACKAGE DIMENSION
20-SSOP-225
# 1 #10
_
6.50 + 0.20
unit : mm
#11#20
0~8
_
6.40 + 0.30
_
4.40 + 0.20
0.15
+ 0.10
- 0.05
5.72
_
_
1.50 + 0.20
(0.30)
_
0.22 + 0.10
0.65
0.05MIN
1.85MAX
0.10 MAX
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