The KB9224 is a Servo Signal Processor designed specifically for the Samsung Video-CD designed using the
BICMOS process. RF Block and Picture Quality Enhancing Items are built-in. The processor is a Hard-wired FreeAdjustment Servo with the Pre-signal parts adjustment point automatically adjusted.
FEATURES
• Focus Error Amplifier & Servo Control
• Tracking Error Amplifier & Servo Control
• Sled Amplifier
• Embedded CLV Control LPF
• APC (Auto Laser Power Control) Circuit for Constant Laser Power
• Double Speed Play Available
• Circuit for Interruption Countermeasure
• Mirror, FOK & Defect Detector Circuit
• FE Bias & Focus Servo Offset Free Adjustment
• EF Balance & Tracking Loop Gain Free Adjustment
• Tracking Servo Offset Free Adjustment
• Enhanced Auto-Sequence Algorithm (Fast-Search)
• Tracking Mutting by Window Mirror
• Current, Voltage Pick-up Interaction available
• Embedded RF 3T Boost Circuit
• Enhanced RF Equalize AGC Circuit
• Built-in Envelope EFM Slicer
• Built-in DSP C1-flag Control Circuit
• RF Peaking Prevention Circuit
• Focus & Tracking mutting by EFM Duty Countermeasure
• Built-in Focus, Tracking 2x Filter Adjust
• Single Power Supply: +5 V
•- Related Products
. KS9287 Data Processor
. KA9258D/KA9259D Motor Driver
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VIDEO-CD 2ND GENERATIONKB9224
MIRROR
RESET
MDATA
TRCNT
PIN CONFIGURATION
PDA
PDC
PDB
PDD
F
E
PD
LD
VR
VCC
IVSEL
BOOSTC2
RFL
RF-
RFO
IRF
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
EQI
EQI2
RFI
ARF2
MOC
CAGC
GND
MCP
DCB
FRSH
DCC2
DCC1
FSET
VDDA
ENBR
10
11
12
13
14
15
DVEE
641
FEBIAS
2
3
4
5
6
7
8
9
KB9224
63
62
61
60
59
58
57
56
55
54
53
52
51
50
TG2
TGU
FDFCT
FE1
FE2
TDFCT
DVDD
LPFT
TE1
TE2
TZC
ATSC
TEO
ENC
ENVO
ISET
VREG
WDCK
SMDP
SMON
SMEF
DEFECT
16
17
18
19
20
21
22
23
24
25
FLB
26
FS3
27
FGD
28
LOCK
29
30
ISTAT
31
EFM
32
EFM2
33
ASY
34
VSSA
35
MCK
36
37
MLT
38
39
40
FOK
49
48
47
46
45
44
43
42
41
TE-
FEO
FE-
SPDLO
SPDL-
SL-
SLO
SL+
SSTOP
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VIDEO-CD 2ND GENERATIONKB9224
PIN DESCRIPTION
No.Pin NameI/ODescription
1EQI IRF AGC & Eqaualize input pin
2EQI2 IRF AGC & Equalize input connect switch (controled by Flag)
3RFI IEFM COMPARATOR input pin
4ARF ORF AGC & EQ output pin.
5ARF2 ORF AGC & EQ output connect pin (controled by Falg)
6CAGC IAGC_EQUALIZE LEVEL control pin, VCA input pin & NOISE eliminating CAP pin
7GND GGround (RF block)
8MCP IHalf-wave rectifier CAP pin for MIRROR output
9DCB IDEFECT MAX DUTY limiting CAP pin
10FRSH IFOCUS SEARCH generating & charge/discharge CAP pin
11DCC1 ODEFECT MIN DUTY generating DC eliminating CAP pin. (connected DCC1)
12DCC2 IDEFECT MIN DUTY generating DC eliminating CAP pin (connected DCC2)
13FSET IFCOUS,TRACKING,SPINDLE PEAKING frequency compensation BIAS pin
14VDDA P5V POWER pin for SERVO
15ENBR IBIAS pin for ENVELOPE EFM-SLICE
16ENC IRF ENVELOPE DC BIAS extract voltage input pin
17ENVO ORF ENVELOPE output pin
18ISET IFOCUS SERARCH,TRACKING JUMP, SLED KICK voltage generating BIAS pin
19VREG O3.4 V REGULATOR output pin
20WDCK I88.2KHz input pin from DSP
21SMDP ISMDP input pin of DSP
22SMON ISMON input pin of DSP
23SMEF IExternal LPF time constant connection pin of CLV servo error signal
24DEFECT ODEFECT output pin.
25FLB ICAP pin for FOCUS LOOP rising low band
26FS3 IFOCUS LOOP’s high frequency gain adjustment pin
27FGD IFOCUS LOOP’s high frequency gain adjustment pin
28LOCK ISLED RUN AWAY preventing pin (L: Sled Off and Tracking Gain Up)
29TRCNT OTrack Count output pin
30ISTAT OINTERNAL STATUS output pin
31EFM ORFO SLICE EFM output pin (to DSP)
3Supply current 4vICCLO102540mA
4RF AMP offset voltageVrfo
-850+85mV
5RF AMP Oscillation voltageVrfosc050100mV
6RF AMP voltage gain Grf16.219.222.2dB
7RF AMP voltage gain 2Grf216.219.222.2dB
8RF RHD charac. RFTHD--5%
9RF AMP maximum output
Vrfpp13.8--V
voltage
10RF AMP minimum output
voltage
Vrfpp2--2.0V
RF AMP
111X RF AC charac. RFAC11.001.502.0122X RF AC charac. RFAC20.501.254.013RF AC coupling charac. RFAC30.711.314RF AC coupling charac. 2RFAC40.20.50.815RF IVSEL connection charac. ACRFSELAC 355575Kohm
16RF IVSEL connection charac. BDRFSELBD355575Kohm
17RF IVSEL connection charac.
AC2
18RF IVSEL connection charac.
RFSELAC2
70110150Kohm
RF Boost
RFSELBD270110150Kohm
Option
BD2
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VIDEO-CD 2ND GENERATIONKB9224
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19FOCUS ERROR OFFSET
voltage
20FOCUS ERROR AUTO voltage VFEO2-350+35mV
21ISTAT after FEBIAS adjust VISTAT14.3--V
22FOCUS ERROR voltage gain 1GFEAC182124dB
23FOCUS ERROR voltage gain 2GFEBD182124dB
24FOCUS ERROR voltage gain
difference
25FOCUS ERROR AC differenceVFEACP050100mV
26FERR maximum output
voltage H
27FERR minimum output voltage LVFEPPL--0.6V
33AGC level control 1AGCL11.031.151.334AGC level control 2AGCL21.01.151.335AGC level control 3AGCL31.01.151.25-
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36TERR gain voltage gain 1GTEF1
37TERR gain voltage gain 2GTEF211.72.438TERR gain voltage gain 3GTEF311.31.639TERR gain voltage gain 4GTEF411.451.940TERR gain voltage gain 5GTEF511.552.141TERR gain voltage gain 6GTEF611.451.942TERR gain voltage gain 7GTEF711.451.943TERR balance gainGTEE10.513.516.5dB
44TERR balance mode 1TBE11.01.051.145TERR balance mode 2TBE21.01.051.146TERR balance mode 3TBE31.01.051.147TERR balance mode 4TBE41.01.101.548TERR balance mode 5TBE51.01.201.449TERR balance mode 6TBE61.01.31.7550TERR EF voltage gain
difference
51TERR maximum output voltage HVTPPH3.5--V
Delta GTEF10.013.016.0dB
Tracking
Error Gain &
Balance
-1.50.52dB
52TERR minimum output voltage
L
53APC PSUB voltage LAPSL
54APC PSUB voltage HAPSH3.8--V
55APC NSUB voltage LANSL--1.2V
56APC NSUB voltage HANSH3.8--V
57APC PSUB voltage LDOFFAPSLOF4.0--V
58APC NSUB voltage LDOFFANSLOF--1.0V
59APC current drive HACDH2.5--V
60APC current drive LACDL--2.5V
61MIRROR minimum operting
freq.
62MIRROR maximum operting
freq.
63MIRROR AM charac. FMIRA-400600HZ
64MIRROR minimum input
voltage
65MIRROR maximum input
voltage
VTPPL--1.5V
--1.2V
Automatic
Power
Control
(APC)
FMIRB
FMIRP3075-Khz
MIRROR
VMIRL-0.10.2V
VMIRH1.8--V
-550900HZ
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VIDEO-CD 2ND GENERATIONKB9224
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66FOK THRESHOLD voltage VFOKT
67FOK output voltage HVFOHH4.3--V
68FOK output voltage LVFOKL--0.7V
69FOK freq. charac. FFOK404550KHZ
70DEFECT BOTTOM voltage FDFCTB
71DEFECT Cutoff voltage FDFCTC2.04.7-KHZ
72DEFECT minimum input
voltage
73DEFECT maximum input
voltage
74NORMAL EFM DUTY voltage 1NDEFMN
75NORMAL EFM DUTY symmetryNDEFMA0510%
76NORMAL EFM DUTY voltage 3NDEFMH0+50+100mV
77NORMAL EFM DUTY voltage 4NDEFML-100-500mV
78NORMAL EFM minimum input
voltage
79NORMAL EFM DUTY
difference 1
VDFCTL-0.30.5V
VDFCTH1.8--V
NDEFMV--0.12V
NDEFM1305070mV
FOK
DEFECT
Normal
EFM Slice
-420-350-300mV
-6701000HZ
-500+50mV
80NORMAL EFM DUTY
difference 1
81ENV EFM DUTY voltage 1EDEFMN1
82ENV EFM DUTY voltage 2EDEFMN2-500+50mV
83ENV EFM DUTY symmetryEDEFMA0510%
84ENV EFM DUTY voltage 3EDEFMH10+50+100mV
85ENV EFM DUTY voltage 4EDEFMH2+160+250+340mV
86ENV EFM DUTY voltage 5EDEFML1-100-500mV
87ENV EFM DUTY voltage 6EDEFML2-340-250-160mV
88ENV EFM minimum input
voltage
89FZC THRESHOLD voltage VFZC3569100mV
90ANTI-SHOCK detect HVATSCH73267mV
91ANTI-SHOCK detect LVATSCL-67-32-7mV
92TZC THRESHOLD voltage VTZC-300+30mV
93SSTOP THRESHOLD voltage VSSTOP-100-65-30mV
NDEFM2305070mV
-500+50mV
Envelope
EFM Slice
EDEFMV--0.12V
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VIDEO-CD 2ND GENERATIONKB9224
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94TRACKING GAIN WIN T1 VTGWT1200250300mV
95TRACKING GAIN WIN T2 VTGWT2100150200mV
96TRACKING GAIN WIN I1 VTGWI1250300350mV
97TRACKING GAIN WIN I2 VTGWI2150200250mV
98TRACKING BAL WIN T1 VTGW11-500+50mV
99TRACKING BAL WIN T2 VTGW12-400+40mV
100VREG voltage VREG
101Reference voltage VREF-1000+100mV
102Reference current HIREFH-1000+100mV
103Reference current LIREFL-1000+100mV
Reference
Voltage
3.203.453.65V
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VIDEO-CD 2ND GENERATIONKB9224
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104F.SERVO OFF OFFSETVOSF1Focus
105F.SERVO DAC ON OFFSETVOSF20+250+550mV
106F.SERVO AUTO OFFSETVAOF-650+65mV
107F.SERVO AUTO ISTATVISTAT24.3--V
108FERR FEBIAS statusVFEBIAS-500+50mV
109F.SERVO loop gainGF1921.524dB
110F.SERVO output voltage HVFOH4.4--V
111F.SERVO output voltage LVFOL--0.75V
112F.SERVO maximum output
voltage H
113F.SERVO maximum output
voltage L
114F.SERVO osillation voltage VFOSC0+100+185mV
115F.SERVO FEED throughGFF---35dB
116F.SERVO search voltage HVFSH+0.35+0.50+0.65V
117F.SERVO voltage LVFSL-0.65-0.50-0.35V
118FOCUS full gainGFSFG40.542.545.0dB
VFOMH3.68--V
VFOML--1.32V
Servo
-1000+100mV
119F.SERVO AC gain 1GFA119.023.027.0dB
120F.SERVO AC phase 1PFA1306590deg
121F.SERVO AC gain 2GFA214.018.523.0dB
122F.SERVO AC phase 2PFA2306590deg
123F.SERVO muttingGMUTT---15dB
124F.SERVO AC charac. 1GFAC10.750.850.95125F.SERVO AC charac. 2GFAC20.680.780.88126F.SERVO AC charac. 3GFAC30.600.700.80127F.SERVO AC charac. 4GFAC40.680.780.88128F.SERVO AC charac. 5GFAC50.941.041.14129F.SERVO AC charac. 6GFAC60.730.830.93130T.SERVO DC gainGTO13.515.017.75dB
131T.SERVO OFF offsetVOST1-1000+100mV
132T.SERVO DAC offsetVTDAC150320550mV
133T.SERVO ON offsetVOST2-2500+250mV
134T.SERVO AUTO offsetVTAOF-500+50mV
135T.SERVO oscillationVTOSC0+100+185mV
136T.SERVO ATSC gainGATSC17.520.523.5dB
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VIDEO-CD 2ND GENERATIONKB9224
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137T.SERVO LOCK gainGLOCK17.520.523.5dB
138T.SERVO gain upGTUP17.520.523.5dB
139T.SERVO output voltage HVTSH4.48--V
140T.SERVO output voltage LVTSL--0.52V
141T.SERVO maximum output
voltage H
142T.SERVO minimum output
voltage L
143T.SERVO JUMP HVTJH 0.35 0.5 0.65V
144T.SERVO JUMP LVTJL-0.65-0.5-0.35V
145T.SERVO DIRC HVDIRCH0.350.50.65V
146T.SERVO DIRC LVDIRCL-0.65-0.5-0.35V
147T.SERVO output voltage LGTFF---39dB
148T.SERVO AC gain 1GTA19.012.516.0dB
149T.SERVO AC phase 1PTA1-140-115-90deg
150T.SERVO AC gain 2GTA217.521.525.5dB
151T.SERVO AC phase 2PTA2 -195-150-100deg
152T.SERVO full gainGTFG29.53234.75dB
153T.SERVO AC charac. 1GTAC10.590.690.90154T.SERVO AC charac. 2GTAC20.750.850.95155T.SERVO AC charac. 3GTAC30.650.750.85-
VTSMH3.68--V
VTSML--1.32V
156T.SERVO AC charac. 4GTAC41.301.351.50157T.SERVO AC charac. 5GTAC51.151.251.35158T.SERVO AC charac. 6GTAC61.011.111.21159T.SERVO LOOP MUTTTSMUTT-2500+250mV
160T.SERVO LOOP MUTT ACTSMTAC0+50+100mV
161T.SERVO INT MUTT M1TSMTM10+50+100mV
162T.SERVO INT MUTT M2TSMTM20+50+100mV
163T.SERVO INT MUTT M4TSMTM40+50+100mV
164SL.SERVO DC gainGSL20.522.524.5dB
165SL.SERVO FEED throughGSLF---34dB
166SL.SERVO lockSLOCK0+50+100mV
167SLED forward kickVSKH 0.45 0.60 0.75V
168SLED reverse kickVSKL-0.75-0.60-0.45V
169SLED output voltage HVSLH4.48--V
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VIDEO-CD 2ND GENERATIONKB9224
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170SLED output voltage LVSLL--0.52V
171SLED maximum output voltage HVSLMH3.68--V
172SLED minimum output voltage
L
173SP.SERVO 1X gainGSP14.016.519.0dB
174SP.SERVO 2X gainGSP219.023.027.0dB
175SP.SERVO output voltage HVSPH4.48--V
176SP.SERVO output voltage HVSPL--0.52V
177SP.SERVO maximum output
voltage H
178SP.SERVO minimum output
voltage L
179SP.SERVO AC gain 1GSPA1-7.0-3.50dB
180SP.SERVO AC phase 1PSPA1-120-90-60deg
181SP.SERVO SMEF gainGSMEF13.016.520.0dB
182SP.SERVO AC gain 2GSPA25.59.012.5dB
183SP.SERVO AC phase 2PSPA2-120-90-60deg
VSLML--1.32V
VSPMH3.68--V
VSPML--1.32V
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VIDEO-CD 2ND GENERATIONKB9224
AUTO-SEQUENCE
This feature automatically carries out the following commands: Auto-Focus, Track Jump, and Move. During AutoSequence, it Latches the Data when MLT is L, and outputs H when ISTAT is L and at the end.
AUTO FOCUS
Flow CHart
Auto Focus
Focus Search Up
FOK = H
Yes
FZC = H
Yes
FZC = L
Yes
Focus Servo On
End
No
No
No
Repeat this action
during Blind "E" time
set by Register 5,
until FOK and FZC are
both "H".
Timing Chart
The AUTO-FOCUS carries out the Focus Search UP by receiving the Auto-Focus command from MICOM in Focus
Search DOWN status. SSP is Focus Servo ON when the internal FOK and FZC satisfy the all H time set Blind E
(Register $5X) and transfer FZC to L. Then the internal Auto-Focus is finished, and transmitted to MICOM through
the ISTAT output.
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VIDEO-CD 2ND GENERATIONKB9224
$47 Latch
MLT
FOK
FZC
Focus
Output
ISTAT
Internal
Status
Blind Time, E
Seach Down
$02$03$03$03$08
Serach Up
Focus Servo On
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VIDEO-CD 2ND GENERATIONKB9224
1 TRACK JUMP {$48 (FWD), $49 (REV)}
FLOW-CHART
1 Track Jump
Track Jump
Sled Servo Off
Wait Blind "A"
TRCNT = ?
Yes
Track REV Jump
Wait Brake "B"
$48: Foward Jump
$49: Reverse Jump
Wait using the WDCK
Standard clock for Blind
"A" time, set by register 5.
(1 WDCK = 0.011 mS)
Repeat checks if TRCNT is
continuously "H" at rising
No
edge of WDCK, during
Blind time "B" set by
Register 5.
Track, Sled Servo On
End
1 Track Jump Timing Chart
NOTE: Inside () means Reverse.
Track Jump is carried out after receiving $48 ($49), and the blind time and the brake time is set by Register $5X.
10 Track Jump carries out Tracking Forward Jump until the Trcnt 5 track count. It carries out Tracking reverse
Jump until one period of Trcnt is longer than the Overflow C select time, then turns the Tracking Servo and Sled
Servo On. This function is to check if the Actuator speed is enough to turn the Servo On.
•Tracking Gain Up and Brake On ($17) must be transmitted when carrying out 1, 10, 2n, Track Jump, and Fast
Search.
•The entire Auto-sequence modes Mlt becomes L, and the Sequence process is carried out at the initial Wdck
Falling Edge after Data Latch.
•Please judge Play status not by Istat, but by Fok and Gfs.
•Tracking Gain Up, Brake, Anti-shock and Focus Gain Down are not carried out in Auto-sequence, and needs a
separate command.
•If the Auto-sequence does not operate as Istat Max Time Over, apply $40 and clear the Ssps internal status,
then try again.
•The WDCK mentioned above is input from DSP as 88.2 kHz (2x --> 176 kHz).
•The Auto-sequence internal count differs a little from the actual count.
•2N and M Track have the potential for errors within the Algorithm, when jumping more than 512 Tracks, so
please try to limit use for Track Jumps within 512.
•Please limit the use of the Fast-Search Algorithm for more than 512 Tracks.
1:Micom Data1:H flag-SW Off1:Flag-SW Off 1:Lock=0,1 by
D6
PNSEL
D5
INTC2
0
0
1
1
D4
INTC
0
1
0
1
TRACKING S.
WINDOW MUTT
11 kHZ ~ 0.7 kHZ
Cpeak Mutting
2.75 kHz ~ 0.7 kHz
5.5 kHz ~ 0.7 kHz
DSP
ISTATTRCNT
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VIDEO-CD 2ND GENERATIONKB9224
Register Set 1
Address
$86XXFocus
INITIAL. Value 1111 0 1 0 1
Register Set 2
Address
D7D6D5D4D3D2D1D0
Trcnt
Servo
Offset Value
Reset
0:Reset
1:Set
TRCNT select is chosen by the MONITOR(D6), TGL is output when Tracking Gain adjust
command ($82X~$83X) is given. Others when FOKSEL is “0”, FOK is output to the TRCNT
pin, when “1” TRCNT is output.
Tracking Servo Loop Offset Control
$8F1F(-160mV ) - > $8F00(+160mV)
Monitor Window is same to
Tracking Balance Window
Focus Servo
Center Peak Freq.
0 0 1.2K
1 0 1.3K
0 1 1.4K
1 1 1.5K
Data
D4
TOA3
D3
D2
TOA2
Focus
Servo
Gain
Shift
0:Off
1:On
D1
TOA1
Focus
Servo
Phase
Shift
0:Off
1:On
D0
TOA0
–
Initial Value 00010000
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VIDEO-CD 2ND GENERATIONKB9224
TRACKING BALANCE ADJUST CONCEPT
The Tracking Balance Adjust automatically adjusts using the following process: The Tracking error DC offset
extracted from the pre-set DC voltage window level, and the external LPF are comparison monitored by MICOM.
F
beam
E
beam
69
70
F
E
I/V Amp
I/V Amp
Vd
RHI
c
-
RHO
+
+
RLO
AND
Logic
TBAL
30
ISTAT
To MICOM
-
RLI
Gain Adjust
6 bit Array
6 bit (B5~B0)
from MICOM
LPF
MIRROR
TZC
DCKQ
29
TRCNT
Process Summary
Tracking balance adjust is accomplished in the following manner: With the focus On and spindle servo On, the
tracking and sled servo loop is turned off to make the tracking loop into an open loop. The error signal which has
passed through the wide-range pick-up and the tracking error amp, passes through the external LPF to extract the
DC offset. The DC offset is compared with the pre-selected window comparator level to extract the tracking error
amps DC offset within the window, to inform MICOM using the ISTAT that the balance adjust is complete.
At this time, Tracking E beam-side I/V amps gain is selected by MICOM, and the 6-bit resistance arrays resistance
value is selected by the 6-bit control signal.
The values that MICOM applies are 000000XXX-->111111XXX. If you select the switch, TE1s DC offset increases
the (2.5 V-delta V) --> (2.5 V + delta V) one step at a time, to enter the pre-selected DC window level. When it
enters that level, the balance adjust is completed, and the switch condition is latched at this time.
In this adjust process, the TE1 signals frequency distribution is from DC to 2 kHz, so if DC components are
included, the DC offset which passed LPF are not accurate DC values. Therefore, if the frequency of the TE1
signal is above 1 kHz, MICOM monitors the window comparator output. The frequency check at this time monitors
the Trcnt Pin. Balance Adjust completes the adjustment when the TBAL output is H.
Vdc < RLI < RHI RLI < Vdc < RHI RLI < RHI < Vdc
RHOHHL
RLOLHH
TBAL (AND gate)LHL
RHI: High level threshold value
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VIDEO-CD 2ND GENERATIONKB9224
RLI: Low level threshold value
Vdc: Window comparator input voltage
TBAL: Window comparator outputs AND gate output value
Tracking Balance Adjust Example
Out of $8000->$81FFs 64steps, the 22 steps excepting the upper and lower 5 steps, are used ($8040~$81AF).
The limit adjust flow applies the gain to $8300 at the Focus, Tracking ON point, and checks the TRCNTs
frequency. Check if 7 TRCNT came in during 10 ms, and if the answer is YES, check ISTAT, and if NO, repeat the
TRCNT number check 3 times, then go to ISTAT Check.
If the 3x repeat fails as well, increase the balance switch one step.
Also, just in case ISTAT does not immediately go to H when ISTAT Checking, wait 10 ms. Check if it is H after the
3x repeat, and if not, increase the balance switch one step. Adjust the wait mentioned above 10 ms, when the
system is running.
Average the values found by repeating the balance adjust three times.
If only two out of the three tries were successful in getting a balance value, average the two values.
Set as balance switch, this average value, +2. This is because the balance for the system and the minus value for
the DC is stable in the system.
Precision is important in balance adjust, and about 1~2 sec is spent as adjust time, which is accounted for.
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VIDEO-CD 2ND GENERATIONKB9224
Balance Adjust Flowchart 1
Start :$804
B0 to B5
Switch control.
1 step increase
from $8040 to
$81AF
No
*Settings*
FOCUS On$08
Spindle OnCLV-S
Tracking Off $20
Sled Off Gain$830
Balance window
level select
TRCNT = 10 ?
during 10 ms
Yes
ISTAT = H ?
Yes
After current adjust
value +2 step,
Adjust complete
Other method
1. Can balance afjust while in track mode.
2. Trcnt freq. check is easy in $F3 apply 2X
mode.
-10 ~ +15 mV :$84 X0XX
-20 ~ +20 mV :$84 X1XX
Most select is + 20 mV.
No
3 times repeat. If failure again after 3
tries, switch cahnge.
After 10 ms Wait, 3 times repeat check to
see if 10 ms ISTAT = "H".
If failure again after 3 tries, switch
cahnge.
Repeat Balance ADJ 3 times and
average the thrice-repeated balance
switch value to set the balance
switch,. If only 2 repeats out of 3 is
OK, take the average of 2 repeats.
End
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VIDEO-CD 2ND GENERATIONKB9224
Balance Adjust Flowchart 2
Start :$800
B0 to B5
Switch control.
1 step increase
from $8000 to
$81FF
No
*Settings*
FOCUS On$08
Spindle OnCLV-S
Tracking Off $20
Sled Off Gain$830
Balance window
level select
Is TRCNT high
enough?
Yes
ISTAT = H ?
Yes
End
Other method
1. Can balance afjust while in track mode.
2. Trcnt freq. check is easy in $F3 apply 2X
mode.
-10 ~ +15 mV :$84 X0XX
-20 ~ +20 mV :$84 X1XX
Most select is + 20 mV.
No
1 kHz check
When Executing Tracking Balance Adjust
•The Balance adjust is from $8000 to $81FF, and the Switch Mode is changed one STEP at a time by 16-bit
Data transmission. After Adjust is completed, a separate Latch Pulse is not necessary.
•If the Trcnt Freq. is not high enough, the Balance can be adjusted at $F3 applied 2x Mode.
•Here, we have suggested Tracking Off status for the Balance Adjust, but the same amount of Flow can be
Balance adjusted while in Track Move.
•The Tracking Balance window Select level can be selected by D2 bit out of 12-bit Data. 0: -10 mv ~ +15 mv, 1:
-20 mv ~ +20 mv.
•When the Tracking Balance Adjust is complete, start the Tracking Gain Adjust.
Process Summary
The Signal TE1 output by the Tracking Error Amp outputs resistance divide (DC+AC) passes through LPF and the
DC Offset extract signal (DC) difference AMP. Only pure AC components are compared with the pre-selected
Window Comparators Gain select value to carry out the Tracking Gain Adjustment.
The Resistance Divide changes the 5-bit resistance combination with the MICOM Command, to change the Gain.
Tracking Gain Adjustment is carried out in the same conditions as Balance Adjustment, which is: Focus Loop On,
Spindle Servo On, Tracking Servo Off and Sled Servo Off. It adjusts the Tracking Error Amps Gain and the widerage Pick-ups amount of reflection.
The external LPFs Cut-off Frequency is set to 10 Hz ~ 100 Hz.
The Window Comparators comparison level can be chosen from +150 mv ~ +300 mv, and +250 mv ~ +200 mv by
MICOM command.
TGL outputs +150 MV and +250 MV comparator output to TRCNT.
TGH outputs +300 MV and +200 MV comparator output to ISTAT.
Vac < GLI < GHI GLI < Vac < GHI GLI < GHI < Vac
TGHHHL
TGLLHH
Gain Adjustment is complete when the output is H.
39
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VIDEO-CD 2ND GENERATIONKB9224
When Adjusting the Tracking Gain
•In Gain Adjustment, the Switch Mode is changed one Step at a time from $83F --> $820 by 12-bit DATA
transmission. A separate Latch Pulse is not needed after Adjust completion.
•Trcnt and TGL outputs H Duty Check standard is above 0.1 ms.
•Adjustment is carried out by choosing the most appropriate out of the 4 adjustment modes, including the ones
listed above.
•The Tracking Balance Window select level can be selected by the D3 bit out of the 12-bit DATA.
0: +250 mv (TGL) ~ +200 mv (TGH)
1: +150 mv (TGL) ~ +300 mv (TGH)
•When Tracking Gain Adjustment is complete, Tracking & Sled Servo Loop On and TOC Read is initiated.
If Gain adjusting after Balance adjustment,
separate environment settings are not needed.
-150 ~ +300 mV :$84 1XXX
+250 ~ +200 mV :$84 0XXX
Gain Adjust proceeds from Status 1 -->2 -->3 when the MICOM Command carries out Down Command from $83F
--> $820, in order. Adjustment is complete when in Status 2.
Gain Adjustment Method 1
MICOM monitors Trcnts TGL output, and if the outputs H Duty (0.1 ms) is detected, the adjustment is complete. At
this time, the Window Comparator Level is +150 mv ~ +300 mv.
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VIDEO-CD 2ND GENERATIONKB9224
Gain Adjustment Method 2
MICOM monitors ISTATs TGO output, and if the outputs H Duty (0.1 ms) is detected, the adjustment is complete.
At this time, the Window Comparator Level is +150 mv ~ +300 mv.
Gain Adjustment Method 3
MICOM monitors Trcnts TGL output, and if the outputs H duty (0.1 ms) is detected, the Window Comparator Level
is changed from +150 mv ~ +300 mv to +250 mv ~ +200 mv. And when MICOM again monitors Trcnts TGL output
and the outputs H duty (0.1 ms) is detected, the adjustment is complete. If you latch the former MICOM Command
value and the latter MICOM Command values median, it is possible to Gain adjust +200 mv.
Gain Adjustment Method 4
MICOM monitors Trcnts TGL output, and if the outputs H Duty (0.1 ms) is detected, MICOM Command goes 1
Step Down, and adjustment is completed. At this time, the Window Comparator Level is +150 mv ~ +300 mv.
Gain Adjustment Method 5
Gain Adjustment is set to a total of 32 steps, and Gain Window is set to +250 mv. That is, the process starts at
$83F and carries on to $820. It first sets $83F, monitors the Trcnt Pin and checks if 5 Trcnt were detected during 10
ms. If Yes, adjustment is complete, and if No, carry on lowering the Gain Switch 1 step at a time. Repeat the above
process three times and set the Gain Adjustment Switch with the average value.
MICOM sends the Febias Offset Adjust Command $841 to start the adjustment. In the Focus Error Amp Final
output block, the Focus output is compared with the 1/2 Vdd. If the Focus Error Amp output goes above 1/2 VDD,
the Febias offset adjust is completed. The Focus Offset Adjusts voltage change per step is about 17 mv. Transition
is carried out 1 step at a time from 112 mv to -112 mv by the total 5-bit resistance DAC, and after completion,
about -8 mv of Offset is added to 1/2 step. Normally, the Offset distribution after Febias Offset adjust is between -8
mv ~ +8 mv. The design is such that after Focus Offset, you have the option to vary the Febias by turning On the
switch that connects the exterior and interior of the Febias block (pin 63). This Control signal is Sev_stop, and it is
switched On after Focus Servo Offset adjust.
fcmpo
When Febias block is Open, the Focus Error Offset remains unchanged, the same as Febias Adjust Offset. The
time spent per step is 5.8 ms, and since there are 5 bits, a total of 32 steps and maximum 256 ms can be spent.
The Adjustment is carried out by Hardware, and it transitions from Minus Offset to Plus Offset.
For Febias Offset Readjust, 4-bit DAC is Reset by $878, and Reset can be canceled only when the $87F-applied
D2 bit goes from 0 --> 1.
In order to prevent system errors such as static electricity, the Febias DAC Latch Blocks Reset is not carried out by
the RESET block (System Reset), but by MICOM DATA.
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VIDEO-CD 2ND GENERATIONKB9224
Example of System Control Program
DIS C C H ANG E
100m s m axious
100m s m axious
2s m axiou s
TIME
POW ER ON
DISC TRAY
CHECK
OPE N
LOAD IN GREPLAY
Focus error febias Au to Adjust Start
$878+ $87F+ $841 Tr a n sm it
Focus offset cancel Auto Adju st Start
$08+ $867+ (200ms wa it)+
$86F+ $842 Transm it
Trackin g offset cancel Auto Adjust Start
$8F1X- > $8F0X(IS TAT- > H)
LASE R D IO DE ON
LD ON ,P- SUB $ 854 Transm it
Befor c h e ck 86F p41- > sstop
LIM IT SW CH ECK
After check 86B p41- > defec
FOCUSIN G
Auto- Focusin g $ 47 Tra n sm it
FOCUS OK ?
FOK H?
YES
Spin dle Se rvo Loop On
Tracking &Sled loop Off
$20 Tra n sm it
CLOS E
t
NO
After 100m s
ISTAT L - > H ?
After 100m s
ISTAT L - > H ?
NO
TR Y COUN T
3 ?
YES
LASE R OFF
$85C Tran sm it
FEbias Offset Setting
300ms maxious
Trackin g B a la n c e
Adju st
Tracking G ain
Adjust
TOC READ
Com plete ?
PASS
DIS C 8/12Cm
Check
PLAY BAC K
FAI L
DISPLAY
( NO DISC )
STAND BY
LASE R OFF
$85C Tran sm it
DISPLAY
( ER R OR ), TR AY OPE N
STAND BY
44
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VIDEO-CD 2ND GENERATIONKB9224
* Application when adjusting offset from
0 mV ~ +100 mV
VDD (5 V)
Rx
FEBIAS
Rx
VDD/2
VDD - VDD/2
( Rx + 4 K )
= Voff
Focus Offset Adjust
Optional Offset Voltage
(Voff)
Example) When Power is 5 V
( 5 - 2.5 ) V
( Rx + 4 K )
* Application when adjusting offset from
-100 mV ~ 0 mV
FEBIAS
Rx
4 K = Voff
4 K
VDD/2
10 K
( Rx + 4 K )
= Voff
MICOM sends the Focus Offset Adjust Command $842 to start the adjustment. In the Focus Error Amp Final
output block, the Focus output is compared with the 1/2 Vdd. If the Focus Error Amp output goes above 1/2 VDD,
the Focus offset adjust is completed. The Focus Offset Adjusts voltage change per step is about 40 mv. Transition
is carried out 1 step at a time from 320 mv to -320 mv by the total 4-bit resistance DAC, and after completion, about
+20 mvdml of Offset is added to 1/2 step. Normally, the Offset distribution after Focus Offset adjust exists between
-20 mv ~ +20 mv. The design is such that after Focus Offset, you have the option to vary the Focus by turning On
the switch that connects the exterior and interior of the Focus block (pin 63).
When Febias block is Open, the Focus Error Offset is the same as Febias Adjust Offset. The time spent per step is
5.8 ms, and since there are 4 bits, a total of 16 steps and maximum 128 ms can be spent. Also, Lens-collisionsounds can be generated when adjusting the pick-up with a sensitive Focus Actuator, so the Time division that
uses 46 ms per step, spending a total of 736 ms, is used. That is carried out by setting the $86Xs lowest D0 bit to
0. The Adjustment is carried out by Hardware, and it goes from Minus Offset to Plus Offset.
For Febias Offset Readjust, 4-bit DAC is Reset by $878, and Reset can be canceled only when the $87F-applied
D2 bit goes from 0 --> 1.
In order to prevent system errors such as static electricity, the Focus DAC Latch Blocks Reset is not carried out by
the RESET block (System Reset), but by MICOM DATA.
FEBIAS Adjust
FEBIAS OFFSET is automatically adjusted from 0 mV, and can be adjusted from the exterior at +/-100 mV. When
adjusting the FEBIAS at 0 mV ~ +100 mV, Rx connect to VDD, and if adjusting the FEBIAS at -100 mV ~ 0 mV, Rx
connect to GND.
After FEBIAS OFFSET automatic adjust is complete, the FEBIAS external resistance and FOCUS ERROR internal
resistance is connected, so adjusting Pin 63 (FEBIAS) to an optional OFFSET value is possible.
45
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VIDEO-CD 2ND GENERATIONKB9224
Pg. 39
11. RF SUMMING AMPLIFIER APPLICATION
The internal switch is for selecting the 1, 2x speed-related filter. It is On when 1x, and Off when 2x. Please adjust
the according to the Set.
PDA
PDC
PDB
PDD
65
66
67
68
58 K
58 K
58 K
58 K
VC
VC
BOOSTC2
58 K
-
2 K
+
-
58 K
-
2 K
+
vc
300 pF250 pF
76
RF-
78
RFL
77
RFO
79
2 pF
1 K
0.39 K
2 pF
3.9 K
+
46
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VIDEO-CD 2ND GENERATIONKB9224
RF EQUALIZE & AGC
Vin(t)
Modulator
Vcagc(t)
I/V Converter
Control Range I*10 K
Vo(t)
Ablout 3X Gain
AMP
-
+
Vp
Vn
HPF
(3 dB: 50 kHz)
ARF-AGC
Output
Full Wave
Rectifier
(RF peak envelope)
The Modulator output is the product of the input and Vcagcs Tanh Term. It goes through about 3x of Gain Blocks,
then is output to the ARF Pad. The output goes through the HPF with the pole frequency of 50 kHz, then is fullwave rectified to follow-up the RF Levels Peak Envelope.
At this time, the HPFs Pole frequency is set to 50 kHz so that the 3t~11t frequency components can pass without
diminution. After full-wave rectification, the RF levels Peak value is integrated to the 115pf CAP Node. If this peak
voltage is smaller than the pre-determined voltage, it outputs a sinking current, and if larger, it outputs a sourcing
current. The maximum current peak value is 10 uA, and this current is I/V converted and applied as a Modulator
Control Voltage.
When Sinking, the voltage of Vcagc is increased up to Iout x 10 K and multiplied with Tanh(1-X), and when
Sourcing, the voltage of Vcagc is decreased to Iout x 10 K and multiplied with Tanh(1+X). At this time, X is (Vcagc/
2Vt).
Overall, after detecting the 3t and 11ts level by full-wave rectification, it is compared to Tanh using the Modulator
and multiplied to the Gain to realize the wave-form Equalize. The above is related to the AGC concept, which
means that a specific RF level is always taken.
OTHER BLOCK
13.1 TRACKING ERROR AMPLIFIER
The Side Spot Photo Diode current which is input into blocks E and F, goes through the E Loop I-V and F Loop I-V
Amp. It is then converted into voltage, in order to gain the difference signal in the Tracking Error Amp. It is MICOM
47
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VIDEO-CD 2ND GENERATIONKB9224
programmed so that the balance is adjusted in E block, and gain is automatically adjusted in Te1.
LPFTTE2TE1
555354
6970F
I/V Amp
WIN COMP
+
E
I/V Amp
B_REF_CNTR
WIN COMP
16RR2R4R8R
G_REF_CNTR
BAL [4:0]Gain Up/down
GAIN [4:0]
29 TRCNT
FOCUS OK CIRCUIT
The Focus OK Circuit compares the DC difference value between the Rfi and Rfo blocks to the standard DC value.
If the Rf level is above standard, Fok outputs L->h to make a Timing Window for turning the Focus On during Focus
Search status.
40 K
40 K
40 K
-
57 K
-
40
+
+
90 K
VC+0.625 V
FOKB
RFO
RFI
79
80
MIRROR CIRCUIT
The Mirror signal amplifies the RFI signal, than Peak and Bottom Holds it. Peak Hold can follow-up on Defect-type
Traverse, and Bottom Hold can follow-up on Rf Envelope to count the Tracks. The Mirror output is the following: L
48
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VIDEO-CD 2ND GENERATIONKB9224
within Disc tracks, H between tracks, and H when a defect above 1.4 ms is detected.
1.5 K
8
39
MCP
MIRROR
IRF
80
17 K
19 K
-
38 K
-
+
Peak and
Bottom Hold
80 k
+
96 K
+
17 K
+
EFM COMPARATOR
The EFM Comparator makes the Rf signal into a secondary signal. The Asymmetry generated by a fault during
Disc production cannot be eliminated by only AC coupling, so control the standard voltage of the EFM Comparator
to eliminate it.
ENCENVO
1716
RF envelope detect and
ENVR
15
asymmetry / envelope DC
compensation and slice AC level
summing system
Compensation Asy. DC
X5
ASY33
EFM232
RFI
-
3
+
40 K
EFM31
DEFECT CIRCUIT
After Rfo signal inversion, Bottom Hold is carried out using only , , 2 . Except, the Bottom Hold of Holds the
coupling level just before the coupling. Differentiate this with the Coupling, then Level Shift it. Compare the signals
49
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VIDEO-CD 2ND GENERATIONKB9224
to either direction to generate the Defect detect signal.
DCC1DCC2
75 K
1211
RFO
79
VC+0.6254 V
37.5 K
28 K
75 K
VC
+
Bottom
Envelope
Hold
9
DCB
Bottom
Envelope
Hold
43 K
-
+
24
DEFECT
APC CIRCUIT
If you operate the Laser Diode in constant current, since it has a negative temperature characteristic with a large, it
is controlled by the Monitor Photo Diode so that the output is kept regular.
PD
71
+
-
150 K
LDON
150 K
150 K
+
-
300 K
PN
0.75 K
72
5.5 K
13.7 Center Voltage Generation Circuit
This circuit makes the Center Voltage using the Resistance Divide.
30 K
30 K
+
30 K
30 K
73
VC
50
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VIDEO-CD 2ND GENERATIONKB9224
13.8 Rf Equalize Circuit
The AGC block maintains a steady Rf Peak to Peak level, and has a built-in 3t gain boost function. It detects the Rf
Envelope and compares it with the standard voltage to perform comparison gain adjustment.
The received Rf output stabilizes the Rf Level to 1vp-p, and this output is applied as the EFM Slice input.
CAGC
6
EQI
1
VCA
4
Equalize
ARF
13.9 ATSC
The Detect Circuit for the Tracking Gain Up (about Shock) is composed of a Window and a Comparator.
+
-
BPF51
ATSC
Tracking Gain
Up
+
-
13.10 Focus Servo
If set to phase compensate the Focus Servo Loop, the Focus Servo Loop is Muted when Defect is H. At this time,
the Focus Error signal is integrated by the 0.1 uf Capacitor to be connected to the Fdfct block, and the 470
resistance. It is then output through the Servo Loop. Therefore, during Defect, the Focus Error output is Held as the
Error value before the Defect Error. The frequency which maximizes the Focus Loops phase compensation is
changed by the Fset block. If the resistance is 510 kohm, the maximum frequency is 1.2 kHz, and is inversely
proportional to the resistance.
When in Focus Search, Fs4 is On to intercept the Error signal. The Focus Search signal is output through the Feo
block. When Focus is On, Fs2 is On, and the Focus Error signal input through the Fe2 block is output to the output
pin through the Loop.
51
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VIDEO-CD 2ND GENERATIONKB9224
To Digital
FSET
13
Focus Phase
Compensation
40 K
FS2B
VC
+
+
82 K20 K
48
FEO
+
40 K
FE-47
10 K
50 K
5 K
-
+
FS1
FE2
FGD
FS3
58
60
27
26
3.6 K
3.6 K
+
DFCT1
46 K
FZCI
FS4B
580 K
48 K
160 K
470 K
FS3
25
FLBFRCH
10
TRACKING SERVO
After Tracking Servo Loops Phase compensation and during Defect, the Tracking Error signal is integrated through
470 k resistance and the 0.1 uf Capacitor, then output through the Servo Loop. Rtg and Tg2 blocks are Tracking
Gain Up/Down exchange blocks. In Phase Compensation, like Focus Loop, the Peak frequency of the phase
compensation is varied by the Fset block. If the resistance connected to the Fset block changes, the Op Amp
Dynamic Range and the Offset change as well.
52
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VIDEO-CD 2ND GENERATIONKB9224
53
TE2
TDFCT
TGU
TG2
57
61
62
470 K
DFCT1
470 K
20 K
680K
TG1TG1B
TM1
TG2B
10 K
110 K
82 K
680K
68 pF
Tracking Phase
Compensation
13
FSET
TM4
TM3
10 K90 K
TM7
TE-
49
+
50
TEO
The Tm7 Switch is a Brake Switch which turns the Tracking Loop On/Off when the Actuator is unstable after a
Jump. After the Servo has jumped 10 tracks the Servo Circuit is out of the liner range, and sometimes the Actuator
follows an unstable track. So this prevents unnecessary jumping caused by unwanted Tracking Errors. Tg2 and
Tgu blocks adjust the Tracking Servo Loops high frequency Gain. It adjusts the gain of the wanted frequency band
zone through the external Cap.
SLED SERVO
This servo integrates the Tracking Servo output to move the pick-up. Also, during Track movement, it outputs Sled
Kick voltage for the Track Jump along the Sled axis.
43
SLO
TM6
TM7
-
+
44
42
SL-
SL+
TM2
53
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VIDEO-CD 2ND GENERATIONKB9224
SPINDLE SERVO & LOW PASS FILTER
200 Hz Lpf is configured by the 20 k resistance and 0.33 uf Cap in order to eliminate carrier components. Fsw
becomes Low in Clv-s mode, so more powerful filter movements are carried out.
22 K22 K
15 K
20 K
15 K
220 K
220 K
220 K
-
+
220 K
50 K
100 K
FVCO
Double Speed
+
46
SPDLO
-
SPDL-45
SMON
SMDP
22
21
ITEM1. Mirror Mute (Used for Tracking Mute Only)
This circuit is used as an ABEX-725A countermeasure, which handles Tracking Muting when Mirror is detected. Its
MIN and MAX are set, and it detects a minimum of 11 kHz to a maximum of 700 Hz.
Except, Mute does not function in the following four cases.
When transmitting a MICOM tracking gain up command (TG1, TG2 = 1)
When Anti-shock is detected (ATSC)
When LOCK falls to L
When DEFECT is detected
Miiror Mute Operating / APC P-sub APC OnAPC Off
Interruption On (Mirror 11 kHz~0.7 kHz)$854X$85CX
Interruption Off$855X$85DX
Interruption On (Mirror 2.75 kHz~0.7 kHz)$856X$85EX
Interruption On (Mirror 5.5 kHz~0.7 kHz)$857X$85FX
ITEM2, TRCNT Output
TRCNT is an output generated by Mirror and TZC. Mirror is a Track Movement Detect output by the Main Beam,
and TZC is a Track Movement Detect output by Side Beam. TRCNT receives these 2 inputs and determines if the
Pick-up is currently moving inwards or outwards to use it when in Tracking Brake of $17.
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VIDEO-CD 2ND GENERATIONKB9224
MIRROR
TZC edge detect by
TZCCK
inverter elay TZC
rising, falling detect
D
Q
TZC Output
Mirror value is output at
TZC rising, falling detect
55
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