Page 1
TL/F/6368
54LS109/DM54LS109A/DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops
with Preset, Clear, and Complementary Outputs
June 1989
54LS109/DM54LS109A/DM74LS109A
Dual Positive-Edge-Triggered J-K
Flip-Flops
with Preset, Clear, and Complementary Outputs
General Description
This device contains two independent positive-edge-triggered J-K
flip-flops with complementary outputs. The J and
K
data is accepted by the flip-flop on the rising edge of the
clock pulse. The triggering occurs at a voltage level and is
not directly related to the transition time of the rising edge of
the clock. The data on the J and K
inputs may be changed
while the clock is high or low as long as setup and hold
times are not violated. A low logic level on the preset or
clear inputs will set or reset the outputs regardless of the
logic levels of the other inputs.
Features
Y
Alternate Military/Aerospace device (54LS109) is available. Contact a National Semiconductor Sales Office/
Distributor for specifications
Connection Diagram
Dual-In-Line Package
TL/F/6368– 1
Order Number 54LS109DMQB, 54LS109FMQB, DM54LS109AJ,
DM54LS109AW, DM74LS109AM or DM74LS109AN
See NS Package Number J16A, M16A, N16E or W16A
Function Table
Inputs Outputs
PR CLR CLK J K QQ
LH XXXHL
HL XXXLH
LL XXXH*H*
HH
u
LL L H
HH
u
H L Toggle
HH
u
LHQ0Q
0
HH
u
HH H L
HH LXXQ
0
Q
0
H
e
High Logic Level
L
e
Low Logic Level
X
e
Either Low or High Logic Level
u
e
Rising Edge of Pulse
*
e
This configuration is nonstable; that is, it will not persist when preset
and/or clear inputs return to their inactive (high) state.
Q
0
e
The output logic level of Q before the indicated input conditions were
established.
Toggle
e
Each output changes to the complement of its previous level on
each active transition of the clock pulse.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.
Page 2
Absolute Maximum Ratings (Note)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Supply Voltage 7V
Input Voltage 7V
Operating Free Air Temperature Range
DM54LS and 54LS
b
55§Ctoa125§C
DM74LS 0
§
Ctoa70§C
Storage Temperature Range
b
65§Ctoa150§C
Note:
The ‘‘Absolute Maximum Ratings’’ are those values
beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The
parametric values defined in the ‘‘Electrical Characteristics’’
table are not guaranteed at the absolute maximum ratings.
The ‘‘Recommended Operating Conditions’’ table will define
the conditions for actual device operation.
Recommended Operating Conditions
Symbol Parameter
DM54LS109A DM74LS109A
Units
Min Nom Max Min Nom Max
V
CC
Supply Voltage 4.5 5 5.5 4.75 5 5.25 V
V
IH
High Level Input Voltage 2 2 V
V
IL
Low Level Input Voltage 0.7 0.8 V
I
OH
High Level Output Current
b
0.4
b
0.4 mA
I
OL
Low Level Output Current 4 8 mA
f
CLK
Clock Frequency (Note 2) 0 25 0 25 MHz
f
CLK
Clock Frequency (Note 3) 0 20 0 20 MHz
t
W
Pulse Width Clock High 18 18
(Note 2)
Preset Low 15 15 ns
Clear Low 15 15
t
W
Pulse Width Clock High 25 25
(Note 3)
Preset Low 20 20 ns
Clear Low 20 20
t
SU
Setup Time Data High 30
u
30
u
ns
(Notes1&2)
Data Low 20
u
20
u
t
SU
Setup Time Data High 35
u
35
u
ns
(Notes1&3)
Data Low 25
u
25
u
t
H
Hold Time (Note 4) 0
u
0
u
ns
T
A
Free Air Operating Temperature
b
55 125 0 70
§
C
Note 1: The symbol (u) indicates the rising edge of the clock pulse is used for reference.
Note 2: C
L
e
15 pF, R
L
e
2kX,T
A
e
25§C and V
CC
e
5V.
Note 3: C
L
e
50 pF, R
L
e
2kX,T
A
e
25§C and V
CC
e
5V.
Note 4: T
A
e
25§C and V
CC
e
5V.
2
Page 3
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol Parameter Conditions Min
Typ
Max Units
(Note 1)
V
I
Input Clamp Voltage V
CC
e
Min, I
I
eb
18 mA
b
1.5 V
V
OH
High Level Output V
CC
e
Min, I
OH
e
Max DM54 2.5 3.4
V
Voltage V
IL
e
Max, V
IH
e
Min
DM74 2.7 3.4
V
OL
Low Level Output V
CC
e
Min, I
OL
e
Max DM54 0.25 0.4
Voltage V
IL
e
Max, V
IH
e
Min
DM74 0.35 0.5 V
I
OL
e
4 mA, V
CC
e
Min DM74 0.25 0.4
I
I
Input Current@Max V
CC
e
Max J, K 0.1
Input Voltage V
I
e
7V
Clock 0.1
mA
Preset 0.2
Clear 0.2
I
IH
High Level Input V
CC
e
Max J,K 20
Current V
I
e
2.7V
Clock 20
mA
Preset 40
Clear 40
I
IL
Low Level Input V
CC
e
Max J, K
b
0.4
Current V
I
e
0.4V
Clock
b
0.4
mA
Preset
b
0.8
Clear
b
0.8
I
OS
Short Circuit V
CC
e
Max DM54
b
20
b
100
mA
Output Current (Note 2)
DM74
b
20
b
100
I
CC
Supply Current V
CC
e
Max (Note 3) 4 8 mA
Switching Characteristics at V
CC
e
5V and T
A
e
25§C (See Section 1 for Test Waveforms and Output Load)
From (Input)
R
L
e
2kX
Symbol Parameter
To (Output)
C
L
e
15 pF C
L
e
50 pF Units
Min Max Min Max
f
MAX
Maximum Clock
25 20 MHz
Frequency
t
PLH
Propagation Delay Time Clock to
25 35 ns
Low to High Level Output Q or Q
t
PHL
Propagation Delay Time Clock to
30 35 ns
High to Low Level Output Q or Q
t
PLH
Propagation Delay Time Clear
25 35 ns
Low to High Level Output to Q
t
PHL
Propagation Delay Time Clear
30 35 ns
High to Low Level Output to Q
t
PLH
Propagation Delay Time Preset
25 35 ns
Low to High Level Output to Q
t
PHL
Propagation Delay Time Preset
30 35 ns
High to Low Level Output to Q
Note 1: All typicals are at V
CC
e
5V, T
A
e
25§C.
Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. For devices, with feedback from the outputs, where
shorting the outputs to ground may cause the outputs to change logic state an equivalent test may be performed where V
O
e
2.25V and 2.125V for DM54 and
DM74 series, respectively, with the minimum and maximum limits reduced by one half from their stated values. This is very useful when using automatic test
equipment.
Note 3: I
CC
is measured with all outputs open, with CLOCK grounded after setting the Q and Q outputs high in turn.
3
Page 4
Physical Dimensions inches (millimeters)
16-Lead Ceramic Dual-In-Line Package (J)
Order Number 54LS109DMQB or DM54LS109AJ
NS Package Number J16A
4
Page 5
Physical Dimensions inches (millimeters) (Continued)
16-Lead Small Outline Molded Package (M)
Order Number DM74LS109AM
NS Package Number M16A
16-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS109AN
NS Package Number N16E
5
Page 6
54LS109/DM54LS109A/DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops
with Preset, Clear, and Complementary Outputs
Physical Dimensions inches (millimeters) (Continued)
16-Lead Ceramic Flat Package
Order Number 54LS109FMQB or DM54LS109AW
NS Package Number W16A
LIFE SUPPORT POLICY
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.
National Semiconductor National Semiconductor National Semiconductor National Semiconductor
Corporation Europe Hong Kong Ltd. Japan Ltd.
1111 West Bardin Road Fax: (
a
49) 0-180-530 85 86 13th Floor, Straight Block, Tel: 81-043-299-2309
Arlington, TX 76017 Email: cnjwge@tevm2.nsc.com Ocean Centre, 5 Canton Rd. Fax: 81-043-299-2408
Tel: 1(800) 272-9959 Deutsch Tel: (
a
49) 0-180-530 85 85 Tsimshatsui, Kowloon
Fax: 1(800) 737-7018 English Tel: (
a
49) 0-180-532 78 32 Hong Kong
Fran3ais Tel: (
a
49) 0-180-532 93 58 Tel: (852) 2737-1600
Italiano Tel: (
a
49) 0-180-534 16 80 Fax: (852) 2736-9960
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.
Loading...