Datasheet JANSR2N7401 Datasheet (Intersil)

JANSR2N7401

Formerly FSS234R4

6A, 250V, 0.600 Ohm, Rad Hard,
N-Channel Power MOSFET

The Discrete Products Operation of Intersil has developed a
series of Radiation Hardened MOSFETs specifically
designed for commercial and military space applications.
Enhanced Power MOSFET immunity to Single Event Effects
(SEE), Single Event Gate Rupture (SEGR) in particular, is
combined with 100K RADS of total dose hardness to provide
devices which are ideally suited to harsh space environ­ments. The dose rate and neutron tolerance necessary for
military applications have not been sacrificed.

The Intersil portfolio of SEGR resistant radiation hardened
MOSFETs includes N-Channel and P-Channel devices in a
variety of voltage, current and on-resistance ratings. Numer­ous packaging options are also available.

This MOSFET is an enhancement-mode silicon-gate power
field-effect transistor of the vertical DMOS (VDMOS) struc­ture. It is specially designed and processed to be radiation
tolerant. The MOSFET is well suited for applications
exposed to radiation environments such as switching regula­tion, switching converters, motor drives, relay drivers and
drivers for high-power bipolar switching transistors requiring
high speed and low gate drive power. This type can be oper­ated directly from integrated circuits.

August 1998 File Number 4571

Features

• 6A, 250V, r

• Total Dose

- Meets Pre-RAD Specifications to 100K RAD (Si)

• Single Event

- Safe Operating Area Curve for Single Event Effects

- SEE Immunity for LET of 36MeV/mg/cm
to 80% of Rated Breakdown and V

• Dose Rate

- Typically Survives 3E9 RAD (Si)/s at 80% BV

- Typically Survives 2E12 if Current Limited to I

• Photo Current

- 4.0nA Per-RAD(Si)/s Typically

• Neutron

- Maintain Pre-RAD Specifications for 1E13 Neutrons/cm

- Usable to 1E14 Neutrons/cm

DS(ON)

= 0.600Ω

2

with VDS up

of 10V Off-Bias

GS

DSS

DM

2

Symbol

2

Also available at other radiation and screening levels. See us
on the web, Intersil’ home page: http://www.semi.inter­sil.com. Contact your local Intersil Sales Office for additional
information.

Ordering Information

PART NUMBER PACKAGE BRAND

JANSR2N7401 TO-257AA JANSR2N7401

Die Family TA17638.
MIL-PRF-19500/632.

Package

CAUTION: Beryllia Warning per MIL-S-19500

refer to package specifications.

TO-257AA

S

D

G

4-1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207

| Copyright © Intersil Corporation 1999

JANSR2N7401

Absolute Maximum Ratings T

= 25oC, Unless Otherwise Specified

C

JANSR2N7401 UNITS

Drain to Source Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

Drain to Gate Voltage (RGS = 20kΩ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

DS

DGR

250 V
250 V

Continuous Drain Current

TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I

Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

D
D

DM

GS

6A
4A

18 A

±20 V

Maximum Power Dissipation

TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P

T
T

50 W
20 W

Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.40 W/oC

Single Pulsed Avalanche Current, L = 100µH, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . . . . . . . I

AS

Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Pulsed Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I

Operating and Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T

SM

STG

Lead Temperature (During Soldering). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T

S

L

18 A

6A

18 A

-55 to 150
300

o

C

o

C

(Distance >0.063in (1.6mm) from Case, 10s Max)

Weight (Typical)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

Electrical Specifications T

= 25oC, Unless Otherwise Specified

C

__

g

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BV
Gate Threshold Voltage V

GS(TH)VGS

Zero Gate Voltage Drain Current I

Gate to Source Leakage Current I

Drain to Source On-State Voltage V
Drain to Source On Resistance r

Turn-On Delay Time t

DS(ON)VGS

DS(ON)12ID

d(ON)

Rise Time t
Turn-Off Delay Time t

d(OFF)

Fall Time t
Total Gate Charge (Not on slash sheet) Q

g(TOT)VGS

Gate Charge at 12V Q
Threshold Gate Charge (Not on slash sheet) Q
Gate Charge Source Q
Gate Charge Drain Q
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R

DSSID

DSS

GSS

r

f

g(12)

g(TH)

gs

gd

JC

θ

JA

θ

= 1mA, VGS = 0V 250 - - V

= VDS,

ID = 1mA

TC = -55oC - - 5.0 V
TC = 25oC 1.5 - 4.0 V
TC = 125oC 0.5 - - V

VDS = 200V,
VGS = 0V

TC = 25oC--25µA
TC = 125oC - - 250 µA

VGS = ±20V TC = 25oC - - 100 nA

TC = 125oC - - 200 nA

= 12V, ID = 6A - - 3.78 V

= 4A,

VGS = 12V

VDD = 125V, ID = 6A,
RL = 20.8Ω, VGS = 12V,
RGS = 7.5Ω

TC = 25oC - 0.450 0.600 Ω
TC = 125oC - - 1.08 Ω

- - 70 ns

- - 140 ns

- - 120 ns

- - 95 ns

= 0V to 20V VDD = 125V,

VGS = 0V to 12V - 32 41 nC

ID = 6A

- - 62 nC

VGS = 0V to 2V - - 3.0 nC

- 7.3 11 nC

-1621nC

- - 2.5

o

C/W

--60oC/W

4-2

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Forward Voltage V
Reverse Recovery Time t

SD

rr

JANSR2N7401

ISD = 6A 0.6 - 1.8 V
ISD = 6A,dISD/dt = 100A/µs - - 420 ns

Electrical Specifications up to 100K RAD T

= 25oC, Unless Otherwise Specified

C

PARAMETER SYMBOL TEST CONDITIONS MIN MAX UNITS

Drain to Source Breakdown Volts (Note 3) BV
Gate to Source Threshold Volts (Note 3) V
Gate to Body Leakage (Notes 2, 3) I
Zero Gate Leakage (Note 3) I
Drain to Source On-State Volts (Notes 1, 3) V
Drain to Source On Resistance (Notes 1, 3) r

DS(ON)12VGS

DSSVGS

GS(TH)VGS

GSS
DSS

DS(ON)VGS

= 0, ID = 1mA 250 - V

= VDS, ID = 1mA 1.5 4.0 V
VGS = ±20V, VDS = 0V - 100 nA
VGS = 0, VDS = 200V - 25 µA

= 12V, ID = 6A - 3.78 V

= 12V, ID = 4A - 0.600 Ω

NOTES:

1. Pulse test, 300µs Max.

2. Absolute value.

3. Insitu Gamma bias must be sampled for both VGS = 12V, VDS = 0V and VGS = 0V, VDS = 80% BV

DSS

.

Single Event Effects (SEB, SEGR) Note 4

ENVIRONMENT (NOTE 5)

TEST SYMBOL

ION

SPECIES

TYPICAL LET

(MeV/mg/cm)

TYPICAL

RANGE (µ)

Single Event Effects Safe Operating Area SEESOA Ni 26 43 -20 250

Br 37 36 -5 250
Br 37 36 -10 200
Br 37 36 -15 125
Br 37 36 -20 50

NOTES:

4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN.

5. Fluence = 1E5 ions/cm2 (typical), TC = 25oC.

6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).

APPLIED

VGS BIAS

(V)

(NOTE 6)

MAXIMUM

VDSBIAS (V)

Typical Performance Curves

LET = 26MeV/mg/cm

300

200

(V)

DS

V

100

0

0 -10 -15 -20 -25

LET = 37MeV/mg/cm2, RANGE = 36µ

FLUENCE = 1E5 IONS/cm2 (TYPICAL)

TEMP = 25oC

-5
(V)

V

GS

Unless Otherwise Specified

2

, RANGE = 43µ

LIMITING INDUCTANCE (HENRY)

1E-3

1E-4

1E-5

1E-6

1E-7

30

DRAIN SUPPLY (V)

ILM = 10A

30A

100A

300A

30010010

FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT

GAMMA DOT CURRENT TO I

AS

4-3

1000

JANSR2N7401

Typical Performance Curves

8

6

4

, DRAIN (A)

D

I

2

0

-50

0

TC, CASE TEMPERATURE (oC)

50

Unless Otherwise Specified (Continued)

100

150

FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs

TEMPERATURE

50

10

1

, DRAIN CURRENT (A)

D

I

OPERATION IN THIS
AREA MAY BE
LIMITED BY r

0.1
1

VDS, DRAIN TO SOURCE VOLTAGE (V)

DS(ON)

10 100 700

TC = 25oC

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA

2.5

2.0

PULSE DURATION = 250ms,VGS = 12V, ID = 4A

100µs

1ms

10ms

100ms

DS(ON)

12V

V

Q

G

Q

GS

G

Q

GD

CHARGE

1.5

1.0

NORMALIZED r

0.5

0.0

-80 -40 0 40 80 120 160

FIGURE 5. BASIC GATE CHARGE WAVEFORM FIGURE 6. NORMALIZED r

10

)

1

θJC

0.5

0.2

0.1

0.1

0.05

NORMALIZED

0.02

0.01

0.01

THERMAL RESPONSE (Z

0.001
10

SINGLE PULSE

-5

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-4

10

-3

10

t, RECTANGULAR PULSE DURATION (s)

-2

10

TJ, JUNCTION TEMPERATURE (oC)

vs JUNCTION TEMPERA TURE

DS(ON)

P

DM

t

1/t2

+ T

θJC

C

-1

10

1

t

2

0

10

1

10

FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE

4-4

JANSR2N7401

Typical Performance Curves

Test Circuits and Waveforms

ELECTRONIC SWITCH OPENS

WHEN I

V

DS

Unless Otherwise Specified (Continued)

30

10

STARTING TJ = 150oC

, AVALANCHE CURRENT (A)

IF R = 0

AS

I

tAV = (L) (IAS) / (1.3 RATED BV
IF R ≠ 0

tAV = (L/R) ln [(IAS*R) / (1.3 RATED BV

1

0.01 0.1 1 100.001
tAV, TIME IN AVALANCHE (ms)

STARTING TJ = 25oC

- VDD)

DSS

- VDD) + 1]

DSS

FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING

IS REACHED

AS

VARY t

TO OBTAIN

P

REQUIRED PEAK I

VGS≤ 20V

t

0V

P

CURRENT

TRANSFORMER

50Ω

AS

L

+

I

AS

-

+

V

DD

-

DUT

50Ω

50V-150V

t

I

AS

BV

DSS

P

t

AV

FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 10. UNCLAMPED ENERGY WAVEFORMS

t

t

d(ON)

90%

ON

10%

t

r

PULSE WIDTH

0V

VGS = 12V

V

DD

R

L

V

DS

DUT

R

GS

V

DS

V

GS

10%

V

DS

t

d(OFF)

90%

t

OFF

50%50%

V

t

f

10%

DD

90%

FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT FIGURE 12. RESISTIVE SWITCHING WAVEFORMS

4-5

Screening Information

JANSR2N7401

Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table).

Delta Tests and Limits (JANS) T

PARAMETER SYMBOL TEST CONDITIONS MAX UNITS

= 25oC, Unless Otherwise Specified

C

Gate to Source Leakage Current I
Zero Gate Voltage Drain Current I
Drain to Source On Resistance r
Gate Threshold Voltage V

NOTES:

7. Or 100% of Initial Reading (whichever is greater).

8. Of Initial Reading.

DS(ON)

GSS

DSS

GS(TH)

VGS = ±20V ±20 (Note 7) nA
VDS = 80% Rated Value ±25 (Note 7) µA
TC = 25oC at Rated I
ID = 1.0mA ±20% (Note 8) V

D

±20% (Note 8) Ω

Screening Information

TEST JANS

Gate Stress VGS = 30V, t = 250µs
Pind Required
Pre Burn-In Tests (Note 9) MIL-S-19500 Group A,

Subgroup 2 (All Static Tests at 25oC)

Steady State Gate
Bias (Gate Stress)

Interim Electrical Tests (Note 9) All Delta Parameters Listed in the Delta Tests and Limits Table
Steady State Reverse

Bias (Drain Stress)

MIL-STD-750, Method 1042, Condition B
VGS = 80% of Rated Value,
TA = 150oC, Time = 48 hours

MIL-STD-750, Method 1042, Condition A
VDS = 80% of Rated Value,

TA = 150oC, Time = 240 hours
PDA 5%
Final Electrical Tests (Note 9) MIL-S-19500, Group A,

Subgroups 2 and 3

NOTE:

9. Test limits are identical pre and post burn-in.

Additional Screening Tests

PARAMETER SYMBOL TEST CONDITIONS MAX UNITS

Safe Operating Area SOA VDS = 200V, t = 10ms 0.33 A
Unclamped Inductive Switching I
Thermal Response ∆V
Thermal Impedance ∆V

AS

SD

SD

V

GS(PEAK)

tH = 100ms; VH = 25V; IH = 1A 90 mV
tH = 500ms; VH = 25V; IH = 1A 125 mV

= 15V, L = 0.1mH 18 A

4-6

JANSR2N7401

Rad Hard Data Packages - Intersil Power Transistors

1. JANS Rad Hard - Standard Data Package
A. Certificate of Compliance
B. Serialization Records
C. Assembly Flow Chart
D. SEM Photos and Report
E. Preconditioning

F. Group A - Attributes Data Sheet
G. Group B - Attributes Data Sheet
H. Group C - Attributes Data Sheet

I. Group D - Attributes Data Sheet

2. JANS Rad Hard - Optional Data Package
A. Certificate of Compliance
B. Serialization Records
C. Assembly Flow Chart
D. SEM Photos and Report
E. Preconditioning - Attributes Data Sheet

F. Group A - Attributes Data Sheet

G. Group B - Attributes Data Sheet

H. Group C - Attributes Data Sheet

I. Group D - Attributes Data Sheet

Attributes Data Sheet
Hi-Rel Lot Traveler
HTRB - Hi TempGate Stress Post Reverse
Bias Data and Delta Data
HTRB - Hi Temp Drain Stress PostReverse
Bias Delta Data

- Hi-Rel Lot Traveler

- HTRB - Hi Temp Gate Stress Post
Reverse Bias Data and Delta Data

- HTRB - Hi Temp Drain Stress Post
Reverse Bias Delta Data

- X-Ray and X-Ray Report

- Hi-Rel Lot Traveler

- Subgroups A2, A3, A4, A5 and A7 Data

- Hi-Rel Lot Traveler

- Subgroups B1, B3, B4, B5 and B6 Data

- Hi-Rel Lot Traveler

- Subgroups C1, C2, C3 and C6 Data

- Hi-Rel Lot Traveler

- Pre and Post Radiation Data

4-7

TO-257AA

3 LEAD JEDEC TO-257AA HERMETIC METAL PACKAGE

JANSR2N7401

E

Q

ØP

H

1

A

A

1

SYMBOL

A 0.190 0.200 4.83 5.08 -

A

1

INCHES MILLIMETERS

NOTESMIN MAX MIN MAX

0.035 0.045 0.89 1.14 -

Øb 0.025 0.035 0.64 0.88 2, 3

D

Øb

0.060 0.090 1.53 2.28 -

1

D 0.645 0.665 16.39 16.89 ­E 0.410 0.420 10.42 10.66 -

e 0.100 TYP 2.54 TYP 4

L

1

L

123

0.065 R TYP.

Øb

e

e

1

Øb

1

J

1

e

1

H

1

J

1

L 0.600 0.650 15.24 16.51 -

L

1

ØP 0.140 0.150 3.56 3.81 -

Q 0.113 0.133 2.88 3.37 -

NOTES:

0.200 BSC 5.08 BSC 4

0.230 0.250 5.85 6.35 -

0.110 0.130 2.80 3.30 4

- 0.035 - 0.88 -

1. These dimensions are within allowable dimensions of Rev.B of
JEDEC TO-257AA dated 9-88.

2. Add typically 0.002 inches (0.05mm) for solder coating.

3. Lead dimension (without solder).

4. Positionofleadtobemeasured 0.150inches (3.81mm)from bottom
of dimension D.

5. Die to base BeO isolated, terminals to case ceramic isolated.

6. Controlling dimension: Inch.

7. Revision 1 dated 1-93.

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

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P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: [phone]
FAX: [phone]

4-8

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Mercure Center
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