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NTEGRATED CIRCUITS DIVISION
IN
EN
OUT
IN
OUT
IN OUT
IXD_609
9-Ampere Low-Side
Ultrafast MOSFET Drivers
Features
• 9A Peak Source/Sink Drive Current
• Wide Operating Voltage Range: 4.5V to 35V
• -40°C to +125°C Extended Operating Temperature
Range
• Logic Input Withstands Negative Swing of up to 5V
• Matched Rise and Fall Times
• Low Propagation Delay Time
• Low, 10A Supply Current
• Low Output Impedance
Applications
• Efficient Po wer MOSFET and IGBT Switching
• Switch Mode Po w er Supplies
• Motor Controls
• DC to DC Converters
• Class-D Switching Amplifiers
• Pulse Transformer Driver
Ordering Information
Description
The IXDD609/IXDI609/IXDN609 high-speed gate
drivers are especially well suited for driving the latest
IXYS MOSFETs and IGBTs. The IXD_609
high-current output can source and sink 9A of peak
current while producing voltage rise and fall times of
less than 25ns. The input is CMOS compatible, and is
virtually immune to latch up. Proprietary circuitry
eliminates cross-conduction and current
“shoot-through.” Low propagation delay and fast,
matched rise and fall times make the IXD_609 family
ideal for high-frequency and high-power applications .
The IXDD609 is configured as a non-inv erting driver
with an enable, the IXDN609 is configured as a
non-inverting driver, and the IXDI609 is configured as
an inverting driver.
The IXD_609 family is available in a standard 8-pin
DIP (PI); an 8-pin SOIC (SIA); an 8-pin Po w er SOIC
with an exposed metal bac k (SI); an 8-pin DFN (D2); a
5-pin TO-263 (YI); and a 5-pin TO-220 (CI).
Part Number
IXDD609D2TR 8-Pin DFN Tape & Reel 2000
IXDD609SI 8-Pin Power SOIC with Exposed Metal Back Tube 100
IXDD609SITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel 2000
IXDD609SIA 8-Pin SOIC Tube 100
IXDD609SIATR 8-Pin SOIC Tape & Reel 2000
IXDD609PI 8-Pin DIP Tube 50
IXDD609CI 5-Pin TO-220 Tube 50
IXDD609YI 5-Pin TO-263 Tube 50
IXDI609SI 8-Pin Power SOIC with Exposed Metal Back Tube 100
IXDI609SITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel 2000
IXDI609SIA 8-Pin SOIC Tube 100
IXDI609SIATR 8-Pin SOIC Tape & Reel 2000
IXDI609PI 8-Pin DIP Tube 50
IXDI609CI 5-Pin TO-220 Tube 50
IXDI609YI 5-Pin TO-263 Tube 50
IXDN609SI 8-Pin Power SOIC with Exposed Metal Back Tube 100
IXDN609SITR 8-Pin Power SOIC with Exposed Metal Back Tape & Reel 2000
IXDN609SIA 8-Pin SOIC Tube 100
IXDN609SIATR 8-Pin SOIC Tape & Reel 2000
IXDN609PI 8-Pin DIP Tube 50
IXDN609CI 5-Pin TO-220 Tube 50
IXDN609YI 5-Pin TO-263 Tube 50
Logic
Configuration
Package Type
Packing
Method
Quantity
DS-IXD_609-R08 www.ixysic.com 1
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NTEGRATED CIRCUITS DIVISION
IXD_609
1. Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Pin Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.4 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.5 Electrical Characteristics: T
1.6 Electrical Characteristics: T
1.7 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2. IXD_609 Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Characteristics Test Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. Block Diagrams & Truth Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 IXDD609 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 IXDI609 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 IXDN609 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5. Manufacturing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1 Moisture Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2 ESD Sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.3 Soldering Profile. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.4 Board Wash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.5 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
= 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
A
= - 40°C to +125°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
A
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NTEGRATED CIRCUITS DIVISION
1 Specifications
1
4
3
2
8
5
6
7
V
CC
IN
EN
GND
V
CC
OUT
OUT
GND
1
4
3
2
5
V
CC
OUT
GND
IN
EN
1
4
3
2
8
5
6
7
V
CC
IN
NC
GND
V
CC
OUT
OUT
GND
1
4
3
2
5
V
CC
OUT
GND
IN
NC
1
4
3
2
8
5
6
7
V
CC
IN
NC
GND
V
CC
OUT
OUT
GND
1
4
3
2
5
V
CC
OUT
GND
IN
NC
IXDD609 D2 / PI / SI / SIA
IXDI609 PI / SI / SIA
IXDN609 PI / SI / SIA
IXDD609 CI / YI
IXDI609 CI / YI
IXDN609 CI / YI
1.1 Pin Configurations 1.2 Pin Definitions
Pin Name Description
IN Logic Input
IXD_609
1.3 Absolute Maximum Ratings
Parameter Symbol Minimum Maximum Units
Supply Voltage
Input Voltage
Output Current
Junction Temperature
Storage Temperature
Unless stated otherwise, absolute maximum electrical ratings are at 25°C
EN
OUT
OUT
V
CC
GND
Output Enable - Drive pin low to disable output,
and force output to a high impedance state
Output - Sources or sinks current to turn-on or
turn-off a discrete MOSFET or IGBT
Inverted Output - Sources or sinks current to
turn-on or turn-off a discrete MOSFET or IGBT
Supply Voltage - Provides power to the device
Ground - Common ground reference for the
device
NC Not connected
V
CC
, V
V
IN
I
T
OUT
T
STG
EN
J
-0.3 40 V
-5
VCC+0.3
V
-±9A
-55 +150
°C
-65 +150 °C
Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device.
Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not
implied.
1.4 Recommended Operating Conditions
Parameter Symbol Range Units
Supply Voltage
Operating Temperature Range
R08 www.ixysic.com 3
V
CC
T
A
4.5 to 35 V
-40 to +125 °C
Page 4
I
NTEGRATED CIRCUITS DIVISION
IXD_609
1.5 Electrical Characteristics: TA = 25°C
Test Conditions: 4.5V <
Paramet er Conditions Symbol Minimum Typical Maximum Units
Input Voltage, High
Input Voltage, Low
Input Current
EN Input Voltage, High IXDD609 only
EN Input Voltage, Low IXDD609 only
Output Voltage, High -
Output Voltage, Low -
Output Resistance, High State
Output Resistance, Low State
Output Current, Continuous
Rise Time
Fall T im e
On-Time Propagation Delay
Off-Time Propagation Delay
Enable to Output-High Delay Time
(IXDD609 Only)
Disable to High Impedance State Delay Time
(IXDD609 Only)
Enable Pull-Up Resistor -
Power Supply Current
VCC < 35V (unless otherwise noted).
< V
4.5V
4.5V
0V
V
=18V, I
CC
V
CC
Limited by package power
V
CC
V
CC
V
CC
V
CC
V
CC
V
V
CC
< 18V
CC
< V
< 18V
CC
< V
< V
IN
=-100mA
OUT
=18V, I
OUT
=100mA
dissipation
=18V, C
LOAD
=18V, C
LOAD
=18V, C
LOAD
=18V, C
LOAD
=18V
V
CC
=18V
V
CC
=18V, VIN=3.5V
=18V, VIN=0V
CC
=18V, VIN=V
CC
=10nF
=10nF
=10nF
=10nF
CC
V
V
I
IN
V
ENH
V
ENL
V
OH
V
OL
R
OH
R
OL
I
DC
t
t
t
ondly
t
offdly
t
ENOH
t
DOLD
R
EN
I
CC
IH
IL
3.0 - -
--0.8
--±10A
2/3V
CC
--
VCC-0.025
-1/3V
CC
--
- - 0.025
-0.61
-0.40.8
--±2A
r
f
-2235
-1525
-4060
-4260
ns
-2560
-3560
-200-k
-12mA
-<110
-<110
A
V
V
V
1.6 Electrical Characteristics: T
Test Conditions: 4.5V <
VCC < 35V unless otherwise noted.
= - 40°C to +125°C
A
Paramet er Conditions Symbol Minimum Maximum Units
< V
Input Voltage, High
Input Voltage, Low
Input Current
4.5V
4.5V
0V
Output Voltage, High -
Output Voltage, Low -
V
Output Resistance, High State
Output Resistance, Low State
Output Current, Continuous
Rise Time
Fall T im e
On-Time Propagation Delay
Off-Time Propagation Delay
Enable to Output-High Delay Time
Disable to High Impedance State Delay Time
Power Supply Current
=18V, I
CC
V
CC
Limited by package power
V
CC
V
CC
V
CC
V
CC
IXDD609 only, V
IXDD609 only, V
V
CC
V
V
CC
< 18V
CC
< V
< 18V
CC
< V
< V
IN
=-100mA
OUT
=18V, I
OUT
=100mA
dissipation
=18V, C
LOAD
=18V, C
LOAD
=18V, C
LOAD
=18V, C
LOAD
=18V, VIN=3.5V
=18V, VIN=0V
CC
=18V, VIN=V
CC
=10nF
=10nF
=10nF
=10nF
CC
CC
=18V
=18V
CC
V
V
I
IN
V
OH
V
OL
R
OH
R
OL
I
DC
t
t
t
ondly
t
offdly
t
ENOH
t
DOLD
I
CC
IH
IL
3.3 -
-0.65
-±10A
VCC-0.025
-
- 0.025
-2
-1.5
-±1A
r
f
-40
-30
-75
-75
ns
-75
-75
-2.5mA
-150
-150
A
V
V
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I
NTEGRATED CIRCUITS DIVISION
IXD_609
10%
90%
t
ondly
t
offdly
t
f
t
r
V
IH
V
IL
IN
OUT
EN
IN OUT
GND
V
CC
V
CC
+
-
V
IN
0.1μF10μF
Tektronix
Current Probe
6302
C
LOAD
V
CC
1.7 Thermal Characteristics
Package Parameter Symbol Rating Units
D2 (8-Pin DFN)
CI (5-Pin TO-220)
PI (8-Pin DIP)
SI (8-Pin Power SOIC)
SIA (8-Pin SOIC)
YI (5-Pin TO-263)
CI (5-Pin TO-220)
SI (8-Pin Power SOIC)
YI (5-Pin TO-263)
2 IXD_609 Performance
2.1 Timing Diagrams
V
IH
IN
V
IL
Thermal Impedance, Junction-to-Ambient
Thermal Impedance, Junction-to-Case
JA
JC
35
36
125
85
120
46
3
10
2
°C/W
°C/W
t
ondly
t
r
OUT
90%
10%
2.2 Characteristics Test Diagram
t
offdly
t
f
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NTEGRATED CIRCUITS DIVISION
3 Block Diagrams & Truth Tables
GND
IN
EN
V
CC
OUT
IN
V
CC
GND
OUT
IXD_609
3.1 IXDD609
IN EN OUT
3.2 IXDI609
0 1 or open
1 1 or open
x0
0
1
Z
3.3 IXDN609
IN
IN OUT
0
1
0
1
V
CC
OUT
GND
6 www.ixysic.com R08
IN OUT
0
1
1
0
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NTEGRATED CIRCUITS DIVISION
4 Typical Performance Characteristics
Supply Voltage (V)
0 5 10 15 20 25 30 35
Rise Time (ns)
0
10
20
30
40
50
60
70
Rise Time vs. Supply Voltage
(Input=0-5V, f=10kHz, T
A
=25ºC)
CL=10nF
C
L
=5.4nF
C
L
=1.5nF
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Input Threshold Voltage (V)
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Input Threshold Voltage
vs. T emperature
(V
CC
=18V, CL=2.5nF)
Min V
IH
Max V
IL
Supply Voltage (V)
0 5 10 15 20 25 30 35
Propagation Delay (ns)
0
50
100
150
200
Propagation Delay vs. Supply Voltage
(V
IN
=0-5V, f=1kHz, CL=5.4nF)
t
offdly
t
ondly
IXD_609
Fall Time vs. Supply Voltage
(Input=0-5V, f=10kHz, T
60
50
40
30
20
Fall Time (ns)
10
0
0 5 10 15 20 25 30 35
Rise Time vs. Load Capacitance
70
VCC=4.5V
60
=8V
V
CC
V
=12V
CC
50
=18V
V
CC
V
=25V
40
CC
=30V
V
CC
30
V
=35V
CC
20
Rise Time (ns)
10
0
0 2000 4000 6000 8000 10000
Load Capacitance (pF)
Propagation Delay vs. Input Voltage
=5V , VCC=12V, f=1kHz, CL=5.4nF)
(V
IN
180
160
t
ondly
140
120
100
80
60
40
Propagation Delay (ns)
20
0
2468 10 12
Supply Voltage (V)
t
offdly
Input Voltage (V)
Rise and Fall Times vs. Temperature
=0-5V , VCC=18V, f=10kHz, CL=2.5nF)
(V
IN
11
10
9
8
CL=10nF
=5.4nF
C
L
C
=1.5nF
L
=25ºC)
A
7
Rise & Fall Times (ns)
6
5
-40 -20 0 20 40 60 80 100 120 140
Fall Time vs. Load Capacitance
60
VCC=4.5V
=8V
V
50
CC
V
=12V
CC
=18V
V
40
CC
V
=25V
CC
=30V
V
30
CC
=35V
V
CC
20
Fall Time (ns)
10
0
0 2000 4000 6000 8000 10000
Load Capacitance (pF)
55
(V
50
45
40
35
Propagation Delay (ns)
119753
30
-40 -20 0 20 40 60 80 100 120 140
t
r
t
f
Temperature (ºC)
Propagation Delay
vs. T emperature
=18V, f=1kHz, CL=5.4nF)
CC
t
offdly
t
ondly
Temperature (ºC)
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Input Threshold vs. Supply Voltage
3.5
3.0
Min V
2.5
IH
Max V
IL
2.0
Input Threshold (V)
1.5
1.0
0 5 10 15 20 25 30 35
Supply Voltage (V)
Enable Threshold vs. Supply Voltage
25
20
Min V
15
10
5
Enable Threshold (V)
0
0 5 10 15 20 25 30 35
Supply Voltage (V)
ENH
Max V
ENL
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NTEGRATED CIRCUITS DIVISION
IXD_609
Load Capacitance (pF)
1000 10000
Supply Current (mA)
0
100
200
300
400
500
Supply Current vs. Load Capacitance
(V
CC
=18V)
f=2MHz
f=1MHz
f=500kHz
f=100kHz
f=50kHz
f=10kHz
f=1kHz
5000
Load Capacitance (pF)
1000 10000
Supply Current (mA)
0
50
100
150
200
250
300
Supply Current vs. Load Capacitance
(V
CC
=12V)
f=2MHz
f=1MHz
f=500kHz
f=100kHz
f=50kHz
f=10kHz
f=1kHz
5000
Load Capacitance (pF)
1000 10000
Supply Current (mA)
0
50
100
150
200
Supply Current vs. Load Capacitance
(V
CC
=8V)
f=2MHz
f=1MHz
f=500kHz
f=100kHz
f=50kHz
f=10kHz
f=1kHz
5000
Frequency (kHz)
1 10 100 1000 10000
Supply Current (mA)
0.1
1
10
100
1000
Supply Current vs. Frequency
(V
CC
=18V)
CL=10nF
C
L
=5.4nF
C
L
=1.5nF
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Supply Current (mA)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Quiescent Supply Current
vs. Temperature
VIN=3.5V
V
IN
=5V
V
IN
=10V
V
IN
=0V & 18V
Supply Voltage (V)
0 5 10 15 20 25 30 35
Output Source Current (A)
0
-5
-10
-15
-20
-25
-30
Output Source Current
vs. Supply Voltage
(f=422Hz, C
L
=66nF)
Supply Voltage (V)
0 5 10 15 20 25 30 35
Output Sink Current (A)
0
5
10
15
20
25
30
Output Sink Current
vs. Supply Voltage
(f=422Hz, C
L
=66nF)
Supply Current vs. Frequency
1000
CL=10nF
=5.4nF
C
L
100
C
=1.5nF
L
10
1
Supply Current (mA)
0.1
1 10 100 1000 10000
(V
=12V)
CC
Frequency (kHz)
0.65
(V
IN
0.60
0.55
0.50
0.45
Supply Current (mA)
0.40
0.35
-40 -20 0 20 40 60 80 100 120 140
Supply Current vs. Frequency
1000
CL=10nF
=5.4nF
C
100
L
C
=1.5nF
L
10
1
0.1
Supply Current (mA)
0.01
1 10 100 1000 10000
Dynamic Supply Current
vs. T emperature
=5V , VCC=18V, f=1kHz, CL=1.5nF)
Temperature (ºC)
=8V)
(V
CC
Frequency (kHz)
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NTEGRATED CIRCUITS DIVISION
IXD_609
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Output Source Current (A)
-9.0
-9.5
-10.0
-10.5
-11.0
-11.5
-12.0
Output Source Current
vs. T emperature
(V
CC
=18V, f=422Hz, CL=66nF)
Temperature (ºC)
-40 -20 0 20 40 60 80 100 120 140
Output Sink Current (A)
10.0
10.5
11.0
11.5
12.0
12.5
13.0
13.5
14.0
Output Sink Current
vs. T emperature
(V
CC
=18V, f=422Hz, CL=66nF)
High State Output Resistance
vs. Supply Voltage
= -10mA)
(I
1.5
1.0
0.5
Output Resistance (Ω)
0.0
0 5 10 15 20 25 30 35
OUT
Supply Voltage (V)
Low State Output Resistance
vs. Supply Voltage
(I
= +10mA )
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
Output Resistance (Ω)
0.3
0.2
0 5 10 15 20 25 30 35
OUT
Supply Voltage (V)
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NTEGRATED CIRCUITS DIVISION
IXD_609
5 Manufacturing Information
5.1 Moisture Sensitivity
All plastic encapsulated semiconductor packages are susceptible to moisture ingression. IXYS Integrated
Circuits Division classifies its plastic encapsulated devices for moisture sensitivity according to the latest
version of the joint industry standard, IPC/JEDEC J-STD-020, in f orce at the time of product evaluation.
We test all of our products to the maxim um conditions set forth in the standard, and guarantee proper
operation of our devices when handled accor ding to the limitations and information in that standard as well as to any
limitations set forth in the information or standards referenced below.
Failure to adhere to the warnings or limitations as established by the listed specifications could result in reduced
product performance, reduction of operable life, and/or reduction of ov er all reliability.
This product carries a Moisture Sensitivity Level (MSL) classification as shown below, and should be handled
according to the requirements of the latest version of t he joint industry standard IPC/JEDEC J-STD-033.
Device Moisture Sensitivity Level (MSL) Classification
IXD_609 All Versions except IXD_609YI MSL 1
IXD_609YI MSL 3
5.2 ESD Sensitivity
This product is ESD Sensitive, and should be handled according to the industry standard JESD-625.
5.3 Soldering Profile
Provided in the table below is t he Classification Temperature (T
body temperature of this device ma y be (T
- 5)ºC or greater . The classification tempe rature sets the Maximum Bo dy
C
) of this product and the maximum dwell time the
C
Temperature allowed for this device during lead-free re flow processes. For through-hole devices, and any other
processes, the guidelines of J-STD-020 must be observed.
Device
IXD_609CI 245°C for 30 seconds 30 seconds 1
IXD_609YI 245°C for 30 seconds 30 seconds 3
IXD_609PI 250°C for 30 seconds 30 seconds 3
IXD_609SI / IXD_609SIA / IXD_609D2 260°C for 30 seconds 30 seconds 3
Classification Temperature (TC) Dwell Time (tp)
Maximum Cycles
5.4 Board Wash
IXYS Integrated Circuits Division recommends the use of no-clean f lux formulations. Board washing to reduce or
remove flux residue following the solder reflow process is accep table provided proper precautions are taken to
prevent damage t o the device. These precautions include b ut a re not limited to: using a low pressure wash and
providing a follo w up bake cycle sufficient to remov e any moisture trapped within the device due to t he washing
process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature
and duration necessary to remove the moisture trapped within the package is the responsibility of t he user
(assembler). Cleaning or drying methods that employ ultr asonic energy may damage the device and should not be
used. Additionally, the device must n ot be exposed to flux or solvents that are Chlorine- or Fluorine-based.
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NTEGRATED CIRCUITS DIVISION
5.5 Mechanical Dimensions
NOTES:
1. Complies with JEDEC Standard MS-012.
2. All dimensions are in millimeters.
3. Dimensions do not include mold flash or burrs
PCB Land Pattern
Pin 1
Pin 8
3.90 ± 0.10
6.00 ± 0.20
0.42 ± 0.09
4.90 ± 0.10
1.27 REF
1.25 min
0.175 ± 0.075
0.40 min
1.27 max
1.27
5.60
1.75
0.65
1.75 max
Recommended PCB Land Pattern
Dimensions
mm
(inches)
1.346 ± 0.076
(0.053 ± 0.003)
0.051 MIN - 0.254 MAX
(0.002 MIN - 0.010 MAX)
4.928 ± 0.254
(0.194 ± 0.010)
Pin 1
0.406 ± 0.076
(0.016 ± 0.003)
5.994 ± 0.254
(0.236 ± 0.010)
3.937 ± 0.254
(0.155 ± 0.010)
1.270 REF
(0.050)
0.762 ± 0.254
(0.030 ± 0.010)
7º
2.540 ± 0.254
(0.100 ± 0.010)
3.556 ± 0.254
(0.140 ±0.010)
1.27
(0.050)
5.40
(0.209)
1.55
(0.061)
0.60
(0.024)
2.75
(0.108)
3.80
(0.150)
5.5.1 SIA (8-Pin SOIC)
IXD_609
5.5.2 SI (8-Pin Power SOIC with Exposed Metal Back)
Note:
carrying current.
R08 www.ixysic.com 11
The exposed metal pad on the back of the SI package should be connected to GND. It is not suitable for
Page 12
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NTEGRATED CIRCUITS DIVISION
5.5.3 Tape & Reel Information for SI and SIA Packages
Dimensions
mm
(inches)
NOTE:
Tape dimensions not shown comply with JEDEC Standard EIA-481-2
Embossment
Embossed Carrier
Top Cover
T ape Thickness
0.102 MAX.
(0.004 MAX.)
330.2 DIA.
(13.00 DIA.)
K0= 2.10
(0.083)
W=12.00
(0.472)
B
0
=5.30
(0.209)
User Direction of Feed
A0=6.50
(0.256)
P=8.00
(0.315)
H
b1
c1
b
c
SECTION: C-C
PLATING
(Note 3)
BASE METAL
E
(Note 2)
D1
D
(Note 2)
L1
e ~4x
CC
E3
D2
*
b ~5x
E1
NOTES :
1. Reference JEDEC TO-263 Type “BA”.
2. Dimension does not include mold flash; mold flash
shall not exceed 0.127mm (0.005 inch) per side.
3. Minimum plating: 1000 microinches.
4. Controlling dimension: millimeters.
MIN MINMAX MAX
MM INCH
SYMBOL
1.702 BSC 0.067 BSC
0.254 BSC 0.010 BSC
0.460 TYP 0.018 TYP
0.506 TYP
0.02 TYP
4.8264.064 0.160 0.190
0.2540.000 0.000 0.010
0.9910.508 0.020 0.039
0.8890.508 0.020 0.035
0.7370.381 0.015 0.029
0.5840.381 0.015 0.023
1.6511.143 0.045 0.065
9.6528.382 0.330 0.380
7.7006.858 0.270 0.303
10.6689.652 0.380 0.420
8.0006.223 0.245 0.315
15.87514.605 0.575 0.625
2.7941.778 0.070 0.110
1.6761.000 0.039 0.066
8º--8º
A
θ
A1
b
b1
c
c1
c2
D
D1
E
E1
e
H
L
L1
L3
R
R1
6.8695.092 0.200 0.270E3
1.5621.358 0.053 0.062D2
A1
L
L3
θ
R
R
A
c2
A1
L
L3
θ
R1
R1
JEDEC TO-263
Optional Tip Lead Form
Recommended PCB Pattern
10.75
(0.423)
2.20
(0.087)
8.40
(0.331)
8.05
(0.317)
10.50
(0.413)
1.05
(0.041)
3.80
(0.150)
1.702
(0.067)
Dimensions
mm
(inches)
Pin 1
Indicator
Circular feature will be
present on devices
with the
Optional Tip Lead Form.
*
5.5.4 YI (5-Pin TO-263)
IXD_609
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NTEGRATED CIRCUITS DIVISION
5.5.5 PI (8-Pin DIP)
Dimensions
mm
(inches)
PCB Hole Pattern
2.540 ± 0.127
(0.100 ± 0.005)
6.350 ± 0.127
(0.250 ± 0.005)
9.144 ± 0.508
(0.360 ± 0.020)
0.457 ± 0.076
(0.018 ± 0.003)
9.652 ± 0.381
(0.380 ± 0.015)
7.239 TYP.
(0.285)
7.620 ± 0.254
(0.300 ± 0.010)
4.064 TYP
(0.160)
0.813 ± 0.102
(0.032 ± 0.004)
8-0.800 DIA.
(8-0.031 DIA.)
2.540 ± 0.127
(0.100 ± 0.005)
7.620 ± 0.127
(0.300 ± 0.005)
7.620 ± 0.127
(0.300 ± 0.005)
3.302 ± 0.051
(0.130 ± 0.002)
Pin 1
0.254 ± 0.0127
(0.010 ± 0.0005)
IXD_609
5.5.6 CI (5-Pin TO-220)
0.127 BSC
(0.005 BSC)
14.224 - 16.510
(0.560 - 0.650)
12.700 - 14.732
(0.500 - 0.580)
1.702 4x BSC
(0.067 4x BSC)
9.652 - 10.668
(0.380 - 0.420)
CC
A
0.355 M B A M
2.540 - 3.048
(0.100 - 0.120)
8.382 - 9.017
(0.330 - 0.355)
0.381 - 1.016 5x
(0.015 - 0.040 5x)
0.381 M B A M
LEAD TIP
3.810 - 3.860
(0.150 - 0.152)
4.826 - 5.334
(0.190 - 0.210)
PLATING
0.356 - 0.610
(0.014 - 0.024)
B
3.556 - 4.826
(0.140 - 0.190)
0.508 - 1.397
(0.020 - 0.055)
5.842 - 6.858
(0.230 - 0.270)
2.032 - 2.921
(0.080 - 0.115)
0.356 - 0.610
(0.014 - 0.024)
5.842 - 6.858
(0.230 - 0.270)
6.300 - 6.700
(0.248 - 0.264)
THERMAL PAD
SECTION C-C
0.381 - 1.016
(0.015 - 0.040)
0.381 - 0.965
(0.015 - 0.038)
BASE METAL
0.356 - 0.559
(0.014 - 0.022)
9.652 - 10.668
(0.380 - 0.420)
6.858 - 8.890
(0.270 - 0.350)
7.550 - 8.100
(0.297 - 0.319)
Dimensions
mm
(inches)
12.192 - 12.878
(0.480 - 0.507)
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NTEGRATED CIRCUITS DIVISION
5.5.7 D2 (8-Pin DFN)
Dimensions
mm MIN / mm MAX
(inches MIN / inches MAX)
5.00 BSC
(0.197 BSC)
4.00 BSC
(0.157 BSC)
0.80 / 1.00
(0.031 / 0.039)
0.10
(0.004)
0.95 BSC
(0.037 BSC)
0.74 / 0.83
(0.029 / 0.033)
0.30 / 0.45
(0.012 / 0.018)
3.03 / 3.10
(0.119 / 0.122)
2.53 / 2.60
(0.100 / 0.102)
0.35 / 0.45 x 45º
(0.014 / 0.018 x 45º)
Pin 1
Pin 1 Pin 8
0.20 REF
(0.008 REF)
Recommended PCB Land Pattern
4.50
(0.177)
0.45
(0.018)
1.20
(0.047)
3.10
(0.122)
2.60
(0.102)
0.95
(0.037)
0.35 x 45º
(0.014 x 45º)
NOTE:
The exposed metal pad on the back of the D2 package should
be connected to GND. Pad is not suitable for carrying current.
K0=1.90 ± 0.10
B0=5.40 ± 0.10
5º MAX
A0=4.25 ± 0.10
5º MAX
0.30 ± 0.05
(0.05)
(0.05)
R0.75 TYP
8.00 ± 0.10
2.00 ± 0.05
4.00 ± 0.10 See Note #2
12.00 ± 0.30
5.50 ± 0.05
1.75 ± 0.10
∅1.50 (MIN)
∅1.55 ± 0.05
NOTES:
1. A
0
& B0 measured at 0.3mm above base of pocket.
2. 10 pitches cumulative tol. ± 0.2mm
3. ( ) Reference dimensions only.
4. Unless otherwise specified, all dimensions in millimeters.
Embossment
Embossed Carrier
Top Cover
T ape Thickness
0.102 MAX.
(0.004 MAX.)
330.2 DIA.
(13.00 DIA.)
For additional information please visit our website at: www.ixysic.com
IXYS Integrated Circuits Division makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make
changes to specifications and product descriptions at any time without notice. Neither circuit patent licenses nor indemnity are expressed or implied. Except as set forth in IXYS Integrated
Circuits Division’s Standard Terms and Conditions of Sale, IXYS Integrated Circuits Division assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its
products including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe
property or environmental damage. IXYS Integrated Circuits Division reserves the right to discontinue or make changes to its products at any time without notice.
Specification: DS-IXD_609-R08
©Copyright 2017, IXYS Integrated Circuits Division
All rights reserved. Printed in USA.
4/5/2017
IXD_609
5.5.8 Tape & Reel Information for D2 Package
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