Page 1
TECHNICAL DATA
Hex Buffer
High-Voltage Silicon-Gate CMOS
The IW4503B is a hex noninverting buffer with 3-state outputs
having high sink- and source-current capability. Two output ENABLE
controls are provided, one of which controls four buffers and the other
controls the remaining two buffers.
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
IW4503B
ORDERING INFORMATION
IW4503BN Plastic
IW4503BD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN 16=V
PIN 8= GND
CC
PIN ASSIGNMENT
FUNCTION TABLE
Inputs Output
Enable 1,Enable 2 A Y
LLL
LHH
HXZ
Z = high impedance
X = don’t care
152
Page 2
IW4503B
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
V
OUT
I
IN
P
P
DC Supply Voltage (Referenced to GND) -0.5 to +20 V
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IN
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
Power Dissipation per Output Transistor 100 mW
D
±
10
750
500
Tstg Storage Temperature -65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
VIN, V
T
CC
A
DC Supply Voltage (Referenced to GND) 3.0 18 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
OUT
Operating Temperature, All Package Types -55 +125
CC
mA
mW
°
C
°
C
V
°
C
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
and V
IN
should be constrained to the range
OUT
CC
Unused outputs must be left open.
153
).
Page 3
IW4503B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol Parameter Test Conditions V
V
V
V
IH
IL
OH
Minimum High-Level
Input Voltage
Maximum Low -L evel
Input Voltage
Minimum High-Level
V
= V
OUT
V
= V
OUT
V
= V
OUT
V
=0.5 V
OUT
V
=1 V
OUT
V
=1.5
OUT
VIN= V
CC
CC
CC
CC
- 0.5V
- 1.0 V
- 1.5V
Output Voltage
V
OL
Maximum Low-L evel
VIN=GND 5.0
Output Voltage
I
IN
Maximum Input
VIN= GND or V
CC
Leakage Current
I
CC
Maximum Quie scent
VIN= GND or V
CC
Supply Current
(per Package)
I
OL
I
OH
I
OZ
Minimum Output Low
(Sink) Current
Minimum Output
High (Source) Current
Maximum Tree-State
Leakage Current
VIN= GND or V
CC
UOL=0.4 V
U
=0.5 V
OL
U
=1.5 V
OL
VIN= GND or V
CC
UOH=2.5 V
U
=4.6 V
OH
U
=9.5 V
OH
U
=13.5 V
OH
Output in High-Impedance
State
V
= GND or V
IN
V
= GND or V
OUT
CC
CC
V
5.0
10
15
5.0
10
15
5.0
10
15
10
15
18
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
18
CC
≥
14.95
Guaranteed Limit
-55°C25°C
3.5
7
11
1.5
3
4
4.95
9.95
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±
0.1
1
2
4
20
2.6
6.5
19.2
-1.2
-5.8
-3.1
-8.2
±
0.4
0.05
0.05
0.05
±
0.1
1
2
4
20
2.1
5.5
16.1
-1.02
-4.8
-2.6
-6.8
±
0.4
≤
125
°
C
3.5
7
11
1.5
3
4
4.95
9.95
14.95
0.05
0.05
0.05
±
1.0
30
60
120
600
1.3
3.8
11.2
-0.7
-3
--1.8
-4.8
±
12
Unit
V
V
V
V
µ
A
µ
A
mA
mA
µ
A
154
Page 4
IW4503B
AC ELECTRICAL CHARACTERISTICS
t
=20 ns)
r=tf
(CL=50pF, RL=200kΩ unless otherwise specified, Input
Symbol Parameter V
t
PLH
Maximum Propagation Delay, Input A to Output
Y (Figure 1)
t
PHL
Maximum Propagation Delay, Input A to Output
Y (Figure 1)
t
PHZ
, t
Maximum Propagation Delay, Output Enable to
PZH
Output Y (Figure 2)
Ω
= 1 k
R
L
t
PZL
, t
Maximum Propagation Delay, Output Enable to
PLZ
Output Y (Figure 2)
Ω
= 1 k
R
L
t
TLH
Maximum Output Transition Time, Any Output
(Figure 1)
t
THL
Maximum Output Transition Time, Any Output
(Figure 1)
C
IN
C
OUT
Maximum Input Capacitance - 7.5 pF
Maximum Tree-State Output Capacitance
(Output in High-Impedance State)
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
CC
Guaranteed Limit
≥
-55°C25°C
150
70
50
110
50
35
140
60
50
180
80
70
90
45
35
70
40
25
150
70
50
110
50
35
140
60
50
180
80
70
90
45
35
70
40
25
≤
125°C
300
140
100
220
100
70
280
120
100
360
160
140
180
90
70
140
80
50
Unit
ns
ns
ns
ns
ns
ns
-15pF
Figure 1. Switching Waveforms Figure 2. Switching Waveforms
155
Page 5
IW4503B
EXPANDED LOGIC DIAGRAM
(1/6 of the Device)
156
Loading...