Page 1
TECHNICAL DATA
Quad 2-Input NAND Schmitt Triggers
High-Voltage Silicon-Gate CMOS
The IW4093B consists of four Schmitt-trigger circuits. Each circuit
functions as a two-input NAND gate with Schmitt-trigger action on
both inputs. The gate switches at different points for positive- and
negative- going signals. The difference between the positive voltage
(V
) and the negative voltage (VN) is defined as hysteresis voltage (VH)
P
(see Fig.1).
•
Operating Voltage Range: 3.0 to 18 V
•
Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
•
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
IW4093B
ORDERING INFORMATION
IW4093BN Plastic
IW4093BD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN 14 =V
PIN 7 = GND
CC
PIN ASSIGNMENT
FUNCTION TABLE
Inputs Output
ABY
LLH
LHH
HLH
HHL
142
Page 2
IW4093B
MAXIMUM RATINGS
*
Symbol Parameter Value Unit
V
CC
V
V
OUT
I
IN
P
P
DC Supply Voltage (Referenced to GND) -0.5 to +20 V
DC Input Voltage (Referenced to GND) -0.5 to VCC +0.5 V
IN
DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V
DC Input Current, per Pin
Power Dissipation in Still Air, Plastic DIP+
D
SOIC Package+
Power Dissipation per Output Transistor 100 mW
D
±
10
750
500
Tstg Storage Temperature -65 to +150
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
260
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
VIN, V
T
CC
A
DC Supply Voltage (Referenced to GND) 3.0 18 V
DC Input Voltage, Output Voltage (Referenced to GND) 0 V
OUT
Operating Temperature, All Package Types -55 +125
CC
mA
mW
°
C
°
C
V
°
C
This device c ontains p rote ction ci rcuitr y to guard a gainst damage d ue to high st atic voltages or electr ic
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
GND≤(V
IN
or V
OUT
)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
and V
IN
should be constrained to the range
OUT
CC
Unused outputs must be left open.
143
).
Page 3
IW4093B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Symbol Parameter Test Conditions V
VT+min Minimum Positive-
Going Input
Input on terminals A or B;
other inputs to V
CC
Threshold Voltage
Input on terminals A and B;
VT+max Maximum Positive-
Going Input
other inputs to V
Input on terminals A or B;
other inputs to V
CC
CC
Threshold Voltage
Input on terminals A and B;
VT-min Minimum Negative-
Going Input
other inputs to V
Input on terminals A or B;
other inputs to V
CC
CC
Threshold Voltage
Input on terminals A and B;
VT-max Maximum Negative-
Going Input
other inputs to V
Input on terminals A or B;
other inputs to V
CC
CC
Threshold Voltage
Input on terminals A and B;
VHmin
Note
Minimum Hysteresis
Voltage
other inputs to V
Input on terminals A or B;
other inputs to V
CC
CC
Input on terminals A and B;
VHmax
Note
Maximum Hyst eresis
Voltage
other inputs to V
Input on terminals A or B;
other inputs to V
CC
CC
Input on terminals A and B;
other inputs to V
I
IN
Maximum Input
VIN= GND or V
CC
CC
Leakage Current
V
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
5.0
10
15
18
CC
≥
Guaranteed Limit
-55°C25°C
2.2
4.6
6.8
2.6
5.6
6.3
3.6
7.1
10.8
4
8.2
12.7
0.9
2.5
4
1.4
3.4
4.8
2.8
5.2
7.4
3.2
6.6
9.6
0.3
1.2
1.6
0.3
1.2
1.6
1.6
3.4
5
1.6
3.4
5
±
0.1
2.2
4.6
6.8
2.6
5.6
6.3
3.6
7.1
10.8
4
8.2
12.7
0.9
2.5
4
1.4
3.4
4.8
2.8
5.2
7.4
3.2
6.6
9.6
0.3
1.2
1.6
0.3
1.2
1.6
1.6
3.4
5
1.6
3.4
5
±
0.1
≤
125
°
2.2
4.6
6.8
2.6
5.6
6.3
3.6
7.1
10.8
8.2
12.7
0.9
2.5
1.4
3.4
4.8
2.8
5.2
7.4
3.2
6.6
9.6
0.3
1.2
1.6
0.3
1.2
1.6
1.6
3.4
1.6
3.4
±
1.0
Unit
C
V
V
4
V
4
V
V
V
5
5
µ
A
144
Page 4
IW4093B
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND) - continued
Symbol Parameter Test Conditions V
I
CC
Maximum Quiescent
VIN= GND or V
CC
Supply Current
(per Package)
I
OL
I
OH
V
OH
Minimum Output Low
(Sink) Current
Minimum Output
High (Source) Current
Minimum High-Level
VIN= GND or V
UOL=0.4 V
U
=0.5 V
OL
U
=1.5 V
OL
VIN= GND or V
UOH=2.5 V
U
=4.6 V
OH
U
=9.5 V
OH
U
=13.5 V
OH
VIN=GND or V
CC
CC
CC
Output Voltage
V
OL
Maximum Low-Level
VIN= V
CC
Output Voltage
Note. VHmin>(VT+min)-(VT-max); VHmax=(VT+max)+(VT-min).
V
5.0
10
15
20
5.0
10
15
5.0
5.0
10
15
5.0
10
15
5.0
10
15
CC
≥
14.95
Guaranteed Limit
-55°C25°C
1
2
4
20
0.64
1.6
4.2
-2.0
-0.64
-1.6
-4.2
4.95
9.95
1
2
4
20
0.51
1.3
3.4
-1.6
-0.51
-1.3
-3.4
4.95
9.95
14.95
0.05
0.05
0.05
0.05
0.05
0.05
≤
125
°
C
30
60
120
600
0.36
0.9
2.4
-1.15
-0.36
-0.9
-2.4
4.95
9.95
14.95
0.05
0.05
0.05
Unit
µ
A
mA
mA
V
V
AC ELECTRICAL CHARACTERISTICS
(CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
Symbol Parameter V
t
PLH
, t
Maximum Propagation Delay, Input A or B to
PHL
Output Y (Figure 2)
t
TLH
, t
Maximum Output Transition Time, Any Output
THL
(Figure 2)
C
IN
Maximum Input Capacitance - 7.5 pF
V
5.0
10
15
5.0
10
15
CC
≥
Guaranteed Limit
-55°C25°C
380
180
130
200
100
80
380
180
130
200
100
80
≤
125°C
760
360
260
400
200
160
Unit
ns
ns
145
Page 5
IW4093B
a) Definition of VT+, VT-, V
b) Transfer characteristic of 1 of 4 gates
Figure 1. Hysteresis definition, characteristic, and test setup
Figure 2. Switching Waveforms
H
c) Test setup
146
EXPANDED LOGIC DIAGRAM
(1/4 of the Device)
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